RE: [PATCH] arm64: dts: layerscape: correct watchdog clocks for LS1088A

2020-09-21 Thread Qiang Zhao 
On Mon, Sep 14, 2020 at 03:52:02PM +0800, Qiang Zhao wrote:

> -Original Message-
> From: Shawn Guo 
> Sent: 2020年9月22日 10:18
> To: Qiang Zhao 
> Cc: robh...@kernel.org; linux-kernel@vger.kernel.org;
> devicet...@vger.kernel.org
> Subject: Re: [PATCH] arm64: dts: layerscape: correct watchdog clocks for
> LS1088A
> 
> On Mon, Sep 14, 2020 at 03:52:02PM +0800, Qiang Zhao wrote:
> > From: Zhao Qiang 
> >
> > On LS1088A, watchdog clk are divided by 16, correct it in dts.
> >
> > Signed-off-by: Zhao Qiang 
> 
> It doesn't apply to my imx/dt64 branch.
> 
> Shawn
> 

Have pushed version 2 to rebase. 

Best Regards
Qiang Zhao

Re: [PATCH] arm64: dts: layerscape: correct watchdog clocks for LS1088A

2020-09-21 Thread Shawn Guo 
On Mon, Sep 14, 2020 at 03:52:02PM +0800, Qiang Zhao wrote:
> From: Zhao Qiang 
> 
> On LS1088A, watchdog clk are divided by 16, correct it in dts.
> 
> Signed-off-by: Zhao Qiang 

It doesn't apply to my imx/dt64 branch.

Shawn

> ---
>  arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 16 
>  1 file changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi 
> b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> index b0bbe57..2bd0a71 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> @@ -712,56 +712,56 @@
>   cluster1_core0_watchdog: wdt@c00 {
>   compatible = "arm,sp805-wdt", "arm,primecell";
>   reg = <0x0 0xc00 0x0 0x1000>;
> - clocks = < 4 3>, < 4 3>;
> + clocks = < 4 15>, < 4 15>;
>   clock-names = "apb_pclk", "wdog_clk";
>   };
>  
>   cluster1_core1_watchdog: wdt@c01 {
>   compatible = "arm,sp805-wdt", "arm,primecell";
>   reg = <0x0 0xc01 0x0 0x1000>;
> - clocks = < 4 3>, < 4 3>;
> + clocks = < 4 15>, < 4 15>;
>   clock-names = "apb_pclk", "wdog_clk";
>   };
>  
>   cluster1_core2_watchdog: wdt@c02 {
>   compatible = "arm,sp805-wdt", "arm,primecell";
>   reg = <0x0 0xc02 0x0 0x1000>;
> - clocks = < 4 3>, < 4 3>;
> + clocks = < 4 15>, < 4 15>;
>   clock-names = "apb_pclk", "wdog_clk";
>   };
>  
>   cluster1_core3_watchdog: wdt@c03 {
>   compatible = "arm,sp805-wdt", "arm,primecell";
>   reg = <0x0 0xc03 0x0 0x1000>;
> - clocks = < 4 3>, < 4 3>;
> + clocks = < 4 15>, < 4 15>;
>   clock-names = "apb_pclk", "wdog_clk";
>   };
>  
>   cluster2_core0_watchdog: wdt@c10 {
>   compatible = "arm,sp805-wdt", "arm,primecell";
>   reg = <0x0 0xc10 0x0 0x1000>;
> - clocks = < 4 3>, < 4 3>;
> + clocks = < 4 15>, < 4 15>;
>   clock-names = "apb_pclk", "wdog_clk";
>   };
>  
>   cluster2_core1_watchdog: wdt@c11 {
>   compatible = "arm,sp805-wdt", "arm,primecell";
>   reg = <0x0 0xc11 0x0 0x1000>;
> - clocks = < 4 3>, < 4 3>;
> + clocks = < 4 15>, < 4 15>;
>   clock-names = "apb_pclk", "wdog_clk";
>   };
>  
>   cluster2_core2_watchdog: wdt@c12 {
>   compatible = "arm,sp805-wdt", "arm,primecell";
>   reg = <0x0 0xc12 0x0 0x1000>;
> - clocks = < 4 3>, < 4 3>;
> + clocks = < 4 15>, < 4 15>;
>   clock-names = "apb_pclk", "wdog_clk";
>   };
>  
>   cluster2_core3_watchdog: wdt@c13 {
>   compatible = "arm,sp805-wdt", "arm,primecell";
>   reg = <0x0 0xc13 0x0 0x1000>;
> - clocks = < 4 3>, < 4 3>;
> + clocks = < 4 15>, < 4 15>;
>   clock-names = "apb_pclk", "wdog_clk";
>   };
>  
> -- 
> 2.7.4
>