Re: [PATCH 6/7] remoteproc: Add Xilinx ZynqMP R5 remoteproc
On Thu 16 Aug 00:06 PDT 2018, Wendy Liang wrote:
> diff --git a/drivers/remoteproc/zynqmp_r5_remoteproc.c
> b/drivers/remoteproc/zynqmp_r5_remoteproc.c
> new file mode 100644
> index 000..7fc3718
> --- /dev/null
> +++ b/drivers/remoteproc/zynqmp_r5_remoteproc.c
> @@ -0,0 +1,692 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Zynq R5 Remote Processor driver
> + *
> + * Copyright (C) 2015 Xilinx, Inc.
> + *
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include "remoteproc_internal.h"
> +
> +/* IPI reg offsets */
> +#define TRIG_OFFSET 0x
> +#define OBS_OFFSET 0x0004
> +#define ISR_OFFSET 0x0010
> +#define IMR_OFFSET 0x0014
> +#define IER_OFFSET 0x0018
> +#define IDR_OFFSET 0x001C
> +#define IPI_ALL_MASK 0x0F0F0301
> +
> +/* RPU IPI mask */
> +#define RPU_IPI_INIT_MASK0x0100
> +#define RPU_IPI_MASK(n) (RPU_IPI_INIT_MASK << (n))
> +#define RPU_0_IPI_MASK RPU_IPI_MASK(0)
> +#define RPU_1_IPI_MASK RPU_IPI_MASK(1)
Rather than using 2 levels of macros, just define RPU_0_IPI_MASK and
RPU_1_IPI_MASK as BIT(8) and BIT(9)
> +
> +/* PM proc states */
> +#define PM_PROC_STATE_ACTIVE 1u
Unused
> +
> +/* Maximum TCM power nodes IDs */
> +#define MAX_TCM_PNODES 4
> +
> +/* Register access macros */
> +#define reg_read(base, reg) \
> + readl(((void __iomem *)(base)) + (reg))
> +#define reg_write(base, reg, val) \
> + writel((val), ((void __iomem *)(base)) + (reg))
Please drop these macros, using readl/writel directly rather than hiding
it behind a similar macro will make it easier to read the code.
> +
> +#define DEFAULT_FIRMWARE_NAME"rproc-rpu-fw"
> +
> +static bool autoboot __read_mostly;
A variable only read during probe() doesn't need hints.
> +
> +struct zynqmp_r5_rproc_pdata;
No need to forward declare this, as the very next statement is the
declaration of this struct.
> +
> +/**
> + * struct zynqmp_r5_rproc_pdata - zynqmp rpu remote processor instance state
> + * @rproc: rproc handle
> + * @workqueue: workqueue for the RPU remoteproc
> + * @ipi_base: virt ptr to IPI channel address registers for APU
> + * @rpu_mode: RPU core configuration
> + * @rpu_id: RPU CPU id
> + * @rpu_pnode_id: RPU CPU power domain id
> + * @mem_pools: list of gen_pool for firmware mmio_sram memory and their
> + * power domain IDs
mem_pools is not a member of the struct.
> + * @mems: list of rproc_mem_entries for firmware
Please reorder to match struct.
> + * @irq: IRQ number
> + * @ipi_dest_mask: IPI destination mask for the IPI channel
> + */
> +struct zynqmp_r5_rproc_pdata {
> + struct rproc *rproc;
> + struct work_struct workqueue;
This is the work object, not the work queue. Please update naming
("work" is a common choice to this).
> + void __iomem *ipi_base;
> + enum rpu_oper_mode rpu_mode;
> + struct list_head mems;
Consider renaming to mem_entries.
> + u32 ipi_dest_mask;
> + u32 rpu_id;
> + u32 rpu_pnode_id;
> + int irq;
> + u32 tcm_pnode_id[MAX_TCM_PNODES];
> +};
> +
> +/**
> + * r5_boot_addr_config - configure the boot address of R5
Add () on the function name in kerneldoc.
> + * @pdata: platform data
> + * @bootmem: boot from LOVEC or HIVEC
> + *
> + * This function will set the RPU boot address
> + */
> +static void r5_boot_addr_config(struct zynqmp_r5_rproc_pdata *pdata,
> + enum rpu_boot_mem bootmem)
> +{
> + const struct zynqmp_eemi_ops *eemi = zynqmp_pm_get_eemi_ops();
I presume this will return the same eemi as when it was called right
before in zynqmp_r5_rproc_start(). How about passing eemi from the
caller?
> +
> + pr_debug("%s: R5 ID: %d, boot_dev %d\n",
> + __func__, pdata->rpu_id, bootmem);
> +
> + if (!eemi || !eemi->ioctl) {
If eemi is NULL zynqmp_r5_rproc_start() already aborted. How about
making zynqmp_r5_rproc_start() also check to see that eemi->ioctl is
non-NULL? and then just skip this check.
> + pr_err("%s: no eemi ioctl operation.\n", __func__);
> + return;
> + }
> + eemi->ioctl(pdata->rpu_pnode_id, IOCTL_RPU_BOOT_ADDR_CONFIG,
> + bootmem, 0, NULL);
> +}
> +
> +/**
> + * r5_mode_config - configure R5 operation mode
> + * @pdata: platform data
> + *
> + * configure R5 to split mode or lockstep mode
> + * based on the platform data.
> + */
> +static void r5_mode_config(struct zynqmp_r5_rproc_pdata *pdata)
> +{
> + const struct zynqmp_eemi_ops *eemi = zynqmp_pm_get_eemi_ops();
Same comments as for r5_boot_addr_config()
> +
> + pr_debug("%s: mode: %d\n", __func__, pdata->rpu_mode);
> +
> + if (!eemi || !eemi->ioctl) {
> +
Re: [PATCH 6/7] remoteproc: Add Xilinx ZynqMP R5 remoteproc
On Thu 16 Aug 00:06 PDT 2018, Wendy Liang wrote:
> diff --git a/drivers/remoteproc/zynqmp_r5_remoteproc.c
> b/drivers/remoteproc/zynqmp_r5_remoteproc.c
> new file mode 100644
> index 000..7fc3718
> --- /dev/null
> +++ b/drivers/remoteproc/zynqmp_r5_remoteproc.c
> @@ -0,0 +1,692 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Zynq R5 Remote Processor driver
> + *
> + * Copyright (C) 2015 Xilinx, Inc.
> + *
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include "remoteproc_internal.h"
> +
> +/* IPI reg offsets */
> +#define TRIG_OFFSET 0x
> +#define OBS_OFFSET 0x0004
> +#define ISR_OFFSET 0x0010
> +#define IMR_OFFSET 0x0014
> +#define IER_OFFSET 0x0018
> +#define IDR_OFFSET 0x001C
> +#define IPI_ALL_MASK 0x0F0F0301
> +
> +/* RPU IPI mask */
> +#define RPU_IPI_INIT_MASK0x0100
> +#define RPU_IPI_MASK(n) (RPU_IPI_INIT_MASK << (n))
> +#define RPU_0_IPI_MASK RPU_IPI_MASK(0)
> +#define RPU_1_IPI_MASK RPU_IPI_MASK(1)
Rather than using 2 levels of macros, just define RPU_0_IPI_MASK and
RPU_1_IPI_MASK as BIT(8) and BIT(9)
> +
> +/* PM proc states */
> +#define PM_PROC_STATE_ACTIVE 1u
Unused
> +
> +/* Maximum TCM power nodes IDs */
> +#define MAX_TCM_PNODES 4
> +
> +/* Register access macros */
> +#define reg_read(base, reg) \
> + readl(((void __iomem *)(base)) + (reg))
> +#define reg_write(base, reg, val) \
> + writel((val), ((void __iomem *)(base)) + (reg))
Please drop these macros, using readl/writel directly rather than hiding
it behind a similar macro will make it easier to read the code.
> +
> +#define DEFAULT_FIRMWARE_NAME"rproc-rpu-fw"
> +
> +static bool autoboot __read_mostly;
A variable only read during probe() doesn't need hints.
> +
> +struct zynqmp_r5_rproc_pdata;
No need to forward declare this, as the very next statement is the
declaration of this struct.
> +
> +/**
> + * struct zynqmp_r5_rproc_pdata - zynqmp rpu remote processor instance state
> + * @rproc: rproc handle
> + * @workqueue: workqueue for the RPU remoteproc
> + * @ipi_base: virt ptr to IPI channel address registers for APU
> + * @rpu_mode: RPU core configuration
> + * @rpu_id: RPU CPU id
> + * @rpu_pnode_id: RPU CPU power domain id
> + * @mem_pools: list of gen_pool for firmware mmio_sram memory and their
> + * power domain IDs
mem_pools is not a member of the struct.
> + * @mems: list of rproc_mem_entries for firmware
Please reorder to match struct.
> + * @irq: IRQ number
> + * @ipi_dest_mask: IPI destination mask for the IPI channel
> + */
> +struct zynqmp_r5_rproc_pdata {
> + struct rproc *rproc;
> + struct work_struct workqueue;
This is the work object, not the work queue. Please update naming
("work" is a common choice to this).
> + void __iomem *ipi_base;
> + enum rpu_oper_mode rpu_mode;
> + struct list_head mems;
Consider renaming to mem_entries.
> + u32 ipi_dest_mask;
> + u32 rpu_id;
> + u32 rpu_pnode_id;
> + int irq;
> + u32 tcm_pnode_id[MAX_TCM_PNODES];
> +};
> +
> +/**
> + * r5_boot_addr_config - configure the boot address of R5
Add () on the function name in kerneldoc.
> + * @pdata: platform data
> + * @bootmem: boot from LOVEC or HIVEC
> + *
> + * This function will set the RPU boot address
> + */
> +static void r5_boot_addr_config(struct zynqmp_r5_rproc_pdata *pdata,
> + enum rpu_boot_mem bootmem)
> +{
> + const struct zynqmp_eemi_ops *eemi = zynqmp_pm_get_eemi_ops();
I presume this will return the same eemi as when it was called right
before in zynqmp_r5_rproc_start(). How about passing eemi from the
caller?
> +
> + pr_debug("%s: R5 ID: %d, boot_dev %d\n",
> + __func__, pdata->rpu_id, bootmem);
> +
> + if (!eemi || !eemi->ioctl) {
If eemi is NULL zynqmp_r5_rproc_start() already aborted. How about
making zynqmp_r5_rproc_start() also check to see that eemi->ioctl is
non-NULL? and then just skip this check.
> + pr_err("%s: no eemi ioctl operation.\n", __func__);
> + return;
> + }
> + eemi->ioctl(pdata->rpu_pnode_id, IOCTL_RPU_BOOT_ADDR_CONFIG,
> + bootmem, 0, NULL);
> +}
> +
> +/**
> + * r5_mode_config - configure R5 operation mode
> + * @pdata: platform data
> + *
> + * configure R5 to split mode or lockstep mode
> + * based on the platform data.
> + */
> +static void r5_mode_config(struct zynqmp_r5_rproc_pdata *pdata)
> +{
> + const struct zynqmp_eemi_ops *eemi = zynqmp_pm_get_eemi_ops();
Same comments as for r5_boot_addr_config()
> +
> + pr_debug("%s: mode: %d\n", __func__, pdata->rpu_mode);
> +
> + if (!eemi || !eemi->ioctl) {
> +
RE: [PATCH 6/7] remoteproc: Add Xilinx ZynqMP R5 remoteproc
> -Original Message- > From: Jiaying Liang > Sent: Tuesday, September 11, 2018 12:10 AM > To: Loic PALLARDY ; o...@wizery.com; > bjorn.anders...@linaro.org; Michal Simek ; > robh...@kernel.org; mark.rutl...@arm.com; Rajan Vaja > ; Jolly Shah > Cc: linux-remotep...@vger.kernel.org; linux-arm- > ker...@lists.infradead.org; devicet...@vger.kernel.org; linux- > ker...@vger.kernel.org > Subject: RE: [PATCH 6/7] remoteproc: Add Xilinx ZynqMP R5 remoteproc > > > > > -Original Message- > > From: Loic PALLARDY [mailto:loic.palla...@st.com] > > Sent: Monday, September 10, 2018 1:25 PM > > To: Jiaying Liang ; o...@wizery.com; > > bjorn.anders...@linaro.org; Michal Simek ; > > robh...@kernel.org; mark.rutl...@arm.com; Rajan Vaja > > ; Jolly Shah > > Cc: linux-remotep...@vger.kernel.org; linux-arm- > ker...@lists.infradead.org; > > devicet...@vger.kernel.org; linux-kernel@vger.kernel.org; Jiaying Liang > > > > Subject: RE: [PATCH 6/7] remoteproc: Add Xilinx ZynqMP R5 remoteproc > > > > Hi Wendy, > > Please find below few comments. > > > > > -Original Message- > > > From: linux-remoteproc-ow...@vger.kernel.org > > ow...@vger.kernel.org> On Behalf Of Wendy Liang > > > Sent: Thursday, August 16, 2018 9:06 AM > > > To: o...@wizery.com; bjorn.anders...@linaro.org; > > > michal.si...@xilinx.com; robh...@kernel.org; mark.rutl...@arm.com; > > > rajan.v...@xilinx.com; jol...@xilinx.com > > > Cc: linux-remotep...@vger.kernel.org; linux-arm- > > > ker...@lists.infradead.org; devicet...@vger.kernel.org; linux- > > > ker...@vger.kernel.org; Wendy Liang > > > Subject: [PATCH 6/7] remoteproc: Add Xilinx ZynqMP R5 remoteproc > > > > > > There are cortex-r5 processors in Xilinx Zynq UltraScale+ MPSoC > > > platforms. This remoteproc driver is to manage the > > > R5 processors. > > > > > > Signed-off-by: Wendy Liang > > > > Jason Wu' signed-off-by missing as he is mentioned as author of this > driver? > [Wendy] He was the one who wrote the init version of the driver. > But he left the company a few years ago. In this case, maybe I should remove > Module author. As you want, but look strange for a new driver that author is not in CC or signed-off. Maybe you are the main author now... > > > > > --- > > > drivers/remoteproc/Kconfig| 9 + > > > drivers/remoteproc/Makefile | 1 + > > > drivers/remoteproc/zynqmp_r5_remoteproc.c | 692 > > > ++ > > > 3 files changed, 702 insertions(+) > > > create mode 100644 drivers/remoteproc/zynqmp_r5_remoteproc.c > > > > > > diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig > > > index cd1c168..83aac63 100644 > > > --- a/drivers/remoteproc/Kconfig > > > +++ b/drivers/remoteproc/Kconfig > > > @@ -158,6 +158,15 @@ config ST_REMOTEPROC config > > ST_SLIM_REMOTEPROC > > > tristate > > > > > > +config ZYNQMP_R5_REMOTEPROC > > > + tristate "ZynqMP_r5 remoteproc support" > > > + depends on ARM64 && PM && ARCH_ZYNQMP > > > + select RPMSG_VIRTIO > > > + select ZYNQMP_FIRMWARE > > > + help > > > + Say y here to support ZynqMP R5 remote processors via the remote > > > + processor framework. > > > + > > > endif # REMOTEPROC > > > > > > endmenu > > > diff --git a/drivers/remoteproc/Makefile b/drivers/remoteproc/Makefile > > > index 02627ed..147923c 100644 > > > --- a/drivers/remoteproc/Makefile > > > +++ b/drivers/remoteproc/Makefile > > > @@ -23,3 +23,4 @@ qcom_wcnss_pil-y+= > > > qcom_wcnss.o > > > qcom_wcnss_pil-y += qcom_wcnss_iris.o > > > obj-$(CONFIG_ST_REMOTEPROC) += st_remoteproc.o > > > obj-$(CONFIG_ST_SLIM_REMOTEPROC) += st_slim_rproc.o > > > +obj-$(CONFIG_ZYNQMP_R5_REMOTEPROC) += > zynqmp_r5_remoteproc.o > > > diff --git a/drivers/remoteproc/zynqmp_r5_remoteproc.c > > > b/drivers/remoteproc/zynqmp_r5_remoteproc.c > > > new file mode 100644 > > > index 000..7fc3718 > > > --- /dev/null > > > +++ b/drivers/remoteproc/zynqmp_r5_remoteproc.c > > > @@ -0,0 +1,692 @@ > > > +// SPDX-License-Identifier: GPL-2.0 > > > +/* > > > + * Zynq R5 Remote Processor driver > > > + * > > > + * Copyright (C) 2015 Xilinx, Inc. > > > + * &g
RE: [PATCH 6/7] remoteproc: Add Xilinx ZynqMP R5 remoteproc
> -Original Message- > From: Jiaying Liang > Sent: Tuesday, September 11, 2018 12:10 AM > To: Loic PALLARDY ; o...@wizery.com; > bjorn.anders...@linaro.org; Michal Simek ; > robh...@kernel.org; mark.rutl...@arm.com; Rajan Vaja > ; Jolly Shah > Cc: linux-remotep...@vger.kernel.org; linux-arm- > ker...@lists.infradead.org; devicet...@vger.kernel.org; linux- > ker...@vger.kernel.org > Subject: RE: [PATCH 6/7] remoteproc: Add Xilinx ZynqMP R5 remoteproc > > > > > -Original Message- > > From: Loic PALLARDY [mailto:loic.palla...@st.com] > > Sent: Monday, September 10, 2018 1:25 PM > > To: Jiaying Liang ; o...@wizery.com; > > bjorn.anders...@linaro.org; Michal Simek ; > > robh...@kernel.org; mark.rutl...@arm.com; Rajan Vaja > > ; Jolly Shah > > Cc: linux-remotep...@vger.kernel.org; linux-arm- > ker...@lists.infradead.org; > > devicet...@vger.kernel.org; linux-kernel@vger.kernel.org; Jiaying Liang > > > > Subject: RE: [PATCH 6/7] remoteproc: Add Xilinx ZynqMP R5 remoteproc > > > > Hi Wendy, > > Please find below few comments. > > > > > -Original Message- > > > From: linux-remoteproc-ow...@vger.kernel.org > > ow...@vger.kernel.org> On Behalf Of Wendy Liang > > > Sent: Thursday, August 16, 2018 9:06 AM > > > To: o...@wizery.com; bjorn.anders...@linaro.org; > > > michal.si...@xilinx.com; robh...@kernel.org; mark.rutl...@arm.com; > > > rajan.v...@xilinx.com; jol...@xilinx.com > > > Cc: linux-remotep...@vger.kernel.org; linux-arm- > > > ker...@lists.infradead.org; devicet...@vger.kernel.org; linux- > > > ker...@vger.kernel.org; Wendy Liang > > > Subject: [PATCH 6/7] remoteproc: Add Xilinx ZynqMP R5 remoteproc > > > > > > There are cortex-r5 processors in Xilinx Zynq UltraScale+ MPSoC > > > platforms. This remoteproc driver is to manage the > > > R5 processors. > > > > > > Signed-off-by: Wendy Liang > > > > Jason Wu' signed-off-by missing as he is mentioned as author of this > driver? > [Wendy] He was the one who wrote the init version of the driver. > But he left the company a few years ago. In this case, maybe I should remove > Module author. As you want, but look strange for a new driver that author is not in CC or signed-off. Maybe you are the main author now... > > > > > --- > > > drivers/remoteproc/Kconfig| 9 + > > > drivers/remoteproc/Makefile | 1 + > > > drivers/remoteproc/zynqmp_r5_remoteproc.c | 692 > > > ++ > > > 3 files changed, 702 insertions(+) > > > create mode 100644 drivers/remoteproc/zynqmp_r5_remoteproc.c > > > > > > diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig > > > index cd1c168..83aac63 100644 > > > --- a/drivers/remoteproc/Kconfig > > > +++ b/drivers/remoteproc/Kconfig > > > @@ -158,6 +158,15 @@ config ST_REMOTEPROC config > > ST_SLIM_REMOTEPROC > > > tristate > > > > > > +config ZYNQMP_R5_REMOTEPROC > > > + tristate "ZynqMP_r5 remoteproc support" > > > + depends on ARM64 && PM && ARCH_ZYNQMP > > > + select RPMSG_VIRTIO > > > + select ZYNQMP_FIRMWARE > > > + help > > > + Say y here to support ZynqMP R5 remote processors via the remote > > > + processor framework. > > > + > > > endif # REMOTEPROC > > > > > > endmenu > > > diff --git a/drivers/remoteproc/Makefile b/drivers/remoteproc/Makefile > > > index 02627ed..147923c 100644 > > > --- a/drivers/remoteproc/Makefile > > > +++ b/drivers/remoteproc/Makefile > > > @@ -23,3 +23,4 @@ qcom_wcnss_pil-y+= > > > qcom_wcnss.o > > > qcom_wcnss_pil-y += qcom_wcnss_iris.o > > > obj-$(CONFIG_ST_REMOTEPROC) += st_remoteproc.o > > > obj-$(CONFIG_ST_SLIM_REMOTEPROC) += st_slim_rproc.o > > > +obj-$(CONFIG_ZYNQMP_R5_REMOTEPROC) += > zynqmp_r5_remoteproc.o > > > diff --git a/drivers/remoteproc/zynqmp_r5_remoteproc.c > > > b/drivers/remoteproc/zynqmp_r5_remoteproc.c > > > new file mode 100644 > > > index 000..7fc3718 > > > --- /dev/null > > > +++ b/drivers/remoteproc/zynqmp_r5_remoteproc.c > > > @@ -0,0 +1,692 @@ > > > +// SPDX-License-Identifier: GPL-2.0 > > > +/* > > > + * Zynq R5 Remote Processor driver > > > + * > > > + * Copyright (C) 2015 Xilinx, Inc. > > > + * &g
RE: [PATCH 6/7] remoteproc: Add Xilinx ZynqMP R5 remoteproc
> -Original Message- > From: Loic PALLARDY [mailto:loic.palla...@st.com] > Sent: Monday, September 10, 2018 1:25 PM > To: Jiaying Liang ; o...@wizery.com; > bjorn.anders...@linaro.org; Michal Simek ; > robh...@kernel.org; mark.rutl...@arm.com; Rajan Vaja > ; Jolly Shah > Cc: linux-remotep...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; > devicet...@vger.kernel.org; linux-kernel@vger.kernel.org; Jiaying Liang > > Subject: RE: [PATCH 6/7] remoteproc: Add Xilinx ZynqMP R5 remoteproc > > Hi Wendy, > Please find below few comments. > > > -Original Message- > > From: linux-remoteproc-ow...@vger.kernel.org > ow...@vger.kernel.org> On Behalf Of Wendy Liang > > Sent: Thursday, August 16, 2018 9:06 AM > > To: o...@wizery.com; bjorn.anders...@linaro.org; > > michal.si...@xilinx.com; robh...@kernel.org; mark.rutl...@arm.com; > > rajan.v...@xilinx.com; jol...@xilinx.com > > Cc: linux-remotep...@vger.kernel.org; linux-arm- > > ker...@lists.infradead.org; devicet...@vger.kernel.org; linux- > > ker...@vger.kernel.org; Wendy Liang > > Subject: [PATCH 6/7] remoteproc: Add Xilinx ZynqMP R5 remoteproc > > > > There are cortex-r5 processors in Xilinx Zynq UltraScale+ MPSoC > > platforms. This remoteproc driver is to manage the > > R5 processors. > > > > Signed-off-by: Wendy Liang > > Jason Wu' signed-off-by missing as he is mentioned as author of this driver? [Wendy] He was the one who wrote the init version of the driver. But he left the company a few years ago. In this case, maybe I should remove Module author. > > > --- > > drivers/remoteproc/Kconfig| 9 + > > drivers/remoteproc/Makefile | 1 + > > drivers/remoteproc/zynqmp_r5_remoteproc.c | 692 > > ++ > > 3 files changed, 702 insertions(+) > > create mode 100644 drivers/remoteproc/zynqmp_r5_remoteproc.c > > > > diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig > > index cd1c168..83aac63 100644 > > --- a/drivers/remoteproc/Kconfig > > +++ b/drivers/remoteproc/Kconfig > > @@ -158,6 +158,15 @@ config ST_REMOTEPROC config > ST_SLIM_REMOTEPROC > > tristate > > > > +config ZYNQMP_R5_REMOTEPROC > > + tristate "ZynqMP_r5 remoteproc support" > > + depends on ARM64 && PM && ARCH_ZYNQMP > > + select RPMSG_VIRTIO > > + select ZYNQMP_FIRMWARE > > + help > > + Say y here to support ZynqMP R5 remote processors via the remote > > + processor framework. > > + > > endif # REMOTEPROC > > > > endmenu > > diff --git a/drivers/remoteproc/Makefile b/drivers/remoteproc/Makefile > > index 02627ed..147923c 100644 > > --- a/drivers/remoteproc/Makefile > > +++ b/drivers/remoteproc/Makefile > > @@ -23,3 +23,4 @@ qcom_wcnss_pil-y += > > qcom_wcnss.o > > qcom_wcnss_pil-y += qcom_wcnss_iris.o > > obj-$(CONFIG_ST_REMOTEPROC)+= st_remoteproc.o > > obj-$(CONFIG_ST_SLIM_REMOTEPROC) += st_slim_rproc.o > > +obj-$(CONFIG_ZYNQMP_R5_REMOTEPROC) += zynqmp_r5_remoteproc.o > > diff --git a/drivers/remoteproc/zynqmp_r5_remoteproc.c > > b/drivers/remoteproc/zynqmp_r5_remoteproc.c > > new file mode 100644 > > index 000..7fc3718 > > --- /dev/null > > +++ b/drivers/remoteproc/zynqmp_r5_remoteproc.c > > @@ -0,0 +1,692 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > +/* > > + * Zynq R5 Remote Processor driver > > + * > > + * Copyright (C) 2015 Xilinx, Inc. > > + * > > + */ > > + > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > Includes to be classified in alphabetical order [Wendy] Will do in the next version > > > + > > +#include "remoteproc_internal.h" > > + > > +/* IPI reg offsets */ > > +#define TRIG_OFFSET0x > > +#define OBS_OFFSET 0x0004 > > +#define ISR_OFFSET 0x0010 > > +#define IMR_OFFSET 0x0014 > > +#define IER_OFFSET 0x0018 > > +#define IDR_OFFSET 0x001C > > +#define IPI_ALL_MASK 0x0F0F0301 > > + > > +/* RPU IPI mask */ > > +#define RPU_IPI_INIT_MASK 0x0100 > > +#
RE: [PATCH 6/7] remoteproc: Add Xilinx ZynqMP R5 remoteproc
> -Original Message- > From: Loic PALLARDY [mailto:loic.palla...@st.com] > Sent: Monday, September 10, 2018 1:25 PM > To: Jiaying Liang ; o...@wizery.com; > bjorn.anders...@linaro.org; Michal Simek ; > robh...@kernel.org; mark.rutl...@arm.com; Rajan Vaja > ; Jolly Shah > Cc: linux-remotep...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; > devicet...@vger.kernel.org; linux-kernel@vger.kernel.org; Jiaying Liang > > Subject: RE: [PATCH 6/7] remoteproc: Add Xilinx ZynqMP R5 remoteproc > > Hi Wendy, > Please find below few comments. > > > -Original Message- > > From: linux-remoteproc-ow...@vger.kernel.org > ow...@vger.kernel.org> On Behalf Of Wendy Liang > > Sent: Thursday, August 16, 2018 9:06 AM > > To: o...@wizery.com; bjorn.anders...@linaro.org; > > michal.si...@xilinx.com; robh...@kernel.org; mark.rutl...@arm.com; > > rajan.v...@xilinx.com; jol...@xilinx.com > > Cc: linux-remotep...@vger.kernel.org; linux-arm- > > ker...@lists.infradead.org; devicet...@vger.kernel.org; linux- > > ker...@vger.kernel.org; Wendy Liang > > Subject: [PATCH 6/7] remoteproc: Add Xilinx ZynqMP R5 remoteproc > > > > There are cortex-r5 processors in Xilinx Zynq UltraScale+ MPSoC > > platforms. This remoteproc driver is to manage the > > R5 processors. > > > > Signed-off-by: Wendy Liang > > Jason Wu' signed-off-by missing as he is mentioned as author of this driver? [Wendy] He was the one who wrote the init version of the driver. But he left the company a few years ago. In this case, maybe I should remove Module author. > > > --- > > drivers/remoteproc/Kconfig| 9 + > > drivers/remoteproc/Makefile | 1 + > > drivers/remoteproc/zynqmp_r5_remoteproc.c | 692 > > ++ > > 3 files changed, 702 insertions(+) > > create mode 100644 drivers/remoteproc/zynqmp_r5_remoteproc.c > > > > diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig > > index cd1c168..83aac63 100644 > > --- a/drivers/remoteproc/Kconfig > > +++ b/drivers/remoteproc/Kconfig > > @@ -158,6 +158,15 @@ config ST_REMOTEPROC config > ST_SLIM_REMOTEPROC > > tristate > > > > +config ZYNQMP_R5_REMOTEPROC > > + tristate "ZynqMP_r5 remoteproc support" > > + depends on ARM64 && PM && ARCH_ZYNQMP > > + select RPMSG_VIRTIO > > + select ZYNQMP_FIRMWARE > > + help > > + Say y here to support ZynqMP R5 remote processors via the remote > > + processor framework. > > + > > endif # REMOTEPROC > > > > endmenu > > diff --git a/drivers/remoteproc/Makefile b/drivers/remoteproc/Makefile > > index 02627ed..147923c 100644 > > --- a/drivers/remoteproc/Makefile > > +++ b/drivers/remoteproc/Makefile > > @@ -23,3 +23,4 @@ qcom_wcnss_pil-y += > > qcom_wcnss.o > > qcom_wcnss_pil-y += qcom_wcnss_iris.o > > obj-$(CONFIG_ST_REMOTEPROC)+= st_remoteproc.o > > obj-$(CONFIG_ST_SLIM_REMOTEPROC) += st_slim_rproc.o > > +obj-$(CONFIG_ZYNQMP_R5_REMOTEPROC) += zynqmp_r5_remoteproc.o > > diff --git a/drivers/remoteproc/zynqmp_r5_remoteproc.c > > b/drivers/remoteproc/zynqmp_r5_remoteproc.c > > new file mode 100644 > > index 000..7fc3718 > > --- /dev/null > > +++ b/drivers/remoteproc/zynqmp_r5_remoteproc.c > > @@ -0,0 +1,692 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > +/* > > + * Zynq R5 Remote Processor driver > > + * > > + * Copyright (C) 2015 Xilinx, Inc. > > + * > > + */ > > + > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > Includes to be classified in alphabetical order [Wendy] Will do in the next version > > > + > > +#include "remoteproc_internal.h" > > + > > +/* IPI reg offsets */ > > +#define TRIG_OFFSET0x > > +#define OBS_OFFSET 0x0004 > > +#define ISR_OFFSET 0x0010 > > +#define IMR_OFFSET 0x0014 > > +#define IER_OFFSET 0x0018 > > +#define IDR_OFFSET 0x001C > > +#define IPI_ALL_MASK 0x0F0F0301 > > + > > +/* RPU IPI mask */ > > +#define RPU_IPI_INIT_MASK 0x0100 > > +#
RE: [PATCH 6/7] remoteproc: Add Xilinx ZynqMP R5 remoteproc
Hi Wendy,
Please find below few comments.
> -Original Message-
> From: linux-remoteproc-ow...@vger.kernel.org ow...@vger.kernel.org> On Behalf Of Wendy Liang
> Sent: Thursday, August 16, 2018 9:06 AM
> To: o...@wizery.com; bjorn.anders...@linaro.org;
> michal.si...@xilinx.com; robh...@kernel.org; mark.rutl...@arm.com;
> rajan.v...@xilinx.com; jol...@xilinx.com
> Cc: linux-remotep...@vger.kernel.org; linux-arm-
> ker...@lists.infradead.org; devicet...@vger.kernel.org; linux-
> ker...@vger.kernel.org; Wendy Liang
> Subject: [PATCH 6/7] remoteproc: Add Xilinx ZynqMP R5 remoteproc
>
> There are cortex-r5 processors in Xilinx Zynq UltraScale+
> MPSoC platforms. This remoteproc driver is to manage the
> R5 processors.
>
> Signed-off-by: Wendy Liang
Jason Wu' signed-off-by missing as he is mentioned as author of this driver?
> ---
> drivers/remoteproc/Kconfig| 9 +
> drivers/remoteproc/Makefile | 1 +
> drivers/remoteproc/zynqmp_r5_remoteproc.c | 692
> ++
> 3 files changed, 702 insertions(+)
> create mode 100644 drivers/remoteproc/zynqmp_r5_remoteproc.c
>
> diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig
> index cd1c168..83aac63 100644
> --- a/drivers/remoteproc/Kconfig
> +++ b/drivers/remoteproc/Kconfig
> @@ -158,6 +158,15 @@ config ST_REMOTEPROC
> config ST_SLIM_REMOTEPROC
> tristate
>
> +config ZYNQMP_R5_REMOTEPROC
> + tristate "ZynqMP_r5 remoteproc support"
> + depends on ARM64 && PM && ARCH_ZYNQMP
> + select RPMSG_VIRTIO
> + select ZYNQMP_FIRMWARE
> + help
> + Say y here to support ZynqMP R5 remote processors via the remote
> + processor framework.
> +
> endif # REMOTEPROC
>
> endmenu
> diff --git a/drivers/remoteproc/Makefile b/drivers/remoteproc/Makefile
> index 02627ed..147923c 100644
> --- a/drivers/remoteproc/Makefile
> +++ b/drivers/remoteproc/Makefile
> @@ -23,3 +23,4 @@ qcom_wcnss_pil-y+=
> qcom_wcnss.o
> qcom_wcnss_pil-y += qcom_wcnss_iris.o
> obj-$(CONFIG_ST_REMOTEPROC) += st_remoteproc.o
> obj-$(CONFIG_ST_SLIM_REMOTEPROC) += st_slim_rproc.o
> +obj-$(CONFIG_ZYNQMP_R5_REMOTEPROC) += zynqmp_r5_remoteproc.o
> diff --git a/drivers/remoteproc/zynqmp_r5_remoteproc.c
> b/drivers/remoteproc/zynqmp_r5_remoteproc.c
> new file mode 100644
> index 000..7fc3718
> --- /dev/null
> +++ b/drivers/remoteproc/zynqmp_r5_remoteproc.c
> @@ -0,0 +1,692 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Zynq R5 Remote Processor driver
> + *
> + * Copyright (C) 2015 Xilinx, Inc.
> + *
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
Includes to be classified in alphabetical order
> +
> +#include "remoteproc_internal.h"
> +
> +/* IPI reg offsets */
> +#define TRIG_OFFSET 0x
> +#define OBS_OFFSET 0x0004
> +#define ISR_OFFSET 0x0010
> +#define IMR_OFFSET 0x0014
> +#define IER_OFFSET 0x0018
> +#define IDR_OFFSET 0x001C
> +#define IPI_ALL_MASK 0x0F0F0301
> +
> +/* RPU IPI mask */
> +#define RPU_IPI_INIT_MASK0x0100
> +#define RPU_IPI_MASK(n) (RPU_IPI_INIT_MASK << (n))
> +#define RPU_0_IPI_MASK RPU_IPI_MASK(0)
> +#define RPU_1_IPI_MASK RPU_IPI_MASK(1)
> +
> +/* PM proc states */
> +#define PM_PROC_STATE_ACTIVE 1u
> +
> +/* Maximum TCM power nodes IDs */
> +#define MAX_TCM_PNODES 4
> +
> +/* Register access macros */
> +#define reg_read(base, reg) \
> + readl(((void __iomem *)(base)) + (reg))
> +#define reg_write(base, reg, val) \
> + writel((val), ((void __iomem *)(base)) + (reg))
> +
> +#define DEFAULT_FIRMWARE_NAME"rproc-rpu-fw"
> +
> +static bool autoboot __read_mostly;
> +
> +struct zynqmp_r5_rproc_pdata;
This definition is not needed as complete definition just below.
> +
> +/**
> + * struct zynqmp_r5_rproc_pdata - zynqmp rpu remote processor instance
> state
> + * @rproc: rproc handle
> + * @workqueue: workqueue for the RPU remoteproc
> + * @ipi_base: virt ptr to IPI channel address registers for APU
> + * @rpu_mode: RPU core configuration
> + * @rpu_id: RPU CPU id
> + * @rpu_pnode_id: RPU CPU power domain id
> + * @mem_pools: list of gen_pool for firmware mmio_sram memory and
> their
> + * power domain IDs
> + * @mems: list of rproc_mem_entries for firmware
> + * @irq: IRQ number
> + * @ipi_dest_mask: IPI destination mask for the IPI channel
> + */
> +struct zynqmp_r5_rproc_pdata {
> + struct rproc *rproc;
> + struct work_struct workqueue;
> + void __iomem *ipi_base;
> + enum rpu_oper_mode rpu_mode;
> + struct list_head mems;
> + u32 ipi_dest_mask;
> + u32 rpu_id;
> + u32 rpu_pnode_id;
> + int irq;
> +
RE: [PATCH 6/7] remoteproc: Add Xilinx ZynqMP R5 remoteproc
Hi Wendy,
Please find below few comments.
> -Original Message-
> From: linux-remoteproc-ow...@vger.kernel.org ow...@vger.kernel.org> On Behalf Of Wendy Liang
> Sent: Thursday, August 16, 2018 9:06 AM
> To: o...@wizery.com; bjorn.anders...@linaro.org;
> michal.si...@xilinx.com; robh...@kernel.org; mark.rutl...@arm.com;
> rajan.v...@xilinx.com; jol...@xilinx.com
> Cc: linux-remotep...@vger.kernel.org; linux-arm-
> ker...@lists.infradead.org; devicet...@vger.kernel.org; linux-
> ker...@vger.kernel.org; Wendy Liang
> Subject: [PATCH 6/7] remoteproc: Add Xilinx ZynqMP R5 remoteproc
>
> There are cortex-r5 processors in Xilinx Zynq UltraScale+
> MPSoC platforms. This remoteproc driver is to manage the
> R5 processors.
>
> Signed-off-by: Wendy Liang
Jason Wu' signed-off-by missing as he is mentioned as author of this driver?
> ---
> drivers/remoteproc/Kconfig| 9 +
> drivers/remoteproc/Makefile | 1 +
> drivers/remoteproc/zynqmp_r5_remoteproc.c | 692
> ++
> 3 files changed, 702 insertions(+)
> create mode 100644 drivers/remoteproc/zynqmp_r5_remoteproc.c
>
> diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig
> index cd1c168..83aac63 100644
> --- a/drivers/remoteproc/Kconfig
> +++ b/drivers/remoteproc/Kconfig
> @@ -158,6 +158,15 @@ config ST_REMOTEPROC
> config ST_SLIM_REMOTEPROC
> tristate
>
> +config ZYNQMP_R5_REMOTEPROC
> + tristate "ZynqMP_r5 remoteproc support"
> + depends on ARM64 && PM && ARCH_ZYNQMP
> + select RPMSG_VIRTIO
> + select ZYNQMP_FIRMWARE
> + help
> + Say y here to support ZynqMP R5 remote processors via the remote
> + processor framework.
> +
> endif # REMOTEPROC
>
> endmenu
> diff --git a/drivers/remoteproc/Makefile b/drivers/remoteproc/Makefile
> index 02627ed..147923c 100644
> --- a/drivers/remoteproc/Makefile
> +++ b/drivers/remoteproc/Makefile
> @@ -23,3 +23,4 @@ qcom_wcnss_pil-y+=
> qcom_wcnss.o
> qcom_wcnss_pil-y += qcom_wcnss_iris.o
> obj-$(CONFIG_ST_REMOTEPROC) += st_remoteproc.o
> obj-$(CONFIG_ST_SLIM_REMOTEPROC) += st_slim_rproc.o
> +obj-$(CONFIG_ZYNQMP_R5_REMOTEPROC) += zynqmp_r5_remoteproc.o
> diff --git a/drivers/remoteproc/zynqmp_r5_remoteproc.c
> b/drivers/remoteproc/zynqmp_r5_remoteproc.c
> new file mode 100644
> index 000..7fc3718
> --- /dev/null
> +++ b/drivers/remoteproc/zynqmp_r5_remoteproc.c
> @@ -0,0 +1,692 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Zynq R5 Remote Processor driver
> + *
> + * Copyright (C) 2015 Xilinx, Inc.
> + *
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
Includes to be classified in alphabetical order
> +
> +#include "remoteproc_internal.h"
> +
> +/* IPI reg offsets */
> +#define TRIG_OFFSET 0x
> +#define OBS_OFFSET 0x0004
> +#define ISR_OFFSET 0x0010
> +#define IMR_OFFSET 0x0014
> +#define IER_OFFSET 0x0018
> +#define IDR_OFFSET 0x001C
> +#define IPI_ALL_MASK 0x0F0F0301
> +
> +/* RPU IPI mask */
> +#define RPU_IPI_INIT_MASK0x0100
> +#define RPU_IPI_MASK(n) (RPU_IPI_INIT_MASK << (n))
> +#define RPU_0_IPI_MASK RPU_IPI_MASK(0)
> +#define RPU_1_IPI_MASK RPU_IPI_MASK(1)
> +
> +/* PM proc states */
> +#define PM_PROC_STATE_ACTIVE 1u
> +
> +/* Maximum TCM power nodes IDs */
> +#define MAX_TCM_PNODES 4
> +
> +/* Register access macros */
> +#define reg_read(base, reg) \
> + readl(((void __iomem *)(base)) + (reg))
> +#define reg_write(base, reg, val) \
> + writel((val), ((void __iomem *)(base)) + (reg))
> +
> +#define DEFAULT_FIRMWARE_NAME"rproc-rpu-fw"
> +
> +static bool autoboot __read_mostly;
> +
> +struct zynqmp_r5_rproc_pdata;
This definition is not needed as complete definition just below.
> +
> +/**
> + * struct zynqmp_r5_rproc_pdata - zynqmp rpu remote processor instance
> state
> + * @rproc: rproc handle
> + * @workqueue: workqueue for the RPU remoteproc
> + * @ipi_base: virt ptr to IPI channel address registers for APU
> + * @rpu_mode: RPU core configuration
> + * @rpu_id: RPU CPU id
> + * @rpu_pnode_id: RPU CPU power domain id
> + * @mem_pools: list of gen_pool for firmware mmio_sram memory and
> their
> + * power domain IDs
> + * @mems: list of rproc_mem_entries for firmware
> + * @irq: IRQ number
> + * @ipi_dest_mask: IPI destination mask for the IPI channel
> + */
> +struct zynqmp_r5_rproc_pdata {
> + struct rproc *rproc;
> + struct work_struct workqueue;
> + void __iomem *ipi_base;
> + enum rpu_oper_mode rpu_mode;
> + struct list_head mems;
> + u32 ipi_dest_mask;
> + u32 rpu_id;
> + u32 rpu_pnode_id;
> + int irq;
> +
Re: [PATCH 6/7] remoteproc: Add Xilinx ZynqMP R5 remoteproc
On Fri, Aug 24, 2018 at 9:26 AM Wendy Liang wrote:
>
> Ping, any comments to the driver?
Any comments to this driver?
Thanks,
Wendy
> On Thu, Aug 16, 2018 at 3:17 AM Wendy Liang wrote:
> >
> > There are cortex-r5 processors in Xilinx Zynq UltraScale+
> > MPSoC platforms. This remoteproc driver is to manage the
> > R5 processors.
> >
> > Signed-off-by: Wendy Liang
> > ---
> > drivers/remoteproc/Kconfig| 9 +
> > drivers/remoteproc/Makefile | 1 +
> > drivers/remoteproc/zynqmp_r5_remoteproc.c | 692
> > ++
> > 3 files changed, 702 insertions(+)
> > create mode 100644 drivers/remoteproc/zynqmp_r5_remoteproc.c
> >
> > diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig
> > index cd1c168..83aac63 100644
> > --- a/drivers/remoteproc/Kconfig
> > +++ b/drivers/remoteproc/Kconfig
> > @@ -158,6 +158,15 @@ config ST_REMOTEPROC
> > config ST_SLIM_REMOTEPROC
> > tristate
> >
> > +config ZYNQMP_R5_REMOTEPROC
> > + tristate "ZynqMP_r5 remoteproc support"
> > + depends on ARM64 && PM && ARCH_ZYNQMP
> > + select RPMSG_VIRTIO
> > + select ZYNQMP_FIRMWARE
> > + help
> > + Say y here to support ZynqMP R5 remote processors via the remote
> > + processor framework.
> > +
> > endif # REMOTEPROC
> >
> > endmenu
> > diff --git a/drivers/remoteproc/Makefile b/drivers/remoteproc/Makefile
> > index 02627ed..147923c 100644
> > --- a/drivers/remoteproc/Makefile
> > +++ b/drivers/remoteproc/Makefile
> > @@ -23,3 +23,4 @@ qcom_wcnss_pil-y += qcom_wcnss.o
> > qcom_wcnss_pil-y += qcom_wcnss_iris.o
> > obj-$(CONFIG_ST_REMOTEPROC)+= st_remoteproc.o
> > obj-$(CONFIG_ST_SLIM_REMOTEPROC) += st_slim_rproc.o
> > +obj-$(CONFIG_ZYNQMP_R5_REMOTEPROC) += zynqmp_r5_remoteproc.o
> > diff --git a/drivers/remoteproc/zynqmp_r5_remoteproc.c
> > b/drivers/remoteproc/zynqmp_r5_remoteproc.c
> > new file mode 100644
> > index 000..7fc3718
> > --- /dev/null
> > +++ b/drivers/remoteproc/zynqmp_r5_remoteproc.c
> > @@ -0,0 +1,692 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Zynq R5 Remote Processor driver
> > + *
> > + * Copyright (C) 2015 Xilinx, Inc.
> > + *
> > + */
> > +
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +
> > +#include "remoteproc_internal.h"
> > +
> > +/* IPI reg offsets */
> > +#define TRIG_OFFSET0x
> > +#define OBS_OFFSET 0x0004
> > +#define ISR_OFFSET 0x0010
> > +#define IMR_OFFSET 0x0014
> > +#define IER_OFFSET 0x0018
> > +#define IDR_OFFSET 0x001C
> > +#define IPI_ALL_MASK 0x0F0F0301
> > +
> > +/* RPU IPI mask */
> > +#define RPU_IPI_INIT_MASK 0x0100
> > +#define RPU_IPI_MASK(n)(RPU_IPI_INIT_MASK << (n))
> > +#define RPU_0_IPI_MASK RPU_IPI_MASK(0)
> > +#define RPU_1_IPI_MASK RPU_IPI_MASK(1)
> > +
> > +/* PM proc states */
> > +#define PM_PROC_STATE_ACTIVE 1u
> > +
> > +/* Maximum TCM power nodes IDs */
> > +#define MAX_TCM_PNODES 4
> > +
> > +/* Register access macros */
> > +#define reg_read(base, reg) \
> > + readl(((void __iomem *)(base)) + (reg))
> > +#define reg_write(base, reg, val) \
> > + writel((val), ((void __iomem *)(base)) + (reg))
> > +
> > +#define DEFAULT_FIRMWARE_NAME "rproc-rpu-fw"
> > +
> > +static bool autoboot __read_mostly;
> > +
> > +struct zynqmp_r5_rproc_pdata;
> > +
> > +/**
> > + * struct zynqmp_r5_rproc_pdata - zynqmp rpu remote processor instance
> > state
> > + * @rproc: rproc handle
> > + * @workqueue: workqueue for the RPU remoteproc
> > + * @ipi_base: virt ptr to IPI channel address registers for APU
> > + * @rpu_mode: RPU core configuration
> > + * @rpu_id: RPU CPU id
> > + * @rpu_pnode_id: RPU CPU power domain id
> > + * @mem_pools: list of gen_pool for firmware mmio_sram memory and their
> > + * power domain IDs
> > + * @mems: list of rproc_mem_entries for firmware
> > + * @irq: IRQ number
> > + * @ipi_dest_mask: IPI destination mask for the IPI channel
> > + */
> > +struct zynqmp_r5_rproc_pdata {
> > + struct rproc *rproc;
> > + struct work_struct workqueue;
> > + void __iomem *ipi_base;
> > + enum rpu_oper_mode rpu_mode;
> > + struct list_head mems;
> > + u32 ipi_dest_mask;
> > + u32 rpu_id;
> > + u32 rpu_pnode_id;
> > + int irq;
> > + u32 tcm_pnode_id[MAX_TCM_PNODES];
> > +};
> > +
> > +/**
> > + * r5_boot_addr_config - configure the boot address of R5
> > + * @pdata: platform data
> > + * @bootmem: boot from LOVEC or HIVEC
> > + *
> > + * This function will set the RPU boot address
> > + */
> > +static
Re: [PATCH 6/7] remoteproc: Add Xilinx ZynqMP R5 remoteproc
On Fri, Aug 24, 2018 at 9:26 AM Wendy Liang wrote:
>
> Ping, any comments to the driver?
Any comments to this driver?
Thanks,
Wendy
> On Thu, Aug 16, 2018 at 3:17 AM Wendy Liang wrote:
> >
> > There are cortex-r5 processors in Xilinx Zynq UltraScale+
> > MPSoC platforms. This remoteproc driver is to manage the
> > R5 processors.
> >
> > Signed-off-by: Wendy Liang
> > ---
> > drivers/remoteproc/Kconfig| 9 +
> > drivers/remoteproc/Makefile | 1 +
> > drivers/remoteproc/zynqmp_r5_remoteproc.c | 692
> > ++
> > 3 files changed, 702 insertions(+)
> > create mode 100644 drivers/remoteproc/zynqmp_r5_remoteproc.c
> >
> > diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig
> > index cd1c168..83aac63 100644
> > --- a/drivers/remoteproc/Kconfig
> > +++ b/drivers/remoteproc/Kconfig
> > @@ -158,6 +158,15 @@ config ST_REMOTEPROC
> > config ST_SLIM_REMOTEPROC
> > tristate
> >
> > +config ZYNQMP_R5_REMOTEPROC
> > + tristate "ZynqMP_r5 remoteproc support"
> > + depends on ARM64 && PM && ARCH_ZYNQMP
> > + select RPMSG_VIRTIO
> > + select ZYNQMP_FIRMWARE
> > + help
> > + Say y here to support ZynqMP R5 remote processors via the remote
> > + processor framework.
> > +
> > endif # REMOTEPROC
> >
> > endmenu
> > diff --git a/drivers/remoteproc/Makefile b/drivers/remoteproc/Makefile
> > index 02627ed..147923c 100644
> > --- a/drivers/remoteproc/Makefile
> > +++ b/drivers/remoteproc/Makefile
> > @@ -23,3 +23,4 @@ qcom_wcnss_pil-y += qcom_wcnss.o
> > qcom_wcnss_pil-y += qcom_wcnss_iris.o
> > obj-$(CONFIG_ST_REMOTEPROC)+= st_remoteproc.o
> > obj-$(CONFIG_ST_SLIM_REMOTEPROC) += st_slim_rproc.o
> > +obj-$(CONFIG_ZYNQMP_R5_REMOTEPROC) += zynqmp_r5_remoteproc.o
> > diff --git a/drivers/remoteproc/zynqmp_r5_remoteproc.c
> > b/drivers/remoteproc/zynqmp_r5_remoteproc.c
> > new file mode 100644
> > index 000..7fc3718
> > --- /dev/null
> > +++ b/drivers/remoteproc/zynqmp_r5_remoteproc.c
> > @@ -0,0 +1,692 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Zynq R5 Remote Processor driver
> > + *
> > + * Copyright (C) 2015 Xilinx, Inc.
> > + *
> > + */
> > +
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +
> > +#include "remoteproc_internal.h"
> > +
> > +/* IPI reg offsets */
> > +#define TRIG_OFFSET0x
> > +#define OBS_OFFSET 0x0004
> > +#define ISR_OFFSET 0x0010
> > +#define IMR_OFFSET 0x0014
> > +#define IER_OFFSET 0x0018
> > +#define IDR_OFFSET 0x001C
> > +#define IPI_ALL_MASK 0x0F0F0301
> > +
> > +/* RPU IPI mask */
> > +#define RPU_IPI_INIT_MASK 0x0100
> > +#define RPU_IPI_MASK(n)(RPU_IPI_INIT_MASK << (n))
> > +#define RPU_0_IPI_MASK RPU_IPI_MASK(0)
> > +#define RPU_1_IPI_MASK RPU_IPI_MASK(1)
> > +
> > +/* PM proc states */
> > +#define PM_PROC_STATE_ACTIVE 1u
> > +
> > +/* Maximum TCM power nodes IDs */
> > +#define MAX_TCM_PNODES 4
> > +
> > +/* Register access macros */
> > +#define reg_read(base, reg) \
> > + readl(((void __iomem *)(base)) + (reg))
> > +#define reg_write(base, reg, val) \
> > + writel((val), ((void __iomem *)(base)) + (reg))
> > +
> > +#define DEFAULT_FIRMWARE_NAME "rproc-rpu-fw"
> > +
> > +static bool autoboot __read_mostly;
> > +
> > +struct zynqmp_r5_rproc_pdata;
> > +
> > +/**
> > + * struct zynqmp_r5_rproc_pdata - zynqmp rpu remote processor instance
> > state
> > + * @rproc: rproc handle
> > + * @workqueue: workqueue for the RPU remoteproc
> > + * @ipi_base: virt ptr to IPI channel address registers for APU
> > + * @rpu_mode: RPU core configuration
> > + * @rpu_id: RPU CPU id
> > + * @rpu_pnode_id: RPU CPU power domain id
> > + * @mem_pools: list of gen_pool for firmware mmio_sram memory and their
> > + * power domain IDs
> > + * @mems: list of rproc_mem_entries for firmware
> > + * @irq: IRQ number
> > + * @ipi_dest_mask: IPI destination mask for the IPI channel
> > + */
> > +struct zynqmp_r5_rproc_pdata {
> > + struct rproc *rproc;
> > + struct work_struct workqueue;
> > + void __iomem *ipi_base;
> > + enum rpu_oper_mode rpu_mode;
> > + struct list_head mems;
> > + u32 ipi_dest_mask;
> > + u32 rpu_id;
> > + u32 rpu_pnode_id;
> > + int irq;
> > + u32 tcm_pnode_id[MAX_TCM_PNODES];
> > +};
> > +
> > +/**
> > + * r5_boot_addr_config - configure the boot address of R5
> > + * @pdata: platform data
> > + * @bootmem: boot from LOVEC or HIVEC
> > + *
> > + * This function will set the RPU boot address
> > + */
> > +static
Re: [PATCH 6/7] remoteproc: Add Xilinx ZynqMP R5 remoteproc
Ping, any comments to the driver?
On Thu, Aug 16, 2018 at 3:17 AM Wendy Liang wrote:
>
> There are cortex-r5 processors in Xilinx Zynq UltraScale+
> MPSoC platforms. This remoteproc driver is to manage the
> R5 processors.
>
> Signed-off-by: Wendy Liang
> ---
> drivers/remoteproc/Kconfig| 9 +
> drivers/remoteproc/Makefile | 1 +
> drivers/remoteproc/zynqmp_r5_remoteproc.c | 692
> ++
> 3 files changed, 702 insertions(+)
> create mode 100644 drivers/remoteproc/zynqmp_r5_remoteproc.c
>
> diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig
> index cd1c168..83aac63 100644
> --- a/drivers/remoteproc/Kconfig
> +++ b/drivers/remoteproc/Kconfig
> @@ -158,6 +158,15 @@ config ST_REMOTEPROC
> config ST_SLIM_REMOTEPROC
> tristate
>
> +config ZYNQMP_R5_REMOTEPROC
> + tristate "ZynqMP_r5 remoteproc support"
> + depends on ARM64 && PM && ARCH_ZYNQMP
> + select RPMSG_VIRTIO
> + select ZYNQMP_FIRMWARE
> + help
> + Say y here to support ZynqMP R5 remote processors via the remote
> + processor framework.
> +
> endif # REMOTEPROC
>
> endmenu
> diff --git a/drivers/remoteproc/Makefile b/drivers/remoteproc/Makefile
> index 02627ed..147923c 100644
> --- a/drivers/remoteproc/Makefile
> +++ b/drivers/remoteproc/Makefile
> @@ -23,3 +23,4 @@ qcom_wcnss_pil-y += qcom_wcnss.o
> qcom_wcnss_pil-y += qcom_wcnss_iris.o
> obj-$(CONFIG_ST_REMOTEPROC)+= st_remoteproc.o
> obj-$(CONFIG_ST_SLIM_REMOTEPROC) += st_slim_rproc.o
> +obj-$(CONFIG_ZYNQMP_R5_REMOTEPROC) += zynqmp_r5_remoteproc.o
> diff --git a/drivers/remoteproc/zynqmp_r5_remoteproc.c
> b/drivers/remoteproc/zynqmp_r5_remoteproc.c
> new file mode 100644
> index 000..7fc3718
> --- /dev/null
> +++ b/drivers/remoteproc/zynqmp_r5_remoteproc.c
> @@ -0,0 +1,692 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Zynq R5 Remote Processor driver
> + *
> + * Copyright (C) 2015 Xilinx, Inc.
> + *
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include "remoteproc_internal.h"
> +
> +/* IPI reg offsets */
> +#define TRIG_OFFSET0x
> +#define OBS_OFFSET 0x0004
> +#define ISR_OFFSET 0x0010
> +#define IMR_OFFSET 0x0014
> +#define IER_OFFSET 0x0018
> +#define IDR_OFFSET 0x001C
> +#define IPI_ALL_MASK 0x0F0F0301
> +
> +/* RPU IPI mask */
> +#define RPU_IPI_INIT_MASK 0x0100
> +#define RPU_IPI_MASK(n)(RPU_IPI_INIT_MASK << (n))
> +#define RPU_0_IPI_MASK RPU_IPI_MASK(0)
> +#define RPU_1_IPI_MASK RPU_IPI_MASK(1)
> +
> +/* PM proc states */
> +#define PM_PROC_STATE_ACTIVE 1u
> +
> +/* Maximum TCM power nodes IDs */
> +#define MAX_TCM_PNODES 4
> +
> +/* Register access macros */
> +#define reg_read(base, reg) \
> + readl(((void __iomem *)(base)) + (reg))
> +#define reg_write(base, reg, val) \
> + writel((val), ((void __iomem *)(base)) + (reg))
> +
> +#define DEFAULT_FIRMWARE_NAME "rproc-rpu-fw"
> +
> +static bool autoboot __read_mostly;
> +
> +struct zynqmp_r5_rproc_pdata;
> +
> +/**
> + * struct zynqmp_r5_rproc_pdata - zynqmp rpu remote processor instance state
> + * @rproc: rproc handle
> + * @workqueue: workqueue for the RPU remoteproc
> + * @ipi_base: virt ptr to IPI channel address registers for APU
> + * @rpu_mode: RPU core configuration
> + * @rpu_id: RPU CPU id
> + * @rpu_pnode_id: RPU CPU power domain id
> + * @mem_pools: list of gen_pool for firmware mmio_sram memory and their
> + * power domain IDs
> + * @mems: list of rproc_mem_entries for firmware
> + * @irq: IRQ number
> + * @ipi_dest_mask: IPI destination mask for the IPI channel
> + */
> +struct zynqmp_r5_rproc_pdata {
> + struct rproc *rproc;
> + struct work_struct workqueue;
> + void __iomem *ipi_base;
> + enum rpu_oper_mode rpu_mode;
> + struct list_head mems;
> + u32 ipi_dest_mask;
> + u32 rpu_id;
> + u32 rpu_pnode_id;
> + int irq;
> + u32 tcm_pnode_id[MAX_TCM_PNODES];
> +};
> +
> +/**
> + * r5_boot_addr_config - configure the boot address of R5
> + * @pdata: platform data
> + * @bootmem: boot from LOVEC or HIVEC
> + *
> + * This function will set the RPU boot address
> + */
> +static void r5_boot_addr_config(struct zynqmp_r5_rproc_pdata *pdata,
> + enum rpu_boot_mem bootmem)
> +{
> + const struct zynqmp_eemi_ops *eemi = zynqmp_pm_get_eemi_ops();
> +
> + pr_debug("%s: R5 ID: %d, boot_dev %d\n",
> +__func__, pdata->rpu_id, bootmem);
> +
> + if (!eemi || !eemi->ioctl) {
> + pr_err("%s: no eemi ioctl
Re: [PATCH 6/7] remoteproc: Add Xilinx ZynqMP R5 remoteproc
Ping, any comments to the driver?
On Thu, Aug 16, 2018 at 3:17 AM Wendy Liang wrote:
>
> There are cortex-r5 processors in Xilinx Zynq UltraScale+
> MPSoC platforms. This remoteproc driver is to manage the
> R5 processors.
>
> Signed-off-by: Wendy Liang
> ---
> drivers/remoteproc/Kconfig| 9 +
> drivers/remoteproc/Makefile | 1 +
> drivers/remoteproc/zynqmp_r5_remoteproc.c | 692
> ++
> 3 files changed, 702 insertions(+)
> create mode 100644 drivers/remoteproc/zynqmp_r5_remoteproc.c
>
> diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig
> index cd1c168..83aac63 100644
> --- a/drivers/remoteproc/Kconfig
> +++ b/drivers/remoteproc/Kconfig
> @@ -158,6 +158,15 @@ config ST_REMOTEPROC
> config ST_SLIM_REMOTEPROC
> tristate
>
> +config ZYNQMP_R5_REMOTEPROC
> + tristate "ZynqMP_r5 remoteproc support"
> + depends on ARM64 && PM && ARCH_ZYNQMP
> + select RPMSG_VIRTIO
> + select ZYNQMP_FIRMWARE
> + help
> + Say y here to support ZynqMP R5 remote processors via the remote
> + processor framework.
> +
> endif # REMOTEPROC
>
> endmenu
> diff --git a/drivers/remoteproc/Makefile b/drivers/remoteproc/Makefile
> index 02627ed..147923c 100644
> --- a/drivers/remoteproc/Makefile
> +++ b/drivers/remoteproc/Makefile
> @@ -23,3 +23,4 @@ qcom_wcnss_pil-y += qcom_wcnss.o
> qcom_wcnss_pil-y += qcom_wcnss_iris.o
> obj-$(CONFIG_ST_REMOTEPROC)+= st_remoteproc.o
> obj-$(CONFIG_ST_SLIM_REMOTEPROC) += st_slim_rproc.o
> +obj-$(CONFIG_ZYNQMP_R5_REMOTEPROC) += zynqmp_r5_remoteproc.o
> diff --git a/drivers/remoteproc/zynqmp_r5_remoteproc.c
> b/drivers/remoteproc/zynqmp_r5_remoteproc.c
> new file mode 100644
> index 000..7fc3718
> --- /dev/null
> +++ b/drivers/remoteproc/zynqmp_r5_remoteproc.c
> @@ -0,0 +1,692 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Zynq R5 Remote Processor driver
> + *
> + * Copyright (C) 2015 Xilinx, Inc.
> + *
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include "remoteproc_internal.h"
> +
> +/* IPI reg offsets */
> +#define TRIG_OFFSET0x
> +#define OBS_OFFSET 0x0004
> +#define ISR_OFFSET 0x0010
> +#define IMR_OFFSET 0x0014
> +#define IER_OFFSET 0x0018
> +#define IDR_OFFSET 0x001C
> +#define IPI_ALL_MASK 0x0F0F0301
> +
> +/* RPU IPI mask */
> +#define RPU_IPI_INIT_MASK 0x0100
> +#define RPU_IPI_MASK(n)(RPU_IPI_INIT_MASK << (n))
> +#define RPU_0_IPI_MASK RPU_IPI_MASK(0)
> +#define RPU_1_IPI_MASK RPU_IPI_MASK(1)
> +
> +/* PM proc states */
> +#define PM_PROC_STATE_ACTIVE 1u
> +
> +/* Maximum TCM power nodes IDs */
> +#define MAX_TCM_PNODES 4
> +
> +/* Register access macros */
> +#define reg_read(base, reg) \
> + readl(((void __iomem *)(base)) + (reg))
> +#define reg_write(base, reg, val) \
> + writel((val), ((void __iomem *)(base)) + (reg))
> +
> +#define DEFAULT_FIRMWARE_NAME "rproc-rpu-fw"
> +
> +static bool autoboot __read_mostly;
> +
> +struct zynqmp_r5_rproc_pdata;
> +
> +/**
> + * struct zynqmp_r5_rproc_pdata - zynqmp rpu remote processor instance state
> + * @rproc: rproc handle
> + * @workqueue: workqueue for the RPU remoteproc
> + * @ipi_base: virt ptr to IPI channel address registers for APU
> + * @rpu_mode: RPU core configuration
> + * @rpu_id: RPU CPU id
> + * @rpu_pnode_id: RPU CPU power domain id
> + * @mem_pools: list of gen_pool for firmware mmio_sram memory and their
> + * power domain IDs
> + * @mems: list of rproc_mem_entries for firmware
> + * @irq: IRQ number
> + * @ipi_dest_mask: IPI destination mask for the IPI channel
> + */
> +struct zynqmp_r5_rproc_pdata {
> + struct rproc *rproc;
> + struct work_struct workqueue;
> + void __iomem *ipi_base;
> + enum rpu_oper_mode rpu_mode;
> + struct list_head mems;
> + u32 ipi_dest_mask;
> + u32 rpu_id;
> + u32 rpu_pnode_id;
> + int irq;
> + u32 tcm_pnode_id[MAX_TCM_PNODES];
> +};
> +
> +/**
> + * r5_boot_addr_config - configure the boot address of R5
> + * @pdata: platform data
> + * @bootmem: boot from LOVEC or HIVEC
> + *
> + * This function will set the RPU boot address
> + */
> +static void r5_boot_addr_config(struct zynqmp_r5_rproc_pdata *pdata,
> + enum rpu_boot_mem bootmem)
> +{
> + const struct zynqmp_eemi_ops *eemi = zynqmp_pm_get_eemi_ops();
> +
> + pr_debug("%s: R5 ID: %d, boot_dev %d\n",
> +__func__, pdata->rpu_id, bootmem);
> +
> + if (!eemi || !eemi->ioctl) {
> + pr_err("%s: no eemi ioctl
