subject:"Re\: \[PATCH 2\/2\] mtd\: spi\-nor\: Altera ASMI Parallel II IP Core"

Re: [PATCH 2/2] mtd: spi-nor: Altera ASMI Parallel II IP Core

2017-08-27 Thread matthew . gerlach



Hi Cyrille,

I think I figured out the confusion with regards to dummy cycles.  See my 
comment in line.


Matthew Gerlach

On Tue, 15 Aug 2017, Cyrille Pitchen wrote:


Le 15/08/2017 à 19:20, matthew.gerl...@linux.intel.com a écrit :


Hi Cyrille,

Thanks for the great feedback.  See my comments inline.

Matthew Gerlach

On Fri, 11 Aug 2017, Cyrille Pitchen wrote:


Hi Matthew,

Le 06/08/2017 à 20:24, matthew.gerl...@linux.intel.com a écrit :

From: Matthew Gerlach 

Signed-off-by: Matthew Gerlach 
---
 MAINTAINERS |   7 +
 drivers/mtd/spi-nor/Kconfig |   6 +
 drivers/mtd/spi-nor/Makefile|   3 +-
 drivers/mtd/spi-nor/altera-asmip2.c | 474

 include/linux/mtd/altera-asmip2.h   |  24 ++
 5 files changed, 513 insertions(+), 1 deletion(-)
 create mode 100644 drivers/mtd/spi-nor/altera-asmip2.c
 create mode 100644 include/linux/mtd/altera-asmip2.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 672b5d5..9583c1a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -644,6 +644,13 @@ ALPS PS/2 TOUCHPAD DRIVER
 R:Pali Rohár 
 F:drivers/input/mouse/alps.*

+ALTERA ASMI Parallel II Driver
+M:  Matthew Gerlach 
+L:  linux-...@lists.infradead.org
+S:  Maintained
+F:  drivers/mtd/spi-nor/altera-asmip2.c
+F:  inclulde/linux/mtd/altera-asmip2.h
+
 ALTERA MAILBOX DRIVER
 M:Ley Foon Tan 
 L:nios2-...@lists.rocketboards.org (moderated for non-subscribers)
diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig
index 69c638d..eb2c522 100644
--- a/drivers/mtd/spi-nor/Kconfig
+++ b/drivers/mtd/spi-nor/Kconfig
@@ -129,4 +129,10 @@ config SPI_STM32_QUADSPI
   This enables support for the STM32 Quad SPI controller.
   We only connect the NOR to this controller.

+config SPI_ALTERA_ASMIP2
+tristate "Altera ASMI Parallel II IP"
+depends on OF && HAS_IOMEM
+help
+  Enable support for Altera ASMI Parallel II.
+
 endif # MTD_SPI_NOR
diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile
index c5f171d..1c79324 100644
--- a/drivers/mtd/spi-nor/Makefile
+++ b/drivers/mtd/spi-nor/Makefile
@@ -1,4 +1,5 @@
 obj-$(CONFIG_MTD_SPI_NOR)+= spi-nor.o
+obj-$(CONFIG_SPI_ALTERA_ASMIP2)+= altera-asmip2.o
 obj-$(CONFIG_SPI_ASPEED_SMC)+= aspeed-smc.o
 obj-$(CONFIG_SPI_ATMEL_QUADSPI)+= atmel-quadspi.o
 obj-$(CONFIG_SPI_CADENCE_QUADSPI)+= cadence-quadspi.o
@@ -9,4 +10,4 @@ obj-$(CONFIG_SPI_NXP_SPIFI)+= nxp-spifi.o
 obj-$(CONFIG_SPI_INTEL_SPI)+= intel-spi.o
 obj-$(CONFIG_SPI_INTEL_SPI_PCI)+= intel-spi-pci.o
 obj-$(CONFIG_SPI_INTEL_SPI_PLATFORM)+= intel-spi-platform.o
-obj-$(CONFIG_SPI_STM32_QUADSPI)+= stm32-quadspi.o
\ No newline at end of file
+obj-$(CONFIG_SPI_STM32_QUADSPI)+= stm32-quadspi.o
diff --git a/drivers/mtd/spi-nor/altera-asmip2.c
b/drivers/mtd/spi-nor/altera-asmip2.c
new file mode 100644
index 000..2095f2e
--- /dev/null
+++ b/drivers/mtd/spi-nor/altera-asmip2.c
@@ -0,0 +1,474 @@
+/*
+ * Copyright (C) 2017 Intel Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but
WITHOUT
+ * ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
along with
+ * this program.  If not, see .
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define QSPI_ACTION_REG 0
+#define QSPI_ACTION_RST BIT(0)
+#define QSPI_ACTION_EN BIT(1)
+#define QSPI_ACTION_SC BIT(2)
+#define QSPI_ACTION_CHIP_SEL_SFT 4
+#define QSPI_ACTION_DUMMY_SFT 8
+#define QSPI_ACTION_READ_BACK_SFT 16
+
+#define QSPI_FIFO_CNT_REG 4
+#define QSPI_FIFO_DEPTH 0x200
+#define QSPI_FIFO_CNT_MSK 0x3ff
+#define QSPI_FIFO_CNT_RX_SFT 0
+#define QSPI_FIFO_CNT_TX_SFT 12
+
+#define QSPI_DATA_REG 0x8
+
+#define QSPI_POLL_TIMEOUT 1000
+#define QSPI_POLL_INTERVAL 5
+
+struct altera_asmip2 {
+void __iomem *csr_base;
+u32 num_flashes;
+struct device *dev;
+struct altera_asmip2_flash
*flash[ALTERA_ASMIP2_MAX_NUM_FLASH_CHIP];
+struct mutex bus_mutex;
+};
+
+struct altera_asmip2_flash {
+struct spi_nor nor;
+struct altera_asmip2 *q;
+u32 bank;
+};
+
+static int altera_asmip2_write_reg(struct spi_nor *nor, u8 opcode,
u8 *val,
+int len)
+{
+struct altera_asmip2_flash *flash = nor->priv;
+struct altera_asmip2 *q = flash->q;
+u32 reg;
+int ret;
+int i;
+
+if ((len + 1) > QSPI_FIFO_DEPTH) {
+

Re: [PATCH 2/2] mtd: spi-nor: Altera ASMI Parallel II IP Core

2017-08-27 Thread matthew . gerlach



Hi Cyrille,

I think I figured out the confusion with regards to dummy cycles.  See my 
comment in line.


Matthew Gerlach

On Tue, 15 Aug 2017, Cyrille Pitchen wrote:


Le 15/08/2017 à 19:20, matthew.gerl...@linux.intel.com a écrit :


Hi Cyrille,

Thanks for the great feedback.  See my comments inline.

Matthew Gerlach

On Fri, 11 Aug 2017, Cyrille Pitchen wrote:


Hi Matthew,

Le 06/08/2017 à 20:24, matthew.gerl...@linux.intel.com a écrit :

From: Matthew Gerlach 

Signed-off-by: Matthew Gerlach 
---
 MAINTAINERS |   7 +
 drivers/mtd/spi-nor/Kconfig |   6 +
 drivers/mtd/spi-nor/Makefile|   3 +-
 drivers/mtd/spi-nor/altera-asmip2.c | 474

 include/linux/mtd/altera-asmip2.h   |  24 ++
 5 files changed, 513 insertions(+), 1 deletion(-)
 create mode 100644 drivers/mtd/spi-nor/altera-asmip2.c
 create mode 100644 include/linux/mtd/altera-asmip2.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 672b5d5..9583c1a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -644,6 +644,13 @@ ALPS PS/2 TOUCHPAD DRIVER
 R:Pali Rohár 
 F:drivers/input/mouse/alps.*

+ALTERA ASMI Parallel II Driver
+M:  Matthew Gerlach 
+L:  linux-...@lists.infradead.org
+S:  Maintained
+F:  drivers/mtd/spi-nor/altera-asmip2.c
+F:  inclulde/linux/mtd/altera-asmip2.h
+
 ALTERA MAILBOX DRIVER
 M:Ley Foon Tan 
 L:nios2-...@lists.rocketboards.org (moderated for non-subscribers)
diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig
index 69c638d..eb2c522 100644
--- a/drivers/mtd/spi-nor/Kconfig
+++ b/drivers/mtd/spi-nor/Kconfig
@@ -129,4 +129,10 @@ config SPI_STM32_QUADSPI
   This enables support for the STM32 Quad SPI controller.
   We only connect the NOR to this controller.

+config SPI_ALTERA_ASMIP2
+tristate "Altera ASMI Parallel II IP"
+depends on OF && HAS_IOMEM
+help
+  Enable support for Altera ASMI Parallel II.
+
 endif # MTD_SPI_NOR
diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile
index c5f171d..1c79324 100644
--- a/drivers/mtd/spi-nor/Makefile
+++ b/drivers/mtd/spi-nor/Makefile
@@ -1,4 +1,5 @@
 obj-$(CONFIG_MTD_SPI_NOR)+= spi-nor.o
+obj-$(CONFIG_SPI_ALTERA_ASMIP2)+= altera-asmip2.o
 obj-$(CONFIG_SPI_ASPEED_SMC)+= aspeed-smc.o
 obj-$(CONFIG_SPI_ATMEL_QUADSPI)+= atmel-quadspi.o
 obj-$(CONFIG_SPI_CADENCE_QUADSPI)+= cadence-quadspi.o
@@ -9,4 +10,4 @@ obj-$(CONFIG_SPI_NXP_SPIFI)+= nxp-spifi.o
 obj-$(CONFIG_SPI_INTEL_SPI)+= intel-spi.o
 obj-$(CONFIG_SPI_INTEL_SPI_PCI)+= intel-spi-pci.o
 obj-$(CONFIG_SPI_INTEL_SPI_PLATFORM)+= intel-spi-platform.o
-obj-$(CONFIG_SPI_STM32_QUADSPI)+= stm32-quadspi.o
\ No newline at end of file
+obj-$(CONFIG_SPI_STM32_QUADSPI)+= stm32-quadspi.o
diff --git a/drivers/mtd/spi-nor/altera-asmip2.c
b/drivers/mtd/spi-nor/altera-asmip2.c
new file mode 100644
index 000..2095f2e
--- /dev/null
+++ b/drivers/mtd/spi-nor/altera-asmip2.c
@@ -0,0 +1,474 @@
+/*
+ * Copyright (C) 2017 Intel Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but
WITHOUT
+ * ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
along with
+ * this program.  If not, see .
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define QSPI_ACTION_REG 0
+#define QSPI_ACTION_RST BIT(0)
+#define QSPI_ACTION_EN BIT(1)
+#define QSPI_ACTION_SC BIT(2)
+#define QSPI_ACTION_CHIP_SEL_SFT 4
+#define QSPI_ACTION_DUMMY_SFT 8
+#define QSPI_ACTION_READ_BACK_SFT 16
+
+#define QSPI_FIFO_CNT_REG 4
+#define QSPI_FIFO_DEPTH 0x200
+#define QSPI_FIFO_CNT_MSK 0x3ff
+#define QSPI_FIFO_CNT_RX_SFT 0
+#define QSPI_FIFO_CNT_TX_SFT 12
+
+#define QSPI_DATA_REG 0x8
+
+#define QSPI_POLL_TIMEOUT 1000
+#define QSPI_POLL_INTERVAL 5
+
+struct altera_asmip2 {
+void __iomem *csr_base;
+u32 num_flashes;
+struct device *dev;
+struct altera_asmip2_flash
*flash[ALTERA_ASMIP2_MAX_NUM_FLASH_CHIP];
+struct mutex bus_mutex;
+};
+
+struct altera_asmip2_flash {
+struct spi_nor nor;
+struct altera_asmip2 *q;
+u32 bank;
+};
+
+static int altera_asmip2_write_reg(struct spi_nor *nor, u8 opcode,
u8 *val,
+int len)
+{
+struct altera_asmip2_flash *flash = nor->priv;
+struct altera_asmip2 *q = flash->q;
+u32 reg;
+int ret;
+int i;
+
+if ((len + 1) > QSPI_FIFO_DEPTH) {
+dev_err(q->dev, "%s bad len %d > %d\n",
+__func__, len + 1, QSPI_FIFO_DEPTH);
+return -EINVAL;
+}
+
+writel(opcode,

Re: [PATCH 2/2] mtd: spi-nor: Altera ASMI Parallel II IP Core

2017-08-15 Thread Cyrille Pitchen

Le 15/08/2017 à 19:20, matthew.gerl...@linux.intel.com a écrit :
> 
> Hi Cyrille,
> 
> Thanks for the great feedback.  See my comments inline.
> 
> Matthew Gerlach
> 
> On Fri, 11 Aug 2017, Cyrille Pitchen wrote:
> 
>> Hi Matthew,
>>
>> Le 06/08/2017 à 20:24, matthew.gerl...@linux.intel.com a écrit :
>>> From: Matthew Gerlach 
>>>
>>> Signed-off-by: Matthew Gerlach 
>>> ---
>>>  MAINTAINERS |   7 +
>>>  drivers/mtd/spi-nor/Kconfig |   6 +
>>>  drivers/mtd/spi-nor/Makefile|   3 +-
>>>  drivers/mtd/spi-nor/altera-asmip2.c | 474
>>> 
>>>  include/linux/mtd/altera-asmip2.h   |  24 ++
>>>  5 files changed, 513 insertions(+), 1 deletion(-)
>>>  create mode 100644 drivers/mtd/spi-nor/altera-asmip2.c
>>>  create mode 100644 include/linux/mtd/altera-asmip2.h
>>>
>>> diff --git a/MAINTAINERS b/MAINTAINERS
>>> index 672b5d5..9583c1a 100644
>>> --- a/MAINTAINERS
>>> +++ b/MAINTAINERS
>>> @@ -644,6 +644,13 @@ ALPS PS/2 TOUCHPAD DRIVER
>>>  R:Pali Rohár 
>>>  F:drivers/input/mouse/alps.*
>>>
>>> +ALTERA ASMI Parallel II Driver
>>> +M:  Matthew Gerlach 
>>> +L:  linux-...@lists.infradead.org
>>> +S:  Maintained
>>> +F:  drivers/mtd/spi-nor/altera-asmip2.c
>>> +F:  inclulde/linux/mtd/altera-asmip2.h
>>> +
>>>  ALTERA MAILBOX DRIVER
>>>  M:Ley Foon Tan 
>>>  L:nios2-...@lists.rocketboards.org (moderated for non-subscribers)
>>> diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig
>>> index 69c638d..eb2c522 100644
>>> --- a/drivers/mtd/spi-nor/Kconfig
>>> +++ b/drivers/mtd/spi-nor/Kconfig
>>> @@ -129,4 +129,10 @@ config SPI_STM32_QUADSPI
>>>This enables support for the STM32 Quad SPI controller.
>>>We only connect the NOR to this controller.
>>>
>>> +config SPI_ALTERA_ASMIP2
>>> +tristate "Altera ASMI Parallel II IP"
>>> +depends on OF && HAS_IOMEM
>>> +help
>>> +  Enable support for Altera ASMI Parallel II.
>>> +
>>>  endif # MTD_SPI_NOR
>>> diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile
>>> index c5f171d..1c79324 100644
>>> --- a/drivers/mtd/spi-nor/Makefile
>>> +++ b/drivers/mtd/spi-nor/Makefile
>>> @@ -1,4 +1,5 @@
>>>  obj-$(CONFIG_MTD_SPI_NOR)+= spi-nor.o
>>> +obj-$(CONFIG_SPI_ALTERA_ASMIP2)+= altera-asmip2.o
>>>  obj-$(CONFIG_SPI_ASPEED_SMC)+= aspeed-smc.o
>>>  obj-$(CONFIG_SPI_ATMEL_QUADSPI)+= atmel-quadspi.o
>>>  obj-$(CONFIG_SPI_CADENCE_QUADSPI)+= cadence-quadspi.o
>>> @@ -9,4 +10,4 @@ obj-$(CONFIG_SPI_NXP_SPIFI)+= nxp-spifi.o
>>>  obj-$(CONFIG_SPI_INTEL_SPI)+= intel-spi.o
>>>  obj-$(CONFIG_SPI_INTEL_SPI_PCI)+= intel-spi-pci.o
>>>  obj-$(CONFIG_SPI_INTEL_SPI_PLATFORM)+= intel-spi-platform.o
>>> -obj-$(CONFIG_SPI_STM32_QUADSPI)+= stm32-quadspi.o
>>> \ No newline at end of file
>>> +obj-$(CONFIG_SPI_STM32_QUADSPI)+= stm32-quadspi.o
>>> diff --git a/drivers/mtd/spi-nor/altera-asmip2.c
>>> b/drivers/mtd/spi-nor/altera-asmip2.c
>>> new file mode 100644
>>> index 000..2095f2e
>>> --- /dev/null
>>> +++ b/drivers/mtd/spi-nor/altera-asmip2.c
>>> @@ -0,0 +1,474 @@
>>> +/*
>>> + * Copyright (C) 2017 Intel Corporation. All rights reserved.
>>> + *
>>> + * This program is free software; you can redistribute it and/or
>>> modify it
>>> + * under the terms and conditions of the GNU General Public License,
>>> + * version 2, as published by the Free Software Foundation.
>>> + *
>>> + * This program is distributed in the hope it will be useful, but
>>> WITHOUT
>>> + * ANY WARRANTY; without even the implied warranty of
>>> MERCHANTABILITY or
>>> + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
>>> License for
>>> + * more details.
>>> + *
>>> + * You should have received a copy of the GNU General Public License
>>> along with
>>> + * this program.  If not, see .
>>> + */
>>> +
>>> +#include 
>>> +#include 
>>> +#include 
>>> +#include 
>>> +#include 
>>> +#include 
>>> +
>>> +#define QSPI_ACTION_REG 0
>>> +#define QSPI_ACTION_RST BIT(0)
>>> +#define QSPI_ACTION_EN BIT(1)
>>> +#define QSPI_ACTION_SC BIT(2)
>>> +#define QSPI_ACTION_CHIP_SEL_SFT 4
>>> +#define QSPI_ACTION_DUMMY_SFT 8
>>> +#define QSPI_ACTION_READ_BACK_SFT 16
>>> +
>>> +#define QSPI_FIFO_CNT_REG 4
>>> +#define QSPI_FIFO_DEPTH 0x200
>>> +#define QSPI_FIFO_CNT_MSK 0x3ff
>>> +#define QSPI_FIFO_CNT_RX_SFT 0
>>> +#define QSPI_FIFO_CNT_TX_SFT 12
>>> +
>>> +#define QSPI_DATA_REG 0x8
>>> +
>>> +#define QSPI_POLL_TIMEOUT 1000
>>> +#define QSPI_POLL_INTERVAL 5
>>> +
>>> +struct altera_asmip2 {
>>> +void __iomem *csr_base;
>>> +u32 num_flashes;
>>> +struct device *dev;
>>> +struct altera_asmip2_flash
>>> *flash[ALTERA_ASMIP2_MAX_NUM_FLASH_CHIP];
>>> +struct mutex bus_mutex;
>>> +};
>>> +
>>> +struct altera_asmip2_flash {
>>> +struct

Re: [PATCH 2/2] mtd: spi-nor: Altera ASMI Parallel II IP Core

2017-08-15 Thread Cyrille Pitchen

Le 15/08/2017 à 19:20, matthew.gerl...@linux.intel.com a écrit :
> 
> Hi Cyrille,
> 
> Thanks for the great feedback.  See my comments inline.
> 
> Matthew Gerlach
> 
> On Fri, 11 Aug 2017, Cyrille Pitchen wrote:
> 
>> Hi Matthew,
>>
>> Le 06/08/2017 à 20:24, matthew.gerl...@linux.intel.com a écrit :
>>> From: Matthew Gerlach 
>>>
>>> Signed-off-by: Matthew Gerlach 
>>> ---
>>>  MAINTAINERS |   7 +
>>>  drivers/mtd/spi-nor/Kconfig |   6 +
>>>  drivers/mtd/spi-nor/Makefile|   3 +-
>>>  drivers/mtd/spi-nor/altera-asmip2.c | 474
>>> 
>>>  include/linux/mtd/altera-asmip2.h   |  24 ++
>>>  5 files changed, 513 insertions(+), 1 deletion(-)
>>>  create mode 100644 drivers/mtd/spi-nor/altera-asmip2.c
>>>  create mode 100644 include/linux/mtd/altera-asmip2.h
>>>
>>> diff --git a/MAINTAINERS b/MAINTAINERS
>>> index 672b5d5..9583c1a 100644
>>> --- a/MAINTAINERS
>>> +++ b/MAINTAINERS
>>> @@ -644,6 +644,13 @@ ALPS PS/2 TOUCHPAD DRIVER
>>>  R:Pali Rohár 
>>>  F:drivers/input/mouse/alps.*
>>>
>>> +ALTERA ASMI Parallel II Driver
>>> +M:  Matthew Gerlach 
>>> +L:  linux-...@lists.infradead.org
>>> +S:  Maintained
>>> +F:  drivers/mtd/spi-nor/altera-asmip2.c
>>> +F:  inclulde/linux/mtd/altera-asmip2.h
>>> +
>>>  ALTERA MAILBOX DRIVER
>>>  M:Ley Foon Tan 
>>>  L:nios2-...@lists.rocketboards.org (moderated for non-subscribers)
>>> diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig
>>> index 69c638d..eb2c522 100644
>>> --- a/drivers/mtd/spi-nor/Kconfig
>>> +++ b/drivers/mtd/spi-nor/Kconfig
>>> @@ -129,4 +129,10 @@ config SPI_STM32_QUADSPI
>>>This enables support for the STM32 Quad SPI controller.
>>>We only connect the NOR to this controller.
>>>
>>> +config SPI_ALTERA_ASMIP2
>>> +tristate "Altera ASMI Parallel II IP"
>>> +depends on OF && HAS_IOMEM
>>> +help
>>> +  Enable support for Altera ASMI Parallel II.
>>> +
>>>  endif # MTD_SPI_NOR
>>> diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile
>>> index c5f171d..1c79324 100644
>>> --- a/drivers/mtd/spi-nor/Makefile
>>> +++ b/drivers/mtd/spi-nor/Makefile
>>> @@ -1,4 +1,5 @@
>>>  obj-$(CONFIG_MTD_SPI_NOR)+= spi-nor.o
>>> +obj-$(CONFIG_SPI_ALTERA_ASMIP2)+= altera-asmip2.o
>>>  obj-$(CONFIG_SPI_ASPEED_SMC)+= aspeed-smc.o
>>>  obj-$(CONFIG_SPI_ATMEL_QUADSPI)+= atmel-quadspi.o
>>>  obj-$(CONFIG_SPI_CADENCE_QUADSPI)+= cadence-quadspi.o
>>> @@ -9,4 +10,4 @@ obj-$(CONFIG_SPI_NXP_SPIFI)+= nxp-spifi.o
>>>  obj-$(CONFIG_SPI_INTEL_SPI)+= intel-spi.o
>>>  obj-$(CONFIG_SPI_INTEL_SPI_PCI)+= intel-spi-pci.o
>>>  obj-$(CONFIG_SPI_INTEL_SPI_PLATFORM)+= intel-spi-platform.o
>>> -obj-$(CONFIG_SPI_STM32_QUADSPI)+= stm32-quadspi.o
>>> \ No newline at end of file
>>> +obj-$(CONFIG_SPI_STM32_QUADSPI)+= stm32-quadspi.o
>>> diff --git a/drivers/mtd/spi-nor/altera-asmip2.c
>>> b/drivers/mtd/spi-nor/altera-asmip2.c
>>> new file mode 100644
>>> index 000..2095f2e
>>> --- /dev/null
>>> +++ b/drivers/mtd/spi-nor/altera-asmip2.c
>>> @@ -0,0 +1,474 @@
>>> +/*
>>> + * Copyright (C) 2017 Intel Corporation. All rights reserved.
>>> + *
>>> + * This program is free software; you can redistribute it and/or
>>> modify it
>>> + * under the terms and conditions of the GNU General Public License,
>>> + * version 2, as published by the Free Software Foundation.
>>> + *
>>> + * This program is distributed in the hope it will be useful, but
>>> WITHOUT
>>> + * ANY WARRANTY; without even the implied warranty of
>>> MERCHANTABILITY or
>>> + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
>>> License for
>>> + * more details.
>>> + *
>>> + * You should have received a copy of the GNU General Public License
>>> along with
>>> + * this program.  If not, see .
>>> + */
>>> +
>>> +#include 
>>> +#include 
>>> +#include 
>>> +#include 
>>> +#include 
>>> +#include 
>>> +
>>> +#define QSPI_ACTION_REG 0
>>> +#define QSPI_ACTION_RST BIT(0)
>>> +#define QSPI_ACTION_EN BIT(1)
>>> +#define QSPI_ACTION_SC BIT(2)
>>> +#define QSPI_ACTION_CHIP_SEL_SFT 4
>>> +#define QSPI_ACTION_DUMMY_SFT 8
>>> +#define QSPI_ACTION_READ_BACK_SFT 16
>>> +
>>> +#define QSPI_FIFO_CNT_REG 4
>>> +#define QSPI_FIFO_DEPTH 0x200
>>> +#define QSPI_FIFO_CNT_MSK 0x3ff
>>> +#define QSPI_FIFO_CNT_RX_SFT 0
>>> +#define QSPI_FIFO_CNT_TX_SFT 12
>>> +
>>> +#define QSPI_DATA_REG 0x8
>>> +
>>> +#define QSPI_POLL_TIMEOUT 1000
>>> +#define QSPI_POLL_INTERVAL 5
>>> +
>>> +struct altera_asmip2 {
>>> +void __iomem *csr_base;
>>> +u32 num_flashes;
>>> +struct device *dev;
>>> +struct altera_asmip2_flash
>>> *flash[ALTERA_ASMIP2_MAX_NUM_FLASH_CHIP];
>>> +struct mutex bus_mutex;
>>> +};
>>> +
>>> +struct altera_asmip2_flash {
>>> +struct spi_nor nor;
>>> +struct altera_asmip2 *q;
>>> +u32 bank;
>>> +};
>>> +
>>> +static int altera_asmip2_write_reg(struct spi_nor *nor, u8

Re: [PATCH 2/2] mtd: spi-nor: Altera ASMI Parallel II IP Core

2017-08-15 Thread matthew . gerlach



Hi Cyrille,

Thanks for the great feedback.  See my comments inline.

Matthew Gerlach

On Fri, 11 Aug 2017, Cyrille Pitchen wrote:


Hi Matthew,

Le 06/08/2017 à 20:24, matthew.gerl...@linux.intel.com a écrit :

From: Matthew Gerlach 

Signed-off-by: Matthew Gerlach 
---
 MAINTAINERS |   7 +
 drivers/mtd/spi-nor/Kconfig |   6 +
 drivers/mtd/spi-nor/Makefile|   3 +-
 drivers/mtd/spi-nor/altera-asmip2.c | 474 
 include/linux/mtd/altera-asmip2.h   |  24 ++
 5 files changed, 513 insertions(+), 1 deletion(-)
 create mode 100644 drivers/mtd/spi-nor/altera-asmip2.c
 create mode 100644 include/linux/mtd/altera-asmip2.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 672b5d5..9583c1a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -644,6 +644,13 @@ ALPS PS/2 TOUCHPAD DRIVER
 R: Pali Rohár 
 F: drivers/input/mouse/alps.*

+ALTERA ASMI Parallel II Driver
+M:  Matthew Gerlach 
+L:  linux-...@lists.infradead.org
+S:  Maintained
+F:  drivers/mtd/spi-nor/altera-asmip2.c
+F:  inclulde/linux/mtd/altera-asmip2.h
+
 ALTERA MAILBOX DRIVER
 M: Ley Foon Tan 
 L: nios2-...@lists.rocketboards.org (moderated for non-subscribers)
diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig
index 69c638d..eb2c522 100644
--- a/drivers/mtd/spi-nor/Kconfig
+++ b/drivers/mtd/spi-nor/Kconfig
@@ -129,4 +129,10 @@ config SPI_STM32_QUADSPI
  This enables support for the STM32 Quad SPI controller.
  We only connect the NOR to this controller.

+config SPI_ALTERA_ASMIP2
+   tristate "Altera ASMI Parallel II IP"
+   depends on OF && HAS_IOMEM
+   help
+ Enable support for Altera ASMI Parallel II.
+
 endif # MTD_SPI_NOR
diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile
index c5f171d..1c79324 100644
--- a/drivers/mtd/spi-nor/Makefile
+++ b/drivers/mtd/spi-nor/Makefile
@@ -1,4 +1,5 @@
 obj-$(CONFIG_MTD_SPI_NOR)  += spi-nor.o
+obj-$(CONFIG_SPI_ALTERA_ASMIP2)+= altera-asmip2.o
 obj-$(CONFIG_SPI_ASPEED_SMC)   += aspeed-smc.o
 obj-$(CONFIG_SPI_ATMEL_QUADSPI)+= atmel-quadspi.o
 obj-$(CONFIG_SPI_CADENCE_QUADSPI)  += cadence-quadspi.o
@@ -9,4 +10,4 @@ obj-$(CONFIG_SPI_NXP_SPIFI)+= nxp-spifi.o
 obj-$(CONFIG_SPI_INTEL_SPI)+= intel-spi.o
 obj-$(CONFIG_SPI_INTEL_SPI_PCI)+= intel-spi-pci.o
 obj-$(CONFIG_SPI_INTEL_SPI_PLATFORM)   += intel-spi-platform.o
-obj-$(CONFIG_SPI_STM32_QUADSPI)+= stm32-quadspi.o
\ No newline at end of file
+obj-$(CONFIG_SPI_STM32_QUADSPI)+= stm32-quadspi.o
diff --git a/drivers/mtd/spi-nor/altera-asmip2.c 
b/drivers/mtd/spi-nor/altera-asmip2.c
new file mode 100644
index 000..2095f2e
--- /dev/null
+++ b/drivers/mtd/spi-nor/altera-asmip2.c
@@ -0,0 +1,474 @@
+/*
+ * Copyright (C) 2017 Intel Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see .
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define QSPI_ACTION_REG 0
+#define QSPI_ACTION_RST BIT(0)
+#define QSPI_ACTION_EN BIT(1)
+#define QSPI_ACTION_SC BIT(2)
+#define QSPI_ACTION_CHIP_SEL_SFT 4
+#define QSPI_ACTION_DUMMY_SFT 8
+#define QSPI_ACTION_READ_BACK_SFT 16
+
+#define QSPI_FIFO_CNT_REG 4
+#define QSPI_FIFO_DEPTH 0x200
+#define QSPI_FIFO_CNT_MSK 0x3ff
+#define QSPI_FIFO_CNT_RX_SFT 0
+#define QSPI_FIFO_CNT_TX_SFT 12
+
+#define QSPI_DATA_REG 0x8
+
+#define QSPI_POLL_TIMEOUT 1000
+#define QSPI_POLL_INTERVAL 5
+
+struct altera_asmip2 {
+   void __iomem *csr_base;
+   u32 num_flashes;
+   struct device *dev;
+   struct altera_asmip2_flash *flash[ALTERA_ASMIP2_MAX_NUM_FLASH_CHIP];
+   struct mutex bus_mutex;
+};
+
+struct altera_asmip2_flash {
+   struct spi_nor nor;
+   struct altera_asmip2 *q;
+   u32 bank;
+};
+
+static int altera_asmip2_write_reg(struct spi_nor *nor, u8 opcode, u8 *val,
+   int len)
+{
+   struct altera_asmip2_flash *flash = nor->priv;
+   struct altera_asmip2 *q = flash->q;
+   u32 reg;
+   int ret;
+   int i;
+
+   if ((len + 1) > QSPI_FIFO_DEPTH) {
+   dev_err(q->dev, "%s bad len %d > %d\n",
+   __func__, len + 1, QSPI_FIFO_DEPTH);
+   return -EINVAL;
+

Re: [PATCH 2/2] mtd: spi-nor: Altera ASMI Parallel II IP Core

2017-08-15 Thread matthew . gerlach



Hi Cyrille,

Thanks for the great feedback.  See my comments inline.

Matthew Gerlach

On Fri, 11 Aug 2017, Cyrille Pitchen wrote:


Hi Matthew,

Le 06/08/2017 à 20:24, matthew.gerl...@linux.intel.com a écrit :

From: Matthew Gerlach 

Signed-off-by: Matthew Gerlach 
---
 MAINTAINERS |   7 +
 drivers/mtd/spi-nor/Kconfig |   6 +
 drivers/mtd/spi-nor/Makefile|   3 +-
 drivers/mtd/spi-nor/altera-asmip2.c | 474 
 include/linux/mtd/altera-asmip2.h   |  24 ++
 5 files changed, 513 insertions(+), 1 deletion(-)
 create mode 100644 drivers/mtd/spi-nor/altera-asmip2.c
 create mode 100644 include/linux/mtd/altera-asmip2.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 672b5d5..9583c1a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -644,6 +644,13 @@ ALPS PS/2 TOUCHPAD DRIVER
 R: Pali Rohár 
 F: drivers/input/mouse/alps.*

+ALTERA ASMI Parallel II Driver
+M:  Matthew Gerlach 
+L:  linux-...@lists.infradead.org
+S:  Maintained
+F:  drivers/mtd/spi-nor/altera-asmip2.c
+F:  inclulde/linux/mtd/altera-asmip2.h
+
 ALTERA MAILBOX DRIVER
 M: Ley Foon Tan 
 L: nios2-...@lists.rocketboards.org (moderated for non-subscribers)
diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig
index 69c638d..eb2c522 100644
--- a/drivers/mtd/spi-nor/Kconfig
+++ b/drivers/mtd/spi-nor/Kconfig
@@ -129,4 +129,10 @@ config SPI_STM32_QUADSPI
  This enables support for the STM32 Quad SPI controller.
  We only connect the NOR to this controller.

+config SPI_ALTERA_ASMIP2
+   tristate "Altera ASMI Parallel II IP"
+   depends on OF && HAS_IOMEM
+   help
+ Enable support for Altera ASMI Parallel II.
+
 endif # MTD_SPI_NOR
diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile
index c5f171d..1c79324 100644
--- a/drivers/mtd/spi-nor/Makefile
+++ b/drivers/mtd/spi-nor/Makefile
@@ -1,4 +1,5 @@
 obj-$(CONFIG_MTD_SPI_NOR)  += spi-nor.o
+obj-$(CONFIG_SPI_ALTERA_ASMIP2)+= altera-asmip2.o
 obj-$(CONFIG_SPI_ASPEED_SMC)   += aspeed-smc.o
 obj-$(CONFIG_SPI_ATMEL_QUADSPI)+= atmel-quadspi.o
 obj-$(CONFIG_SPI_CADENCE_QUADSPI)  += cadence-quadspi.o
@@ -9,4 +10,4 @@ obj-$(CONFIG_SPI_NXP_SPIFI)+= nxp-spifi.o
 obj-$(CONFIG_SPI_INTEL_SPI)+= intel-spi.o
 obj-$(CONFIG_SPI_INTEL_SPI_PCI)+= intel-spi-pci.o
 obj-$(CONFIG_SPI_INTEL_SPI_PLATFORM)   += intel-spi-platform.o
-obj-$(CONFIG_SPI_STM32_QUADSPI)+= stm32-quadspi.o
\ No newline at end of file
+obj-$(CONFIG_SPI_STM32_QUADSPI)+= stm32-quadspi.o
diff --git a/drivers/mtd/spi-nor/altera-asmip2.c 
b/drivers/mtd/spi-nor/altera-asmip2.c
new file mode 100644
index 000..2095f2e
--- /dev/null
+++ b/drivers/mtd/spi-nor/altera-asmip2.c
@@ -0,0 +1,474 @@
+/*
+ * Copyright (C) 2017 Intel Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see .
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define QSPI_ACTION_REG 0
+#define QSPI_ACTION_RST BIT(0)
+#define QSPI_ACTION_EN BIT(1)
+#define QSPI_ACTION_SC BIT(2)
+#define QSPI_ACTION_CHIP_SEL_SFT 4
+#define QSPI_ACTION_DUMMY_SFT 8
+#define QSPI_ACTION_READ_BACK_SFT 16
+
+#define QSPI_FIFO_CNT_REG 4
+#define QSPI_FIFO_DEPTH 0x200
+#define QSPI_FIFO_CNT_MSK 0x3ff
+#define QSPI_FIFO_CNT_RX_SFT 0
+#define QSPI_FIFO_CNT_TX_SFT 12
+
+#define QSPI_DATA_REG 0x8
+
+#define QSPI_POLL_TIMEOUT 1000
+#define QSPI_POLL_INTERVAL 5
+
+struct altera_asmip2 {
+   void __iomem *csr_base;
+   u32 num_flashes;
+   struct device *dev;
+   struct altera_asmip2_flash *flash[ALTERA_ASMIP2_MAX_NUM_FLASH_CHIP];
+   struct mutex bus_mutex;
+};
+
+struct altera_asmip2_flash {
+   struct spi_nor nor;
+   struct altera_asmip2 *q;
+   u32 bank;
+};
+
+static int altera_asmip2_write_reg(struct spi_nor *nor, u8 opcode, u8 *val,
+   int len)
+{
+   struct altera_asmip2_flash *flash = nor->priv;
+   struct altera_asmip2 *q = flash->q;
+   u32 reg;
+   int ret;
+   int i;
+
+   if ((len + 1) > QSPI_FIFO_DEPTH) {
+   dev_err(q->dev, "%s bad len %d > %d\n",
+   __func__, len + 1, QSPI_FIFO_DEPTH);
+   return -EINVAL;
+   }
+
+   writel(opcode, q->csr_base + QSPI_DATA_REG);
+
+   for (i = 0; i < len; i++) {
+   writel((u32)val[i],

Re: [PATCH 2/2] mtd: spi-nor: Altera ASMI Parallel II IP Core

2017-08-11 Thread Cyrille Pitchen

Hi Matthew,

Le 06/08/2017 à 20:24, matthew.gerl...@linux.intel.com a écrit :
> From: Matthew Gerlach 
> 
> Signed-off-by: Matthew Gerlach 
> ---
>  MAINTAINERS |   7 +
>  drivers/mtd/spi-nor/Kconfig |   6 +
>  drivers/mtd/spi-nor/Makefile|   3 +-
>  drivers/mtd/spi-nor/altera-asmip2.c | 474 
> 
>  include/linux/mtd/altera-asmip2.h   |  24 ++
>  5 files changed, 513 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/mtd/spi-nor/altera-asmip2.c
>  create mode 100644 include/linux/mtd/altera-asmip2.h
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 672b5d5..9583c1a 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -644,6 +644,13 @@ ALPS PS/2 TOUCHPAD DRIVER
>  R:   Pali Rohár 
>  F:   drivers/input/mouse/alps.*
>  
> +ALTERA ASMI Parallel II Driver
> +M:  Matthew Gerlach 
> +L:  linux-...@lists.infradead.org
> +S:  Maintained
> +F:  drivers/mtd/spi-nor/altera-asmip2.c
> +F:  inclulde/linux/mtd/altera-asmip2.h
> +
>  ALTERA MAILBOX DRIVER
>  M:   Ley Foon Tan 
>  L:   nios2-...@lists.rocketboards.org (moderated for non-subscribers)
> diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig
> index 69c638d..eb2c522 100644
> --- a/drivers/mtd/spi-nor/Kconfig
> +++ b/drivers/mtd/spi-nor/Kconfig
> @@ -129,4 +129,10 @@ config SPI_STM32_QUADSPI
> This enables support for the STM32 Quad SPI controller.
> We only connect the NOR to this controller.
>  
> +config SPI_ALTERA_ASMIP2
> + tristate "Altera ASMI Parallel II IP"
> + depends on OF && HAS_IOMEM
> + help
> +   Enable support for Altera ASMI Parallel II.
> +
>  endif # MTD_SPI_NOR
> diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile
> index c5f171d..1c79324 100644
> --- a/drivers/mtd/spi-nor/Makefile
> +++ b/drivers/mtd/spi-nor/Makefile
> @@ -1,4 +1,5 @@
>  obj-$(CONFIG_MTD_SPI_NOR)+= spi-nor.o
> +obj-$(CONFIG_SPI_ALTERA_ASMIP2)  += altera-asmip2.o
>  obj-$(CONFIG_SPI_ASPEED_SMC) += aspeed-smc.o
>  obj-$(CONFIG_SPI_ATMEL_QUADSPI)  += atmel-quadspi.o
>  obj-$(CONFIG_SPI_CADENCE_QUADSPI)+= cadence-quadspi.o
> @@ -9,4 +10,4 @@ obj-$(CONFIG_SPI_NXP_SPIFI)  += nxp-spifi.o
>  obj-$(CONFIG_SPI_INTEL_SPI)  += intel-spi.o
>  obj-$(CONFIG_SPI_INTEL_SPI_PCI)  += intel-spi-pci.o
>  obj-$(CONFIG_SPI_INTEL_SPI_PLATFORM) += intel-spi-platform.o
> -obj-$(CONFIG_SPI_STM32_QUADSPI)  += stm32-quadspi.o
> \ No newline at end of file
> +obj-$(CONFIG_SPI_STM32_QUADSPI)  += stm32-quadspi.o
> diff --git a/drivers/mtd/spi-nor/altera-asmip2.c 
> b/drivers/mtd/spi-nor/altera-asmip2.c
> new file mode 100644
> index 000..2095f2e
> --- /dev/null
> +++ b/drivers/mtd/spi-nor/altera-asmip2.c
> @@ -0,0 +1,474 @@
> +/*
> + * Copyright (C) 2017 Intel Corporation. All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms and conditions of the GNU General Public License,
> + * version 2, as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope it will be useful, but WITHOUT
> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
> + * more details.
> + *
> + * You should have received a copy of the GNU General Public License along 
> with
> + * this program.  If not, see .
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#define QSPI_ACTION_REG 0
> +#define QSPI_ACTION_RST BIT(0)
> +#define QSPI_ACTION_EN BIT(1)
> +#define QSPI_ACTION_SC BIT(2)
> +#define QSPI_ACTION_CHIP_SEL_SFT 4
> +#define QSPI_ACTION_DUMMY_SFT 8
> +#define QSPI_ACTION_READ_BACK_SFT 16
> +
> +#define QSPI_FIFO_CNT_REG 4
> +#define QSPI_FIFO_DEPTH 0x200
> +#define QSPI_FIFO_CNT_MSK 0x3ff
> +#define QSPI_FIFO_CNT_RX_SFT 0
> +#define QSPI_FIFO_CNT_TX_SFT 12
> +
> +#define QSPI_DATA_REG 0x8
> +
> +#define QSPI_POLL_TIMEOUT 1000
> +#define QSPI_POLL_INTERVAL 5
> +
> +struct altera_asmip2 {
> + void __iomem *csr_base;
> + u32 num_flashes;
> + struct device *dev;
> + struct altera_asmip2_flash *flash[ALTERA_ASMIP2_MAX_NUM_FLASH_CHIP];
> + struct mutex bus_mutex;
> +};
> +
> +struct altera_asmip2_flash {
> + struct spi_nor nor;
> + struct altera_asmip2 *q;
> + u32 bank;
> +};
> +
> +static int altera_asmip2_write_reg(struct spi_nor *nor, u8 opcode, u8 *val,
> + int len)
> +{
> + struct altera_asmip2_flash *flash = nor->priv;
> + struct altera_asmip2 *q = flash->q;
> + u32 reg;
> + int ret;
> + int i;
> +
> + if ((len + 1) > QSPI_FIFO_DEPTH) {
> + dev_err(q->dev, "%s bad len %d > %d\n",
> +

Re: [PATCH 2/2] mtd: spi-nor: Altera ASMI Parallel II IP Core

2017-08-11 Thread Cyrille Pitchen

Hi Matthew,

Le 06/08/2017 à 20:24, matthew.gerl...@linux.intel.com a écrit :
> From: Matthew Gerlach 
> 
> Signed-off-by: Matthew Gerlach 
> ---
>  MAINTAINERS |   7 +
>  drivers/mtd/spi-nor/Kconfig |   6 +
>  drivers/mtd/spi-nor/Makefile|   3 +-
>  drivers/mtd/spi-nor/altera-asmip2.c | 474 
> 
>  include/linux/mtd/altera-asmip2.h   |  24 ++
>  5 files changed, 513 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/mtd/spi-nor/altera-asmip2.c
>  create mode 100644 include/linux/mtd/altera-asmip2.h
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 672b5d5..9583c1a 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -644,6 +644,13 @@ ALPS PS/2 TOUCHPAD DRIVER
>  R:   Pali Rohár 
>  F:   drivers/input/mouse/alps.*
>  
> +ALTERA ASMI Parallel II Driver
> +M:  Matthew Gerlach 
> +L:  linux-...@lists.infradead.org
> +S:  Maintained
> +F:  drivers/mtd/spi-nor/altera-asmip2.c
> +F:  inclulde/linux/mtd/altera-asmip2.h
> +
>  ALTERA MAILBOX DRIVER
>  M:   Ley Foon Tan 
>  L:   nios2-...@lists.rocketboards.org (moderated for non-subscribers)
> diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig
> index 69c638d..eb2c522 100644
> --- a/drivers/mtd/spi-nor/Kconfig
> +++ b/drivers/mtd/spi-nor/Kconfig
> @@ -129,4 +129,10 @@ config SPI_STM32_QUADSPI
> This enables support for the STM32 Quad SPI controller.
> We only connect the NOR to this controller.
>  
> +config SPI_ALTERA_ASMIP2
> + tristate "Altera ASMI Parallel II IP"
> + depends on OF && HAS_IOMEM
> + help
> +   Enable support for Altera ASMI Parallel II.
> +
>  endif # MTD_SPI_NOR
> diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile
> index c5f171d..1c79324 100644
> --- a/drivers/mtd/spi-nor/Makefile
> +++ b/drivers/mtd/spi-nor/Makefile
> @@ -1,4 +1,5 @@
>  obj-$(CONFIG_MTD_SPI_NOR)+= spi-nor.o
> +obj-$(CONFIG_SPI_ALTERA_ASMIP2)  += altera-asmip2.o
>  obj-$(CONFIG_SPI_ASPEED_SMC) += aspeed-smc.o
>  obj-$(CONFIG_SPI_ATMEL_QUADSPI)  += atmel-quadspi.o
>  obj-$(CONFIG_SPI_CADENCE_QUADSPI)+= cadence-quadspi.o
> @@ -9,4 +10,4 @@ obj-$(CONFIG_SPI_NXP_SPIFI)  += nxp-spifi.o
>  obj-$(CONFIG_SPI_INTEL_SPI)  += intel-spi.o
>  obj-$(CONFIG_SPI_INTEL_SPI_PCI)  += intel-spi-pci.o
>  obj-$(CONFIG_SPI_INTEL_SPI_PLATFORM) += intel-spi-platform.o
> -obj-$(CONFIG_SPI_STM32_QUADSPI)  += stm32-quadspi.o
> \ No newline at end of file
> +obj-$(CONFIG_SPI_STM32_QUADSPI)  += stm32-quadspi.o
> diff --git a/drivers/mtd/spi-nor/altera-asmip2.c 
> b/drivers/mtd/spi-nor/altera-asmip2.c
> new file mode 100644
> index 000..2095f2e
> --- /dev/null
> +++ b/drivers/mtd/spi-nor/altera-asmip2.c
> @@ -0,0 +1,474 @@
> +/*
> + * Copyright (C) 2017 Intel Corporation. All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms and conditions of the GNU General Public License,
> + * version 2, as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope it will be useful, but WITHOUT
> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
> + * more details.
> + *
> + * You should have received a copy of the GNU General Public License along 
> with
> + * this program.  If not, see .
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#define QSPI_ACTION_REG 0
> +#define QSPI_ACTION_RST BIT(0)
> +#define QSPI_ACTION_EN BIT(1)
> +#define QSPI_ACTION_SC BIT(2)
> +#define QSPI_ACTION_CHIP_SEL_SFT 4
> +#define QSPI_ACTION_DUMMY_SFT 8
> +#define QSPI_ACTION_READ_BACK_SFT 16
> +
> +#define QSPI_FIFO_CNT_REG 4
> +#define QSPI_FIFO_DEPTH 0x200
> +#define QSPI_FIFO_CNT_MSK 0x3ff
> +#define QSPI_FIFO_CNT_RX_SFT 0
> +#define QSPI_FIFO_CNT_TX_SFT 12
> +
> +#define QSPI_DATA_REG 0x8
> +
> +#define QSPI_POLL_TIMEOUT 1000
> +#define QSPI_POLL_INTERVAL 5
> +
> +struct altera_asmip2 {
> + void __iomem *csr_base;
> + u32 num_flashes;
> + struct device *dev;
> + struct altera_asmip2_flash *flash[ALTERA_ASMIP2_MAX_NUM_FLASH_CHIP];
> + struct mutex bus_mutex;
> +};
> +
> +struct altera_asmip2_flash {
> + struct spi_nor nor;
> + struct altera_asmip2 *q;
> + u32 bank;
> +};
> +
> +static int altera_asmip2_write_reg(struct spi_nor *nor, u8 opcode, u8 *val,
> + int len)
> +{
> + struct altera_asmip2_flash *flash = nor->priv;
> + struct altera_asmip2 *q = flash->q;
> + u32 reg;
> + int ret;
> + int i;
> +
> + if ((len + 1) > QSPI_FIFO_DEPTH) {
> + dev_err(q->dev, "%s bad len %d > %d\n",
> + __func__, len + 1, QSPI_FIFO_DEPTH);
> + return -EINVAL;
> + }
> +
> + writel(opcode, q->csr_base + QSPI_DATA_REG);
> +
>

Re: [PATCH 2/2] mtd: spi-nor: Altera ASMI Parallel II IP Core

2017-08-07 Thread matthew . gerlach




On Sun, 6 Aug 2017, Marek Vasut wrote:


Hi Marek,

Thanks for the feedback.  Please see comments inline.

Matthew Gerlach


On 08/06/2017 08:24 PM, matthew.gerl...@linux.intel.com wrote:

From: Matthew Gerlach 


Thanks for the descriptive commit message. Could you explain what this
patch is all about ?


Ok, I will add more of a comment.



Signed-off-by: Matthew Gerlach 


[...]


diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile
index c5f171d..1c79324 100644
--- a/drivers/mtd/spi-nor/Makefile
+++ b/drivers/mtd/spi-nor/Makefile
@@ -1,4 +1,5 @@
 obj-$(CONFIG_MTD_SPI_NOR)  += spi-nor.o
+obj-$(CONFIG_SPI_ALTERA_ASMIP2)+= altera-asmip2.o
 obj-$(CONFIG_SPI_ASPEED_SMC)   += aspeed-smc.o
 obj-$(CONFIG_SPI_ATMEL_QUADSPI)+= atmel-quadspi.o
 obj-$(CONFIG_SPI_CADENCE_QUADSPI)  += cadence-quadspi.o
@@ -9,4 +10,4 @@ obj-$(CONFIG_SPI_NXP_SPIFI)+= nxp-spifi.o
 obj-$(CONFIG_SPI_INTEL_SPI)+= intel-spi.o
 obj-$(CONFIG_SPI_INTEL_SPI_PCI)+= intel-spi-pci.o
 obj-$(CONFIG_SPI_INTEL_SPI_PLATFORM)   += intel-spi-platform.o
-obj-$(CONFIG_SPI_STM32_QUADSPI)+= stm32-quadspi.o
\ No newline at end of file
+obj-$(CONFIG_SPI_STM32_QUADSPI)+= stm32-quadspi.o


Drop this hunk


I will fix this.




diff --git a/drivers/mtd/spi-nor/altera-asmip2.c 
b/drivers/mtd/spi-nor/altera-asmip2.c
new file mode 100644
index 000..2095f2e
--- /dev/null
+++ b/drivers/mtd/spi-nor/altera-asmip2.c
@@ -0,0 +1,474 @@
+/*
+ * Copyright (C) 2017 Intel Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see .
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define QSPI_ACTION_REG 0
+#define QSPI_ACTION_RST BIT(0)
+#define QSPI_ACTION_EN BIT(1)
+#define QSPI_ACTION_SC BIT(2)
+#define QSPI_ACTION_CHIP_SEL_SFT 4
+#define QSPI_ACTION_DUMMY_SFT 8
+#define QSPI_ACTION_READ_BACK_SFT 16
+
+#define QSPI_FIFO_CNT_REG 4
+#define QSPI_FIFO_DEPTH 0x200
+#define QSPI_FIFO_CNT_MSK 0x3ff
+#define QSPI_FIFO_CNT_RX_SFT 0
+#define QSPI_FIFO_CNT_TX_SFT 12


Indent the value with a tab at least ...


Ok, I can indent with tabs.




+#define QSPI_DATA_REG 0x8
+
+#define QSPI_POLL_TIMEOUT 1000


In what units is this ?


Units are in microseconds.  I will add a comment.




+#define QSPI_POLL_INTERVAL 5
+
+struct altera_asmip2 {
+   void __iomem *csr_base;
+   u32 num_flashes;
+   struct device *dev;
+   struct altera_asmip2_flash *flash[ALTERA_ASMIP2_MAX_NUM_FLASH_CHIP];
+   struct mutex bus_mutex;
+};
+
+struct altera_asmip2_flash {
+   struct spi_nor nor;
+   struct altera_asmip2 *q;
+   u32 bank;
+};
+
+static int altera_asmip2_write_reg(struct spi_nor *nor, u8 opcode, u8 *val,
+   int len)
+{
+   struct altera_asmip2_flash *flash = nor->priv;
+   struct altera_asmip2 *q = flash->q;
+   u32 reg;
+   int ret;
+   int i;
+
+   if ((len + 1) > QSPI_FIFO_DEPTH) {
+   dev_err(q->dev, "%s bad len %d > %d\n",
+   __func__, len + 1, QSPI_FIFO_DEPTH);
+   return -EINVAL;
+   }
+
+   writel(opcode, q->csr_base + QSPI_DATA_REG);
+
+   for (i = 0; i < len; i++) {
+   writel((u32)val[i], q->csr_base + QSPI_DATA_REG);


iowrite32_rep() ?


I don't think I can use iowrite32_rep() here because writes to the
register must be 32 bits, but the data to be written is 8 bits wide.




+   }
+
+   reg = QSPI_ACTION_EN | QSPI_ACTION_SC;
+
+   writel(reg, q->csr_base + QSPI_ACTION_REG);
+
+   ret = readl_poll_timeout(q->csr_base + QSPI_FIFO_CNT_REG, reg,
+(((reg >> QSPI_FIFO_CNT_TX_SFT) &
+QSPI_FIFO_CNT_MSK) == 0), QSPI_POLL_INTERVAL,
+QSPI_POLL_TIMEOUT);
+   if (ret)
+   dev_err(q->dev, "%s timed out\n", __func__);


So if the poll fails , you ignore the failure and continue enabling
whatever action you enable here ?


My intent is to put the controller in the ready state and shut off the 
failed action by clearing the QSPI_ACTION_SC bit.





+   reg = QSPI_ACTION_EN;
+
+   writel(reg, q->csr_base + QSPI_ACTION_REG);
+
+   return ret;
+}
+
+static int altera_asmip2_read_reg(struct spi_nor *nor, u8 opcode, u8 *val,
+  int

Re: [PATCH 2/2] mtd: spi-nor: Altera ASMI Parallel II IP Core

2017-08-07 Thread matthew . gerlach




On Sun, 6 Aug 2017, Marek Vasut wrote:


Hi Marek,

Thanks for the feedback.  Please see comments inline.

Matthew Gerlach


On 08/06/2017 08:24 PM, matthew.gerl...@linux.intel.com wrote:

From: Matthew Gerlach 


Thanks for the descriptive commit message. Could you explain what this
patch is all about ?


Ok, I will add more of a comment.



Signed-off-by: Matthew Gerlach 


[...]


diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile
index c5f171d..1c79324 100644
--- a/drivers/mtd/spi-nor/Makefile
+++ b/drivers/mtd/spi-nor/Makefile
@@ -1,4 +1,5 @@
 obj-$(CONFIG_MTD_SPI_NOR)  += spi-nor.o
+obj-$(CONFIG_SPI_ALTERA_ASMIP2)+= altera-asmip2.o
 obj-$(CONFIG_SPI_ASPEED_SMC)   += aspeed-smc.o
 obj-$(CONFIG_SPI_ATMEL_QUADSPI)+= atmel-quadspi.o
 obj-$(CONFIG_SPI_CADENCE_QUADSPI)  += cadence-quadspi.o
@@ -9,4 +10,4 @@ obj-$(CONFIG_SPI_NXP_SPIFI)+= nxp-spifi.o
 obj-$(CONFIG_SPI_INTEL_SPI)+= intel-spi.o
 obj-$(CONFIG_SPI_INTEL_SPI_PCI)+= intel-spi-pci.o
 obj-$(CONFIG_SPI_INTEL_SPI_PLATFORM)   += intel-spi-platform.o
-obj-$(CONFIG_SPI_STM32_QUADSPI)+= stm32-quadspi.o
\ No newline at end of file
+obj-$(CONFIG_SPI_STM32_QUADSPI)+= stm32-quadspi.o


Drop this hunk


I will fix this.




diff --git a/drivers/mtd/spi-nor/altera-asmip2.c 
b/drivers/mtd/spi-nor/altera-asmip2.c
new file mode 100644
index 000..2095f2e
--- /dev/null
+++ b/drivers/mtd/spi-nor/altera-asmip2.c
@@ -0,0 +1,474 @@
+/*
+ * Copyright (C) 2017 Intel Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see .
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define QSPI_ACTION_REG 0
+#define QSPI_ACTION_RST BIT(0)
+#define QSPI_ACTION_EN BIT(1)
+#define QSPI_ACTION_SC BIT(2)
+#define QSPI_ACTION_CHIP_SEL_SFT 4
+#define QSPI_ACTION_DUMMY_SFT 8
+#define QSPI_ACTION_READ_BACK_SFT 16
+
+#define QSPI_FIFO_CNT_REG 4
+#define QSPI_FIFO_DEPTH 0x200
+#define QSPI_FIFO_CNT_MSK 0x3ff
+#define QSPI_FIFO_CNT_RX_SFT 0
+#define QSPI_FIFO_CNT_TX_SFT 12


Indent the value with a tab at least ...


Ok, I can indent with tabs.




+#define QSPI_DATA_REG 0x8
+
+#define QSPI_POLL_TIMEOUT 1000


In what units is this ?


Units are in microseconds.  I will add a comment.




+#define QSPI_POLL_INTERVAL 5
+
+struct altera_asmip2 {
+   void __iomem *csr_base;
+   u32 num_flashes;
+   struct device *dev;
+   struct altera_asmip2_flash *flash[ALTERA_ASMIP2_MAX_NUM_FLASH_CHIP];
+   struct mutex bus_mutex;
+};
+
+struct altera_asmip2_flash {
+   struct spi_nor nor;
+   struct altera_asmip2 *q;
+   u32 bank;
+};
+
+static int altera_asmip2_write_reg(struct spi_nor *nor, u8 opcode, u8 *val,
+   int len)
+{
+   struct altera_asmip2_flash *flash = nor->priv;
+   struct altera_asmip2 *q = flash->q;
+   u32 reg;
+   int ret;
+   int i;
+
+   if ((len + 1) > QSPI_FIFO_DEPTH) {
+   dev_err(q->dev, "%s bad len %d > %d\n",
+   __func__, len + 1, QSPI_FIFO_DEPTH);
+   return -EINVAL;
+   }
+
+   writel(opcode, q->csr_base + QSPI_DATA_REG);
+
+   for (i = 0; i < len; i++) {
+   writel((u32)val[i], q->csr_base + QSPI_DATA_REG);


iowrite32_rep() ?


I don't think I can use iowrite32_rep() here because writes to the
register must be 32 bits, but the data to be written is 8 bits wide.




+   }
+
+   reg = QSPI_ACTION_EN | QSPI_ACTION_SC;
+
+   writel(reg, q->csr_base + QSPI_ACTION_REG);
+
+   ret = readl_poll_timeout(q->csr_base + QSPI_FIFO_CNT_REG, reg,
+(((reg >> QSPI_FIFO_CNT_TX_SFT) &
+QSPI_FIFO_CNT_MSK) == 0), QSPI_POLL_INTERVAL,
+QSPI_POLL_TIMEOUT);
+   if (ret)
+   dev_err(q->dev, "%s timed out\n", __func__);


So if the poll fails , you ignore the failure and continue enabling
whatever action you enable here ?


My intent is to put the controller in the ready state and shut off the 
failed action by clearing the QSPI_ACTION_SC bit.





+   reg = QSPI_ACTION_EN;
+
+   writel(reg, q->csr_base + QSPI_ACTION_REG);
+
+   return ret;
+}
+
+static int altera_asmip2_read_reg(struct spi_nor *nor, u8 opcode, u8 *val,
+  int len)
+{
+   struct altera_asmip2_flash *flash = nor->priv;
+

Re: [PATCH 2/2] mtd: spi-nor: Altera ASMI Parallel II IP Core (fwd)

2017-08-07 Thread Julia Lawall

dev_err does not seem possible to use here (line 447).

julia

-- Forwarded message --
Date: Mon, 7 Aug 2017 04:45:58 +0800
From: kbuild test robot <fengguang...@intel.com>
To: kbu...@01.org
Cc: Julia Lawall <julia.law...@lip6.fr>
Subject: Re: [PATCH 2/2] mtd: spi-nor: Altera ASMI Parallel II IP Core

Hi Matthew,

[auto build test WARNING on next-20170804]
[also build test WARNING on v4.13-rc3]
[cannot apply to mtd/spi-nor/fixes linus/master mtd/master v4.13-rc3 v4.13-rc2 
v4.13-rc1]
[if your patch is applied to the wrong git tree, please drop us a note to help 
improve the system]

url:
https://github.com/0day-ci/linux/commits/matthew-gerlach-linux-intel-com/dt-bindings-mtd-Altera-ASMI-Parallel-II-IP-Core/20170807-023147
:: branch date: 2 hours ago
:: commit date: 2 hours ago

>> drivers/mtd/spi-nor/altera-asmip2.c:447:17-20: ERROR: pdev is NULL but 
>> dereferenced.

# 
https://github.com/0day-ci/linux/commit/ec2e26c1b07806d734a2939530e7d4b4d7c67f0c
git remote add linux-review https://github.com/0day-ci/linux
git remote update linux-review
git checkout ec2e26c1b07806d734a2939530e7d4b4d7c67f0c
vim +447 drivers/mtd/spi-nor/altera-asmip2.c

ec2e26c1 Matthew Gerlach 2017-08-06  443
ec2e26c1 Matthew Gerlach 2017-08-06  444  static int 
altera_asmip2_remove(struct platform_device *pdev)
ec2e26c1 Matthew Gerlach 2017-08-06  445  {
ec2e26c1 Matthew Gerlach 2017-08-06  446if (!pdev) {
ec2e26c1 Matthew Gerlach 2017-08-06 @447dev_err(>dev, "%s 
NULL\n", __func__);
ec2e26c1 Matthew Gerlach 2017-08-06  448return -EINVAL;
ec2e26c1 Matthew Gerlach 2017-08-06  449} else {
ec2e26c1 Matthew Gerlach 2017-08-06  450return 
altera_asmip2_remove_banks(>dev);
ec2e26c1 Matthew Gerlach 2017-08-06  451}
ec2e26c1 Matthew Gerlach 2017-08-06  452  }
ec2e26c1 Matthew Gerlach 2017-08-06  453

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation

Re: [PATCH 2/2] mtd: spi-nor: Altera ASMI Parallel II IP Core (fwd)

2017-08-07 Thread Julia Lawall

dev_err does not seem possible to use here (line 447).

julia

-- Forwarded message --
Date: Mon, 7 Aug 2017 04:45:58 +0800
From: kbuild test robot 
To: kbu...@01.org
Cc: Julia Lawall 
Subject: Re: [PATCH 2/2] mtd: spi-nor: Altera ASMI Parallel II IP Core

Hi Matthew,

[auto build test WARNING on next-20170804]
[also build test WARNING on v4.13-rc3]
[cannot apply to mtd/spi-nor/fixes linus/master mtd/master v4.13-rc3 v4.13-rc2 
v4.13-rc1]
[if your patch is applied to the wrong git tree, please drop us a note to help 
improve the system]

url:
https://github.com/0day-ci/linux/commits/matthew-gerlach-linux-intel-com/dt-bindings-mtd-Altera-ASMI-Parallel-II-IP-Core/20170807-023147
:: branch date: 2 hours ago
:: commit date: 2 hours ago

>> drivers/mtd/spi-nor/altera-asmip2.c:447:17-20: ERROR: pdev is NULL but 
>> dereferenced.

# 
https://github.com/0day-ci/linux/commit/ec2e26c1b07806d734a2939530e7d4b4d7c67f0c
git remote add linux-review https://github.com/0day-ci/linux
git remote update linux-review
git checkout ec2e26c1b07806d734a2939530e7d4b4d7c67f0c
vim +447 drivers/mtd/spi-nor/altera-asmip2.c

ec2e26c1 Matthew Gerlach 2017-08-06  443
ec2e26c1 Matthew Gerlach 2017-08-06  444  static int 
altera_asmip2_remove(struct platform_device *pdev)
ec2e26c1 Matthew Gerlach 2017-08-06  445  {
ec2e26c1 Matthew Gerlach 2017-08-06  446if (!pdev) {
ec2e26c1 Matthew Gerlach 2017-08-06 @447dev_err(>dev, "%s 
NULL\n", __func__);
ec2e26c1 Matthew Gerlach 2017-08-06  448return -EINVAL;
ec2e26c1 Matthew Gerlach 2017-08-06  449} else {
ec2e26c1 Matthew Gerlach 2017-08-06  450return 
altera_asmip2_remove_banks(>dev);
ec2e26c1 Matthew Gerlach 2017-08-06  451}
ec2e26c1 Matthew Gerlach 2017-08-06  452  }
ec2e26c1 Matthew Gerlach 2017-08-06  453

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation

Re: [PATCH 2/2] mtd: spi-nor: Altera ASMI Parallel II IP Core

2017-08-06 Thread Marek Vasut

On 08/06/2017 08:24 PM, matthew.gerl...@linux.intel.com wrote:
> From: Matthew Gerlach 

Thanks for the descriptive commit message. Could you explain what this
patch is all about ?

> Signed-off-by: Matthew Gerlach 

[...]

> diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile
> index c5f171d..1c79324 100644
> --- a/drivers/mtd/spi-nor/Makefile
> +++ b/drivers/mtd/spi-nor/Makefile
> @@ -1,4 +1,5 @@
>  obj-$(CONFIG_MTD_SPI_NOR)+= spi-nor.o
> +obj-$(CONFIG_SPI_ALTERA_ASMIP2)  += altera-asmip2.o
>  obj-$(CONFIG_SPI_ASPEED_SMC) += aspeed-smc.o
>  obj-$(CONFIG_SPI_ATMEL_QUADSPI)  += atmel-quadspi.o
>  obj-$(CONFIG_SPI_CADENCE_QUADSPI)+= cadence-quadspi.o
> @@ -9,4 +10,4 @@ obj-$(CONFIG_SPI_NXP_SPIFI)  += nxp-spifi.o
>  obj-$(CONFIG_SPI_INTEL_SPI)  += intel-spi.o
>  obj-$(CONFIG_SPI_INTEL_SPI_PCI)  += intel-spi-pci.o
>  obj-$(CONFIG_SPI_INTEL_SPI_PLATFORM) += intel-spi-platform.o
> -obj-$(CONFIG_SPI_STM32_QUADSPI)  += stm32-quadspi.o
> \ No newline at end of file
> +obj-$(CONFIG_SPI_STM32_QUADSPI)  += stm32-quadspi.o

Drop this hunk

> diff --git a/drivers/mtd/spi-nor/altera-asmip2.c 
> b/drivers/mtd/spi-nor/altera-asmip2.c
> new file mode 100644
> index 000..2095f2e
> --- /dev/null
> +++ b/drivers/mtd/spi-nor/altera-asmip2.c
> @@ -0,0 +1,474 @@
> +/*
> + * Copyright (C) 2017 Intel Corporation. All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms and conditions of the GNU General Public License,
> + * version 2, as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope it will be useful, but WITHOUT
> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
> + * more details.
> + *
> + * You should have received a copy of the GNU General Public License along 
> with
> + * this program.  If not, see .
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#define QSPI_ACTION_REG 0
> +#define QSPI_ACTION_RST BIT(0)
> +#define QSPI_ACTION_EN BIT(1)
> +#define QSPI_ACTION_SC BIT(2)
> +#define QSPI_ACTION_CHIP_SEL_SFT 4
> +#define QSPI_ACTION_DUMMY_SFT 8
> +#define QSPI_ACTION_READ_BACK_SFT 16
> +
> +#define QSPI_FIFO_CNT_REG 4
> +#define QSPI_FIFO_DEPTH 0x200
> +#define QSPI_FIFO_CNT_MSK 0x3ff
> +#define QSPI_FIFO_CNT_RX_SFT 0
> +#define QSPI_FIFO_CNT_TX_SFT 12

Indent the value with a tab at least ...

> +#define QSPI_DATA_REG 0x8
> +
> +#define QSPI_POLL_TIMEOUT 1000

In what units is this ?

> +#define QSPI_POLL_INTERVAL 5
> +
> +struct altera_asmip2 {
> + void __iomem *csr_base;
> + u32 num_flashes;
> + struct device *dev;
> + struct altera_asmip2_flash *flash[ALTERA_ASMIP2_MAX_NUM_FLASH_CHIP];
> + struct mutex bus_mutex;
> +};
> +
> +struct altera_asmip2_flash {
> + struct spi_nor nor;
> + struct altera_asmip2 *q;
> + u32 bank;
> +};
> +
> +static int altera_asmip2_write_reg(struct spi_nor *nor, u8 opcode, u8 *val,
> + int len)
> +{
> + struct altera_asmip2_flash *flash = nor->priv;
> + struct altera_asmip2 *q = flash->q;
> + u32 reg;
> + int ret;
> + int i;
> +
> + if ((len + 1) > QSPI_FIFO_DEPTH) {
> + dev_err(q->dev, "%s bad len %d > %d\n",
> + __func__, len + 1, QSPI_FIFO_DEPTH);
> + return -EINVAL;
> + }
> +
> + writel(opcode, q->csr_base + QSPI_DATA_REG);
> +
> + for (i = 0; i < len; i++) {
> + writel((u32)val[i], q->csr_base + QSPI_DATA_REG);

iowrite32_rep() ?

> + }
> +
> + reg = QSPI_ACTION_EN | QSPI_ACTION_SC;
> +
> + writel(reg, q->csr_base + QSPI_ACTION_REG);
> +
> + ret = readl_poll_timeout(q->csr_base + QSPI_FIFO_CNT_REG, reg,
> +  (((reg >> QSPI_FIFO_CNT_TX_SFT) &
> +  QSPI_FIFO_CNT_MSK) == 0), QSPI_POLL_INTERVAL,
> +  QSPI_POLL_TIMEOUT);
> + if (ret)
> + dev_err(q->dev, "%s timed out\n", __func__);

So if the poll fails , you ignore the failure and continue enabling
whatever action you enable here ?

> + reg = QSPI_ACTION_EN;
> +
> + writel(reg, q->csr_base + QSPI_ACTION_REG);
> +
> + return ret;
> +}
> +
> +static int altera_asmip2_read_reg(struct spi_nor *nor, u8 opcode, u8 *val,
> +int len)
> +{
> + struct altera_asmip2_flash *flash = nor->priv;
> + struct altera_asmip2 *q = flash->q;
> + u32 reg;
> + int ret;
> + int i;
> +
> + if (len > QSPI_FIFO_DEPTH) {
> + dev_err(q->dev, "%s bad len %d > %d\n",
> + __func__, len, QSPI_FIFO_DEPTH);
> + return -EINVAL;
> + }
> +
> + writel(opcode, q->csr_base +

Re: [PATCH 2/2] mtd: spi-nor: Altera ASMI Parallel II IP Core

2017-08-06 Thread Marek Vasut

On 08/06/2017 08:24 PM, matthew.gerl...@linux.intel.com wrote:
> From: Matthew Gerlach 

Thanks for the descriptive commit message. Could you explain what this
patch is all about ?

> Signed-off-by: Matthew Gerlach 

[...]

> diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile
> index c5f171d..1c79324 100644
> --- a/drivers/mtd/spi-nor/Makefile
> +++ b/drivers/mtd/spi-nor/Makefile
> @@ -1,4 +1,5 @@
>  obj-$(CONFIG_MTD_SPI_NOR)+= spi-nor.o
> +obj-$(CONFIG_SPI_ALTERA_ASMIP2)  += altera-asmip2.o
>  obj-$(CONFIG_SPI_ASPEED_SMC) += aspeed-smc.o
>  obj-$(CONFIG_SPI_ATMEL_QUADSPI)  += atmel-quadspi.o
>  obj-$(CONFIG_SPI_CADENCE_QUADSPI)+= cadence-quadspi.o
> @@ -9,4 +10,4 @@ obj-$(CONFIG_SPI_NXP_SPIFI)  += nxp-spifi.o
>  obj-$(CONFIG_SPI_INTEL_SPI)  += intel-spi.o
>  obj-$(CONFIG_SPI_INTEL_SPI_PCI)  += intel-spi-pci.o
>  obj-$(CONFIG_SPI_INTEL_SPI_PLATFORM) += intel-spi-platform.o
> -obj-$(CONFIG_SPI_STM32_QUADSPI)  += stm32-quadspi.o
> \ No newline at end of file
> +obj-$(CONFIG_SPI_STM32_QUADSPI)  += stm32-quadspi.o

Drop this hunk

> diff --git a/drivers/mtd/spi-nor/altera-asmip2.c 
> b/drivers/mtd/spi-nor/altera-asmip2.c
> new file mode 100644
> index 000..2095f2e
> --- /dev/null
> +++ b/drivers/mtd/spi-nor/altera-asmip2.c
> @@ -0,0 +1,474 @@
> +/*
> + * Copyright (C) 2017 Intel Corporation. All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms and conditions of the GNU General Public License,
> + * version 2, as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope it will be useful, but WITHOUT
> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
> + * more details.
> + *
> + * You should have received a copy of the GNU General Public License along 
> with
> + * this program.  If not, see .
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#define QSPI_ACTION_REG 0
> +#define QSPI_ACTION_RST BIT(0)
> +#define QSPI_ACTION_EN BIT(1)
> +#define QSPI_ACTION_SC BIT(2)
> +#define QSPI_ACTION_CHIP_SEL_SFT 4
> +#define QSPI_ACTION_DUMMY_SFT 8
> +#define QSPI_ACTION_READ_BACK_SFT 16
> +
> +#define QSPI_FIFO_CNT_REG 4
> +#define QSPI_FIFO_DEPTH 0x200
> +#define QSPI_FIFO_CNT_MSK 0x3ff
> +#define QSPI_FIFO_CNT_RX_SFT 0
> +#define QSPI_FIFO_CNT_TX_SFT 12

Indent the value with a tab at least ...

> +#define QSPI_DATA_REG 0x8
> +
> +#define QSPI_POLL_TIMEOUT 1000

In what units is this ?

> +#define QSPI_POLL_INTERVAL 5
> +
> +struct altera_asmip2 {
> + void __iomem *csr_base;
> + u32 num_flashes;
> + struct device *dev;
> + struct altera_asmip2_flash *flash[ALTERA_ASMIP2_MAX_NUM_FLASH_CHIP];
> + struct mutex bus_mutex;
> +};
> +
> +struct altera_asmip2_flash {
> + struct spi_nor nor;
> + struct altera_asmip2 *q;
> + u32 bank;
> +};
> +
> +static int altera_asmip2_write_reg(struct spi_nor *nor, u8 opcode, u8 *val,
> + int len)
> +{
> + struct altera_asmip2_flash *flash = nor->priv;
> + struct altera_asmip2 *q = flash->q;
> + u32 reg;
> + int ret;
> + int i;
> +
> + if ((len + 1) > QSPI_FIFO_DEPTH) {
> + dev_err(q->dev, "%s bad len %d > %d\n",
> + __func__, len + 1, QSPI_FIFO_DEPTH);
> + return -EINVAL;
> + }
> +
> + writel(opcode, q->csr_base + QSPI_DATA_REG);
> +
> + for (i = 0; i < len; i++) {
> + writel((u32)val[i], q->csr_base + QSPI_DATA_REG);

iowrite32_rep() ?

> + }
> +
> + reg = QSPI_ACTION_EN | QSPI_ACTION_SC;
> +
> + writel(reg, q->csr_base + QSPI_ACTION_REG);
> +
> + ret = readl_poll_timeout(q->csr_base + QSPI_FIFO_CNT_REG, reg,
> +  (((reg >> QSPI_FIFO_CNT_TX_SFT) &
> +  QSPI_FIFO_CNT_MSK) == 0), QSPI_POLL_INTERVAL,
> +  QSPI_POLL_TIMEOUT);
> + if (ret)
> + dev_err(q->dev, "%s timed out\n", __func__);

So if the poll fails , you ignore the failure and continue enabling
whatever action you enable here ?

> + reg = QSPI_ACTION_EN;
> +
> + writel(reg, q->csr_base + QSPI_ACTION_REG);
> +
> + return ret;
> +}
> +
> +static int altera_asmip2_read_reg(struct spi_nor *nor, u8 opcode, u8 *val,
> +int len)
> +{
> + struct altera_asmip2_flash *flash = nor->priv;
> + struct altera_asmip2 *q = flash->q;
> + u32 reg;
> + int ret;
> + int i;
> +
> + if (len > QSPI_FIFO_DEPTH) {
> + dev_err(q->dev, "%s bad len %d > %d\n",
> + __func__, len, QSPI_FIFO_DEPTH);
> + return -EINVAL;
> + }
> +
> + writel(opcode, q->csr_base + QSPI_DATA_REG);
> +
> + reg = QSPI_ACTION_EN | QSPI_ACTION_SC |
> +

Re: [PATCH 2/2] mtd: spi-nor: Altera ASMI Parallel II IP Core

Re: [PATCH 2/2] mtd: spi-nor: Altera ASMI Parallel II IP Core

Re: [PATCH 2/2] mtd: spi-nor: Altera ASMI Parallel II IP Core

Re: [PATCH 2/2] mtd: spi-nor: Altera ASMI Parallel II IP Core

Re: [PATCH 2/2] mtd: spi-nor: Altera ASMI Parallel II IP Core

Re: [PATCH 2/2] mtd: spi-nor: Altera ASMI Parallel II IP Core

Re: [PATCH 2/2] mtd: spi-nor: Altera ASMI Parallel II IP Core

Re: [PATCH 2/2] mtd: spi-nor: Altera ASMI Parallel II IP Core

Re: [PATCH 2/2] mtd: spi-nor: Altera ASMI Parallel II IP Core

Re: [PATCH 2/2] mtd: spi-nor: Altera ASMI Parallel II IP Core

Re: [PATCH 2/2] mtd: spi-nor: Altera ASMI Parallel II IP Core (fwd)

Re: [PATCH 2/2] mtd: spi-nor: Altera ASMI Parallel II IP Core (fwd)

Re: [PATCH 2/2] mtd: spi-nor: Altera ASMI Parallel II IP Core

Re: [PATCH 2/2] mtd: spi-nor: Altera ASMI Parallel II IP Core

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