On Fri, Nov 16, 2012 at 07:27:12PM -0700, Jon Mason wrote:
> A PCI-Express non-transparent bridge (NTB) is a point-to-point PCIe bus
> connecting 2 systems, providing electrical isolation between the two
> subsystems.
> A non-transparent bridge is functionally similar to a transparent bridge
>
On Fri, Nov 16, 2012 at 07:27:12PM -0700, Jon Mason wrote:
A PCI-Express non-transparent bridge (NTB) is a point-to-point PCIe bus
connecting 2 systems, providing electrical isolation between the two
subsystems.
A non-transparent bridge is functionally similar to a transparent bridge
except
On Thu, Nov 15, 2012 at 06:06:21PM -0700, Jon Mason wrote:
> > > +static inline unsigned int ntb_query_max_cbs(struct ntb_device *ndev)
> > > +{
> > > + return ndev->max_cbs;
> > > +}
> >
> > It is shorter, and simpler, to just write the '->variable' version out
> > for this, than to make the
On Thu, Nov 15, 2012 at 04:29:04PM -0800, Greg KH wrote:
> On Mon, Nov 05, 2012 at 05:11:08PM -0700, Jon Mason wrote:
> > --- /dev/null
> > +++ b/drivers/ntb/ntb_hw.h
> > @@ -0,0 +1,195 @@
> > +/*
> > + * This file is provided under a dual BSD/GPLv2 license. When using or
> > + * redistributing
On Mon, Nov 05, 2012 at 05:11:08PM -0700, Jon Mason wrote:
> +static int __init ntb_init_module(void)
> +{
> + pr_info("%s: %s, version %s\n", KBUILD_MODNAME, NTB_NAME, NTB_VER);
No need to be noisy.
> +
> + return pci_register_driver(_pci_driver);
> +}
> +module_init(ntb_init_module);
>
On Mon, Nov 05, 2012 at 05:11:08PM -0700, Jon Mason wrote:
> --- /dev/null
> +++ b/drivers/ntb/ntb_hw.h
> @@ -0,0 +1,195 @@
> +/*
> + * This file is provided under a dual BSD/GPLv2 license. When using or
> + * redistributing this file, you may do so under either license.
> + *
> + * GPL
On Mon, Nov 05, 2012 at 05:11:08PM -0700, Jon Mason wrote:
--- /dev/null
+++ b/drivers/ntb/ntb_hw.h
@@ -0,0 +1,195 @@
+/*
+ * This file is provided under a dual BSD/GPLv2 license. When using or
+ * redistributing this file, you may do so under either license.
+ *
+ * GPL LICENSE
On Mon, Nov 05, 2012 at 05:11:08PM -0700, Jon Mason wrote:
+static int __init ntb_init_module(void)
+{
+ pr_info(%s: %s, version %s\n, KBUILD_MODNAME, NTB_NAME, NTB_VER);
No need to be noisy.
+
+ return pci_register_driver(ntb_pci_driver);
+}
+module_init(ntb_init_module);
+
On Thu, Nov 15, 2012 at 04:29:04PM -0800, Greg KH wrote:
On Mon, Nov 05, 2012 at 05:11:08PM -0700, Jon Mason wrote:
--- /dev/null
+++ b/drivers/ntb/ntb_hw.h
@@ -0,0 +1,195 @@
+/*
+ * This file is provided under a dual BSD/GPLv2 license. When using or
+ * redistributing this file,
On Thu, Nov 15, 2012 at 06:06:21PM -0700, Jon Mason wrote:
+static inline unsigned int ntb_query_max_cbs(struct ntb_device *ndev)
+{
+ return ndev-max_cbs;
+}
It is shorter, and simpler, to just write the '-variable' version out
for this, than to make the function call here.
On Sun, Oct 07, 2012 at 02:13:44PM +0200, Jakub Kicinski wrote:
> Hi,
>
> it's good to see some NTB code getting into mainline! I have a few comments
> though.
>
> On Tue, 02 Oct 2012 21:26:16 -, Jon Mason
> wrote:
>
> [...]
> >+/**
> >+ * ntb_write_local_spad() - write to the secondary
On Sun, Oct 07, 2012 at 02:13:44PM +0200, Jakub Kicinski wrote:
Hi,
it's good to see some NTB code getting into mainline! I have a few comments
though.
On Tue, 02 Oct 2012 21:26:16 -, Jon Mason jon.ma...@intel.com
wrote:
[...]
+/**
+ * ntb_write_local_spad() - write to the
Hi,
it's good to see some NTB code getting into mainline! I have a few comments
though.
On Tue, 02 Oct 2012 21:26:16 -, Jon Mason
wrote:
[...]
>+/**
>+ * ntb_write_local_spad() - write to the secondary scratchpad register
>+ * @ndev: pointer to ntb_device instance
>+ * @idx: index to the
Hi,
it's good to see some NTB code getting into mainline! I have a few comments
though.
On Tue, 02 Oct 2012 21:26:16 -, Jon Mason jon.ma...@intel.com
wrote:
[...]
+/**
+ * ntb_write_local_spad() - write to the secondary scratchpad register
+ * @ndev: pointer to ntb_device instance
+ * @idx:
On Fri, Sep 21, 2012 at 02:14:47PM -0400, David Miller wrote:
> From: Jon Mason
> Date: Fri, 21 Sep 2012 11:09:48 -0700
>
> > A PCI-Express non-transparent bridge (NTB) is a point-to-point PCIe bus
> > connecting 2 systems, providing electrical isolation between the two
> > subsystems.
> > A
From: Jon Mason
Date: Fri, 21 Sep 2012 11:09:48 -0700
> A PCI-Express non-transparent bridge (NTB) is a point-to-point PCIe bus
> connecting 2 systems, providing electrical isolation between the two
> subsystems.
> A non-transparent bridge is functionally similar to a transparent bridge
>
From: Jon Mason jon.ma...@intel.com
Date: Fri, 21 Sep 2012 11:09:48 -0700
A PCI-Express non-transparent bridge (NTB) is a point-to-point PCIe bus
connecting 2 systems, providing electrical isolation between the two
subsystems.
A non-transparent bridge is functionally similar to a transparent
On Fri, Sep 21, 2012 at 02:14:47PM -0400, David Miller wrote:
From: Jon Mason jon.ma...@intel.com
Date: Fri, 21 Sep 2012 11:09:48 -0700
A PCI-Express non-transparent bridge (NTB) is a point-to-point PCIe bus
connecting 2 systems, providing electrical isolation between the two
On Tue, Jul 31, 2012 at 03:25:55PM -0700, Greg KH wrote:
> On Sun, Jul 29, 2012 at 05:26:33PM -0700, Jon Mason wrote:
> > +struct ntb_transport_qp;
> > +
> > +struct ntb_client {
> > + char *name;
> > + int (*probe) (struct pci_dev *pdev);
> > + void (*remove) (struct pci_dev *pdev);
> > +};
On Tue, Jul 31, 2012 at 02:02:25PM -0400, chetan loke wrote:
> On Tue, Jul 31, 2012 at 1:27 PM, Jon Mason wrote:
> >
> > I don't see the benefit of having the driver in staging. Any vendors
> > who would notice the ntb driver in staging would be sitting on these
> > mailing lists and hopefully
On Tue, Jul 31, 2012 at 02:02:25PM -0400, chetan loke wrote:
On Tue, Jul 31, 2012 at 1:27 PM, Jon Mason jon.ma...@intel.com wrote:
I don't see the benefit of having the driver in staging. Any vendors
who would notice the ntb driver in staging would be sitting on these
mailing lists and
On Tue, Jul 31, 2012 at 03:25:55PM -0700, Greg KH wrote:
On Sun, Jul 29, 2012 at 05:26:33PM -0700, Jon Mason wrote:
+struct ntb_transport_qp;
+
+struct ntb_client {
+ char *name;
+ int (*probe) (struct pci_dev *pdev);
+ void (*remove) (struct pci_dev *pdev);
+};
Why isn't
On Jul 31, 2012, at 7:10 PM, "Jianbin Kang" wrote:
>> Actually this is what I'm working on now, using async_tx to replace the
>> memcpy. I believe the changes shouldn't be that significant.
>>
>> Is the "hardware that can setup dma" you refer to something that does
>> not use this interface?
> Actually this is what I'm working on now, using async_tx to replace the
> memcpy. I believe the changes shouldn't be that significant.
>
> Is the "hardware that can setup dma" you refer to something that does
> not use this interface?
>
Yes, they use this interface, but split 'memcpy_toio' to
On Tue, Jul 31, 2012 at 03:51:05PM -0700, Jon Mason wrote:
> On Tue, Jul 31, 2012 at 03:23:38PM -0700, Greg KH wrote:
> > On Sun, Jul 29, 2012 at 05:26:33PM -0700, Jon Mason wrote:
> > > + * You should have received a copy of the GNU General Public License
> > > + * along with this program; if
On Tue, Jul 31, 2012 at 03:23:38PM -0700, Greg KH wrote:
> On Sun, Jul 29, 2012 at 05:26:33PM -0700, Jon Mason wrote:
> > + * You should have received a copy of the GNU General Public License
> > + * along with this program; if not, write to the Free Software
> > + * Foundation, Inc., 51
On Sun, Jul 29, 2012 at 05:26:33PM -0700, Jon Mason wrote:
> +struct ntb_transport_qp;
> +
> +struct ntb_client {
> + char *name;
> + int (*probe) (struct pci_dev *pdev);
> + void (*remove) (struct pci_dev *pdev);
> +};
Why isn't this tied into the driver model? That looks like you
On Sun, Jul 29, 2012 at 05:26:33PM -0700, Jon Mason wrote:
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301
> USA.
You really
On Tue, Jul 31, 2012 at 1:27 PM, Jon Mason wrote:
>
> I don't see the benefit of having the driver in staging. Any vendors
> who would notice the ntb driver in staging would be sitting on these
> mailing lists and hopefully have planety of comments on the design.
> Stashing the driver in staging
On Tue, Jul 31, 2012 at 12:02:20PM -0400, chetan loke wrote:
> On Tue, Jul 31, 2012 at 9:45 AM, Bjorn Helgaas wrote:
> > On Mon, Jul 30, 2012 at 12:15 PM, Jon Mason wrote:
> >>
> >> I've tried to make it all generic enough that non-Intel NTBs should plug
> >> in with
> >> minimal changes to
On Tue, Jul 31, 2012 at 07:45:29AM -0600, Bjorn Helgaas wrote:
> On Mon, Jul 30, 2012 at 12:15 PM, Jon Mason wrote:
> > On Mon, Jul 30, 2012 at 10:50:13AM -0600, Bjorn Helgaas wrote:
> >> On Sun, Jul 29, 2012 at 6:26 PM, Jon Mason wrote:
> >> > A PCI-Express non-transparent bridge (NTB) is a
On Tue, Jul 31, 2012 at 10:02 AM, chetan loke wrote:
> On Tue, Jul 31, 2012 at 9:45 AM, Bjorn Helgaas wrote:
>> On Mon, Jul 30, 2012 at 12:15 PM, Jon Mason wrote:
>>>
>>> I've tried to make it all generic enough that non-Intel NTBs should plug in
>>> with
>>> minimal changes to ntb_hw.c. If
On Tue, Jul 31, 2012 at 11:35:33AM +0800, Jianbin Kang wrote:
> > I've tried to make it all generic enough that non-Intel NTBs should plug in
> > with
> > minimal changes to ntb_hw.c. If their design is too divergent, then a
> > slight
> > redesign of ntb_hw.c might be necessary. But from what
On Sun, Jul 29, 2012 at 8:26 PM, Jon Mason wrote:
> +static void ntb_tx_copy_task(struct ntb_transport_qp *qp,
> +struct ntb_queue_entry *entry,
> +void *offset)
> +{
> + struct ntb_payload_header *hdr = offset;
> +
> + offset
On Tue, Jul 31, 2012 at 9:45 AM, Bjorn Helgaas wrote:
> On Mon, Jul 30, 2012 at 12:15 PM, Jon Mason wrote:
>>
>> I've tried to make it all generic enough that non-Intel NTBs should plug in
>> with
>> minimal changes to ntb_hw.c. If their design is too divergent, then a slight
>> redesign of
On Mon, Jul 30, 2012 at 12:15 PM, Jon Mason wrote:
> On Mon, Jul 30, 2012 at 10:50:13AM -0600, Bjorn Helgaas wrote:
>> On Sun, Jul 29, 2012 at 6:26 PM, Jon Mason wrote:
>> > A PCI-Express non-transparent bridge (NTB) is a point-to-point PCIe bus
>> > connecting 2 systems, providing electrical
On Mon, Jul 30, 2012 at 12:15 PM, Jon Mason jon.ma...@intel.com wrote:
On Mon, Jul 30, 2012 at 10:50:13AM -0600, Bjorn Helgaas wrote:
On Sun, Jul 29, 2012 at 6:26 PM, Jon Mason jon.ma...@intel.com wrote:
A PCI-Express non-transparent bridge (NTB) is a point-to-point PCIe bus
connecting 2
On Tue, Jul 31, 2012 at 9:45 AM, Bjorn Helgaas bhelg...@google.com wrote:
On Mon, Jul 30, 2012 at 12:15 PM, Jon Mason jon.ma...@intel.com wrote:
I've tried to make it all generic enough that non-Intel NTBs should plug in
with
minimal changes to ntb_hw.c. If their design is too divergent,
On Sun, Jul 29, 2012 at 8:26 PM, Jon Mason jon.ma...@intel.com wrote:
snip
+static void ntb_tx_copy_task(struct ntb_transport_qp *qp,
+struct ntb_queue_entry *entry,
+void *offset)
+{
+ struct ntb_payload_header *hdr = offset;
+
On Tue, Jul 31, 2012 at 11:35:33AM +0800, Jianbin Kang wrote:
I've tried to make it all generic enough that non-Intel NTBs should plug in
with
minimal changes to ntb_hw.c. If their design is too divergent, then a
slight
redesign of ntb_hw.c might be necessary. But from what I've seen
On Tue, Jul 31, 2012 at 10:02 AM, chetan loke loke.che...@gmail.com wrote:
On Tue, Jul 31, 2012 at 9:45 AM, Bjorn Helgaas bhelg...@google.com wrote:
On Mon, Jul 30, 2012 at 12:15 PM, Jon Mason jon.ma...@intel.com wrote:
I've tried to make it all generic enough that non-Intel NTBs should plug
On Tue, Jul 31, 2012 at 07:45:29AM -0600, Bjorn Helgaas wrote:
On Mon, Jul 30, 2012 at 12:15 PM, Jon Mason jon.ma...@intel.com wrote:
On Mon, Jul 30, 2012 at 10:50:13AM -0600, Bjorn Helgaas wrote:
On Sun, Jul 29, 2012 at 6:26 PM, Jon Mason jon.ma...@intel.com wrote:
A PCI-Express
On Tue, Jul 31, 2012 at 12:02:20PM -0400, chetan loke wrote:
On Tue, Jul 31, 2012 at 9:45 AM, Bjorn Helgaas bhelg...@google.com wrote:
On Mon, Jul 30, 2012 at 12:15 PM, Jon Mason jon.ma...@intel.com wrote:
I've tried to make it all generic enough that non-Intel NTBs should plug
in with
On Tue, Jul 31, 2012 at 1:27 PM, Jon Mason jon.ma...@intel.com wrote:
I don't see the benefit of having the driver in staging. Any vendors
who would notice the ntb driver in staging would be sitting on these
mailing lists and hopefully have planety of comments on the design.
Stashing the
On Sun, Jul 29, 2012 at 05:26:33PM -0700, Jon Mason wrote:
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301
USA.
You really are
On Sun, Jul 29, 2012 at 05:26:33PM -0700, Jon Mason wrote:
+struct ntb_transport_qp;
+
+struct ntb_client {
+ char *name;
+ int (*probe) (struct pci_dev *pdev);
+ void (*remove) (struct pci_dev *pdev);
+};
Why isn't this tied into the driver model? That looks like you really
On Tue, Jul 31, 2012 at 03:23:38PM -0700, Greg KH wrote:
On Sun, Jul 29, 2012 at 05:26:33PM -0700, Jon Mason wrote:
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin
On Tue, Jul 31, 2012 at 03:51:05PM -0700, Jon Mason wrote:
On Tue, Jul 31, 2012 at 03:23:38PM -0700, Greg KH wrote:
On Sun, Jul 29, 2012 at 05:26:33PM -0700, Jon Mason wrote:
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not,
Actually this is what I'm working on now, using async_tx to replace the
memcpy. I believe the changes shouldn't be that significant.
Is the hardware that can setup dma you refer to something that does
not use this interface?
Yes, they use this interface, but split 'memcpy_toio' to two
On Jul 31, 2012, at 7:10 PM, Jianbin Kang kjbm...@gmail.com wrote:
Actually this is what I'm working on now, using async_tx to replace the
memcpy. I believe the changes shouldn't be that significant.
Is the hardware that can setup dma you refer to something that does
not use this
> I've tried to make it all generic enough that non-Intel NTBs should plug in
> with
> minimal changes to ntb_hw.c. If their design is too divergent, then a slight
> redesign of ntb_hw.c might be necessary. But from what I've seen of other
> designs on the internet, they appear to be extremely
On Mon, Jul 30, 2012 at 10:50:13AM -0600, Bjorn Helgaas wrote:
> On Sun, Jul 29, 2012 at 6:26 PM, Jon Mason wrote:
> > A PCI-Express non-transparent bridge (NTB) is a point-to-point PCIe bus
> > connecting 2 systems, providing electrical isolation between the two
> > subsystems.
> > A
On Sun, Jul 29, 2012 at 6:26 PM, Jon Mason wrote:
> A PCI-Express non-transparent bridge (NTB) is a point-to-point PCIe bus
> connecting 2 systems, providing electrical isolation between the two
> subsystems.
> A non-transparent bridge is functionally similar to a transparent bridge
> except
>
On Sun, Jul 29, 2012 at 6:26 PM, Jon Mason jon.ma...@intel.com wrote:
A PCI-Express non-transparent bridge (NTB) is a point-to-point PCIe bus
connecting 2 systems, providing electrical isolation between the two
subsystems.
A non-transparent bridge is functionally similar to a transparent
On Mon, Jul 30, 2012 at 10:50:13AM -0600, Bjorn Helgaas wrote:
On Sun, Jul 29, 2012 at 6:26 PM, Jon Mason jon.ma...@intel.com wrote:
A PCI-Express non-transparent bridge (NTB) is a point-to-point PCIe bus
connecting 2 systems, providing electrical isolation between the two
subsystems.
A
I've tried to make it all generic enough that non-Intel NTBs should plug in
with
minimal changes to ntb_hw.c. If their design is too divergent, then a slight
redesign of ntb_hw.c might be necessary. But from what I've seen of other
designs on the internet, they appear to be extremely
On Mon, Jul 16, 2012 at 03:27:48PM -0400, chetan loke wrote:
> On Mon, Jul 16, 2012 at 2:38 PM, Jon Mason wrote:
> > On Mon, Jul 16, 2012 at 12:49:39PM -0400, chetan loke wrote:
>
>
>
> >> Is it ok to rename the following vars for convenience sake?
> >>
> >> > + struct list_head txq;
On Mon, Jul 16, 2012 at 12:49:39PM -0400, chetan loke wrote:
> Hi Jon,
>
> On Fri, Jul 13, 2012 at 5:44 PM, Jon Mason wrote:
>
> Just a few minor comments/questions:
>
>
>
> > +struct ntb_transport_qp {
> > + struct ntb_device *ndev;
> > +
> > + bool client_ready;
> > +
On Mon, Jul 16, 2012 at 10:55:06AM -0700, Jon Mason wrote:
> On Sun, Jul 15, 2012 at 05:19:21PM -0700, Greg KH wrote:
> > On Sun, Jul 15, 2012 at 04:55:48PM -0700, Jon Mason wrote:
> > > On Sat, Jul 14, 2012 at 10:10:15AM -0700, Greg KH wrote:
> > > > On Fri, Jul 13, 2012 at 02:44:59PM -0700, Jon
Jon,
On Fri, Jul 13, 2012 at 5:44 PM, Jon Mason wrote:
..
> +/**
> + * ntb_ring_sdb() - Set the doorbell on the secondary/external side
> + * @ndev: pointer to ntb_device instance
> + * @db: doorbell to ring
> + *
> + * This function allows triggering of a doorbell on the
On Sun, Jul 15, 2012 at 05:19:21PM -0700, Greg KH wrote:
> On Sun, Jul 15, 2012 at 04:55:48PM -0700, Jon Mason wrote:
> > On Sat, Jul 14, 2012 at 10:10:15AM -0700, Greg KH wrote:
> > > On Fri, Jul 13, 2012 at 02:44:59PM -0700, Jon Mason wrote:
> > > > +static int max_num_cbs = 2;
> > > >
Hi Jon,
On Fri, Jul 13, 2012 at 5:44 PM, Jon Mason wrote:
Just a few minor comments/questions:
> +struct ntb_transport_qp {
> + struct ntb_device *ndev;
> +
> + bool client_ready;
> + bool qp_link;
> + u8 qp_num; /* Only 64 QP's are allowed. 0-63 */
> +
> +
Hi Jon,
On Fri, Jul 13, 2012 at 5:44 PM, Jon Mason jon.ma...@intel.com wrote:
Just a few minor comments/questions:
+struct ntb_transport_qp {
+ struct ntb_device *ndev;
+
+ bool client_ready;
+ bool qp_link;
+ u8 qp_num; /* Only 64 QP's are allowed.
On Sun, Jul 15, 2012 at 05:19:21PM -0700, Greg KH wrote:
On Sun, Jul 15, 2012 at 04:55:48PM -0700, Jon Mason wrote:
On Sat, Jul 14, 2012 at 10:10:15AM -0700, Greg KH wrote:
On Fri, Jul 13, 2012 at 02:44:59PM -0700, Jon Mason wrote:
+static int max_num_cbs = 2;
Jon,
On Fri, Jul 13, 2012 at 5:44 PM, Jon Mason jon.ma...@intel.com wrote:
..
+/**
+ * ntb_ring_sdb() - Set the doorbell on the secondary/external side
+ * @ndev: pointer to ntb_device instance
+ * @db: doorbell to ring
+ *
+ * This function allows triggering of a doorbell on
On Mon, Jul 16, 2012 at 10:55:06AM -0700, Jon Mason wrote:
On Sun, Jul 15, 2012 at 05:19:21PM -0700, Greg KH wrote:
On Sun, Jul 15, 2012 at 04:55:48PM -0700, Jon Mason wrote:
On Sat, Jul 14, 2012 at 10:10:15AM -0700, Greg KH wrote:
On Fri, Jul 13, 2012 at 02:44:59PM -0700, Jon Mason
On Mon, Jul 16, 2012 at 12:49:39PM -0400, chetan loke wrote:
Hi Jon,
On Fri, Jul 13, 2012 at 5:44 PM, Jon Mason jon.ma...@intel.com wrote:
Just a few minor comments/questions:
+struct ntb_transport_qp {
+ struct ntb_device *ndev;
+
+ bool client_ready;
+
On Mon, Jul 16, 2012 at 03:27:48PM -0400, chetan loke wrote:
On Mon, Jul 16, 2012 at 2:38 PM, Jon Mason jon.ma...@intel.com wrote:
On Mon, Jul 16, 2012 at 12:49:39PM -0400, chetan loke wrote:
Is it ok to rename the following vars for convenience sake?
+ struct list_head
On Sun, Jul 15, 2012 at 04:55:48PM -0700, Jon Mason wrote:
> On Sat, Jul 14, 2012 at 10:10:15AM -0700, Greg KH wrote:
> > On Fri, Jul 13, 2012 at 02:44:59PM -0700, Jon Mason wrote:
> > > +static int max_num_cbs = 2;
> > > +module_param(max_num_cbs, uint, 0644);
> > > +MODULE_PARM_DESC(max_num_cbs,
On Sat, Jul 14, 2012 at 10:10:15AM -0700, Greg KH wrote:
> On Fri, Jul 13, 2012 at 02:44:59PM -0700, Jon Mason wrote:
> > +static int max_num_cbs = 2;
> > +module_param(max_num_cbs, uint, 0644);
> > +MODULE_PARM_DESC(max_num_cbs, "Maximum number of NTB transport
> > connections");
> > +
> >
On Sun, Jul 15, 2012 at 04:50:41PM -0700, Jon Mason wrote:
> On Sat, Jul 14, 2012 at 10:04:11AM -0700, Greg KH wrote:
> > On Fri, Jul 13, 2012 at 02:44:59PM -0700, Jon Mason wrote:
> > > The NTB device driver is needed to configure these memory windows,
> > > doorbell, and
> > > scratch-pad
On Sat, Jul 14, 2012 at 10:04:11AM -0700, Greg KH wrote:
> On Fri, Jul 13, 2012 at 02:44:59PM -0700, Jon Mason wrote:
> > The NTB device driver is needed to configure these memory windows,
> > doorbell, and
> > scratch-pad registers as well as use them in such a way as they can be
> > turned
> >
Have you looked at any of the work that the PXI group has done on NTB
support within PXI?
http://www.ni.com/white-paper/12523/en
I was on that working group, and one of the first capabilities I
suggested for it was IP over NTB - I was going to implement this at my
employer, but the project took a
Have you looked at any of the work that the PXI group has done on NTB
support within PXI?
http://www.ni.com/white-paper/12523/en
I was on that working group, and one of the first capabilities I
suggested for it was IP over NTB - I was going to implement this at my
employer, but the project took a
On Sat, Jul 14, 2012 at 10:04:11AM -0700, Greg KH wrote:
On Fri, Jul 13, 2012 at 02:44:59PM -0700, Jon Mason wrote:
The NTB device driver is needed to configure these memory windows,
doorbell, and
scratch-pad registers as well as use them in such a way as they can be
turned
into a
On Sun, Jul 15, 2012 at 04:50:41PM -0700, Jon Mason wrote:
On Sat, Jul 14, 2012 at 10:04:11AM -0700, Greg KH wrote:
On Fri, Jul 13, 2012 at 02:44:59PM -0700, Jon Mason wrote:
The NTB device driver is needed to configure these memory windows,
doorbell, and
scratch-pad registers as well
On Sat, Jul 14, 2012 at 10:10:15AM -0700, Greg KH wrote:
On Fri, Jul 13, 2012 at 02:44:59PM -0700, Jon Mason wrote:
+static int max_num_cbs = 2;
+module_param(max_num_cbs, uint, 0644);
+MODULE_PARM_DESC(max_num_cbs, Maximum number of NTB transport
connections);
+
+static bool
On Sun, Jul 15, 2012 at 04:55:48PM -0700, Jon Mason wrote:
On Sat, Jul 14, 2012 at 10:10:15AM -0700, Greg KH wrote:
On Fri, Jul 13, 2012 at 02:44:59PM -0700, Jon Mason wrote:
+static int max_num_cbs = 2;
+module_param(max_num_cbs, uint, 0644);
+MODULE_PARM_DESC(max_num_cbs, Maximum
On Fri, Jul 13, 2012 at 02:44:59PM -0700, Jon Mason wrote:
> The NTB device driver is needed to configure these memory windows, doorbell,
> and
> scratch-pad registers as well as use them in such a way as they can be turned
> into a viable communication channel to the remote system. ntb_hw.[ch]
On Fri, Jul 13, 2012 at 05:13:44PM -0700, Stephen Hemminger wrote:
> On Fri, 13 Jul 2012 14:44:59 -0700
> Jon Mason wrote:
>
> > A PCI-Express non-transparent bridge (NTB) is a point-to-point PCIe bus
> > connecting 2 systems, providing electrical isolation between the two
> > subsystems.
> > A
On Fri, Jul 13, 2012 at 05:13:44PM -0700, Stephen Hemminger wrote:
On Fri, 13 Jul 2012 14:44:59 -0700
Jon Mason jon.ma...@intel.com wrote:
A PCI-Express non-transparent bridge (NTB) is a point-to-point PCIe bus
connecting 2 systems, providing electrical isolation between the two
On Fri, Jul 13, 2012 at 02:44:59PM -0700, Jon Mason wrote:
The NTB device driver is needed to configure these memory windows, doorbell,
and
scratch-pad registers as well as use them in such a way as they can be turned
into a viable communication channel to the remote system. ntb_hw.[ch]
On Fri, 13 Jul 2012 14:44:59 -0700
Jon Mason wrote:
> A PCI-Express non-transparent bridge (NTB) is a point-to-point PCIe bus
> connecting 2 systems, providing electrical isolation between the two
> subsystems.
> A non-transparent bridge is functionally similar to a transparent bridge
> except
On Fri, 13 Jul 2012 14:44:59 -0700
Jon Mason wrote:
> A PCI-Express non-transparent bridge (NTB) is a point-to-point PCIe bus
> connecting 2 systems, providing electrical isolation between the two
> subsystems.
> A non-transparent bridge is functionally similar to a transparent bridge
> except
On Fri, 13 Jul 2012 14:44:59 -0700
Jon Mason jon.ma...@intel.com wrote:
A PCI-Express non-transparent bridge (NTB) is a point-to-point PCIe bus
connecting 2 systems, providing electrical isolation between the two
subsystems.
A non-transparent bridge is functionally similar to a transparent
On Fri, 13 Jul 2012 14:44:59 -0700
Jon Mason jon.ma...@intel.com wrote:
A PCI-Express non-transparent bridge (NTB) is a point-to-point PCIe bus
connecting 2 systems, providing electrical isolation between the two
subsystems.
A non-transparent bridge is functionally similar to a transparent
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