stable: 3.10
commit 315a383ad7dbd484fafb93ef08038e3dbafbb7a8 upstream
ME HW ready bit is down after hw reset was asserted or on error.
Only on error we need to enter the reset flow, additional reset
need to be prevented when reset was triggered during
initialization , power up/down or a reset
stable: 3.10
commit 315a383ad7dbd484fafb93ef08038e3dbafbb7a8 upstream
ME HW ready bit is down after hw reset was asserted or on error.
Only on error we need to enter the reset flow, additional reset
need to be prevented when reset was triggered during
initialization , power up/down or a reset
2 matches
Mail list logo
