rmlinux.org.uk;
> ker...@pengutronix.de
> Subject: Re: [PATCH] ARM: imx: add cpuidle support for i.mx6ul
>
> On Wed, Aug 24, 2016 at 12:04:50PM +0200, Lucas Stach wrote:
> > Personally I would just remove the condition, but if you are concerned
> > about the double L1 flush overhea
On Wed, Aug 24, 2016 at 12:04:50PM +0200, Lucas Stach wrote:
> Personally I would just remove the condition, but if you are concerned
> about the double L1 flush overhead (I wouldn't worry about this, it
> should be negligible) you should really make this conditional on an
> architected L2 being pr
ker...@pengutronix.de
> Subject: Re: [PATCH] ARM: imx: add cpuidle support for i.mx6ul
>
> >
> > Signed-off-by: Anson Huang
> > ---
> > arch/arm/mach-imx/cpuidle-imx6sx.c | 10 ++
> > arch/arm/mach-imx/mach-imx6ul.c| 3 +++
> > 2 files changed,
>
> Signed-off-by: Anson Huang
> ---
> arch/arm/mach-imx/cpuidle-imx6sx.c | 10 ++
> arch/arm/mach-imx/mach-imx6ul.c| 3 +++
> 2 files changed, 13 insertions(+)
>
> diff --git a/arch/arm/mach-imx/cpuidle-imx6sx.c
> b/arch/arm/mach-imx/cpuidle-imx6sx.c
> index 41cdce6..b4fcc8ae 10064
li...@armlinux.org.uk; ker...@pengutronix.de
> Subject: Re: [PATCH] ARM: imx: add cpuidle support for i.mx6ul
>
> Am Donnerstag, den 25.08.2016, 00:13 +0800 schrieb Anson Huang:
> > This patch enables cpuidle driver for i.MX6UL, it reuses i.MX6SX's
> > cpuidle driver, 3 leve
as Stach [mailto:l.st...@pengutronix.de]
> > > Sent: 2016-08-24 5:09 PM
> > > To: Yongcai Huang
> > > Cc: linux-arm-ker...@lists.infradead.org; linux-kernel@vger.kernel.org;
> > > Fabio
> > > Estevam ; shawn...@kernel.org;
> > > li...@armlin
gt; Cc: linux-arm-ker...@lists.infradead.org; linux-kernel@vger.kernel.org;
> > Fabio
> > Estevam ; shawn...@kernel.org;
> > li...@armlinux.org.uk; ker...@pengutronix.de
> > Subject: Re: [PATCH] ARM: imx: add cpuidle support for i.mx6ul
> >
> > Am Donnerstag, d
Am Donnerstag, den 25.08.2016, 00:13 +0800 schrieb Anson Huang:
> This patch enables cpuidle driver for i.MX6UL, it
> reuses i.MX6SX's cpuidle driver, 3 levels of cpuidle
> supported:
>
> 1. ARM WFI;
> 2. SOC in WAIT mode;
> 3. SOC in WAIT mode + ARM power off.
>
> As i.MX6UL has cortex-A7 CORE w
This patch enables cpuidle driver for i.MX6UL, it
reuses i.MX6SX's cpuidle driver, 3 levels of cpuidle
supported:
1. ARM WFI;
2. SOC in WAIT mode;
3. SOC in WAIT mode + ARM power off.
As i.MX6UL has cortex-A7 CORE with an internal L2
cache, so need to add L2 cache type check to decide
if to flush
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