Re: [PATCH] ASoC: adau1761: Ensure DSP_RUN and DSP_ENABLE are disabled
Hi Niklas,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on asoc/for-next]
[also build test ERROR on v4.20-rc5 next-20181206]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Niklas-Carlsson/ASoC-adau1761-Ensure-DSP_RUN-and-DSP_ENABLE-are-disabled/20181130-061515
base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
for-next
config: nds32-allyesconfig (attached as .config)
compiler: nds32le-linux-gcc (GCC) 6.4.0
reproduce:
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=6.4.0 make.cross ARCH=nds32
All errors (new ones prefixed by >>):
sound/soc//codecs/adau1761.c: In function 'adau1761_set_bias_level':
>> sound/soc//codecs/adau1761.c:484:8: error: implicit declaration of function
>> 'adau17x1_has_dsp' [-Werror=implicit-function-declaration]
if (adau17x1_has_dsp(adau)) {
^~~~
cc1: some warnings being treated as errors
vim +/adau17x1_has_dsp +484 sound/soc//codecs/adau1761.c
447
448 static int adau1761_set_bias_level(struct snd_soc_component *component,
449 enum snd_soc_bias_level level)
450 {
451 struct adau *adau = snd_soc_component_get_drvdata(component);
452
453 switch (level) {
454 case SND_SOC_BIAS_ON:
455 break;
456 case SND_SOC_BIAS_PREPARE:
457 break;
458 case SND_SOC_BIAS_STANDBY:
459 regcache_cache_only(adau->regmap, false);
460 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL,
461 ADAU17X1_CLOCK_CONTROL_SYSCLK_EN,
462 ADAU17X1_CLOCK_CONTROL_SYSCLK_EN);
463 if (snd_soc_component_get_bias_level(component) ==
464 SND_SOC_BIAS_OFF) {
465 /*
466 * When going OFF -> STANDBY, the device can be
in two
467 * states:
468 * 1) Power-cycled and reset
469 * 2) Soft reboot
470 * In the case of soft reboot, we need to sync
the HW
471 * registers even if our regmap reports default
values.
472 * Marking the cache as dirty ensures that both
cases
473 * are handled.
474 */
475 regcache_mark_dirty(adau->regmap);
476 regcache_sync(adau->regmap);
477 /*
478 * In order for FW to load correctly, the
device needs
479 * DSP_RUN and DSP_ENABLE to be 0. This might
not be the
480 * case for soft reboots. Ensure that DSP_RUN
and
481 * DSP_ENABLE is 0 by bypassing the cache and
write
482 * directly to HW when going OFF -> STANDBY.
483 */
> 484 if (adau17x1_has_dsp(adau)) {
485 regcache_cache_bypass(adau->regmap,
true);
486 regmap_write(adau->regmap,
ADAU17X1_DSP_RUN, 0);
487 regmap_write(adau->regmap,
488 ADAU17X1_DSP_ENABLE, 0);
489 regcache_cache_bypass(adau->regmap,
false);
490 }
491 }
492 break;
493 case SND_SOC_BIAS_OFF:
494 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL,
495 ADAU17X1_CLOCK_CONTROL_SYSCLK_EN, 0);
496 regcache_cache_only(adau->regmap, true);
497 break;
498
499 }
500 return 0;
501 }
502
---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
.config.gz
Description: application/gzip
Re: [PATCH] ASoC: adau1761: Ensure DSP_RUN and DSP_ENABLE are disabled
Hi Niklas,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on asoc/for-next]
[also build test ERROR on v4.20-rc4 next-20181129]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Niklas-Carlsson/ASoC-adau1761-Ensure-DSP_RUN-and-DSP_ENABLE-are-disabled/20181130-061515
base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
for-next
config: x86_64-randconfig-ws0-11300754 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
All errors (new ones prefixed by >>):
sound/soc/codecs/adau1761.c: In function 'adau1761_set_bias_level':
>> sound/soc/codecs/adau1761.c:484:8: error: implicit declaration of function
>> 'adau17x1_has_dsp'; did you mean 'adau17x1_resume'?
>> [-Werror=implicit-function-declaration]
if (adau17x1_has_dsp(adau)) {
^~~~
adau17x1_resume
cc1: some warnings being treated as errors
vim +484 sound/soc/codecs/adau1761.c
447
448 static int adau1761_set_bias_level(struct snd_soc_component *component,
449 enum snd_soc_bias_level level)
450 {
451 struct adau *adau = snd_soc_component_get_drvdata(component);
452
453 switch (level) {
454 case SND_SOC_BIAS_ON:
455 break;
456 case SND_SOC_BIAS_PREPARE:
457 break;
458 case SND_SOC_BIAS_STANDBY:
459 regcache_cache_only(adau->regmap, false);
460 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL,
461 ADAU17X1_CLOCK_CONTROL_SYSCLK_EN,
462 ADAU17X1_CLOCK_CONTROL_SYSCLK_EN);
463 if (snd_soc_component_get_bias_level(component) ==
464 SND_SOC_BIAS_OFF) {
465 /*
466 * When going OFF -> STANDBY, the device can be
in two
467 * states:
468 * 1) Power-cycled and reset
469 * 2) Soft reboot
470 * In the case of soft reboot, we need to sync
the HW
471 * registers even if our regmap reports default
values.
472 * Marking the cache as dirty ensures that both
cases
473 * are handled.
474 */
475 regcache_mark_dirty(adau->regmap);
476 regcache_sync(adau->regmap);
477 /*
478 * In order for FW to load correctly, the
device needs
479 * DSP_RUN and DSP_ENABLE to be 0. This might
not be the
480 * case for soft reboots. Ensure that DSP_RUN
and
481 * DSP_ENABLE is 0 by bypassing the cache and
write
482 * directly to HW when going OFF -> STANDBY.
483 */
> 484 if (adau17x1_has_dsp(adau)) {
485 regcache_cache_bypass(adau->regmap,
true);
486 regmap_write(adau->regmap,
ADAU17X1_DSP_RUN, 0);
487 regmap_write(adau->regmap,
488 ADAU17X1_DSP_ENABLE, 0);
489 regcache_cache_bypass(adau->regmap,
false);
490 }
491 }
492 break;
493 case SND_SOC_BIAS_OFF:
494 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL,
495 ADAU17X1_CLOCK_CONTROL_SYSCLK_EN, 0);
496 regcache_cache_only(adau->regmap, true);
497 break;
498
499 }
500 return 0;
501 }
502
---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
.config.gz
Description: application/gzip
Re: [PATCH] ASoC: adau1761: Ensure DSP_RUN and DSP_ENABLE are disabled
Hi Niklas,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on asoc/for-next]
[also build test WARNING on v4.20-rc4 next-20181129]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/niklas-morberg-axis-com/ASoC-adau1761-Ensure-DSP_RUN-and-DSP_ENABLE-are-disabled/20181129-183313
base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
for-next
config: i386-randconfig-x002-201847 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
All warnings (new ones prefixed by >>):
In file included from include/linux/kernel.h:10:0,
from include/linux/list.h:9,
from include/linux/module.h:9,
from sound/soc/codecs/adau1761.c:10:
sound/soc/codecs/adau1761.c: In function 'adau1761_set_bias_level':
sound/soc/codecs/adau1761.c:484:8: error: implicit declaration of function
'adau17x1_has_dsp'; did you mean 'adau17x1_resume'?
[-Werror=implicit-function-declaration]
if (adau17x1_has_dsp(adau)) {
^
include/linux/compiler.h:58:30: note: in definition of macro '__trace_if'
if (__builtin_constant_p(!!(cond)) ? !!(cond) : \
^~~~
>> sound/soc/codecs/adau1761.c:484:4: note: in expansion of macro 'if'
if (adau17x1_has_dsp(adau)) {
^~
cc1: some warnings being treated as errors
vim +/if +484 sound/soc/codecs/adau1761.c
447
448 static int adau1761_set_bias_level(struct snd_soc_component *component,
449 enum snd_soc_bias_level level)
450 {
451 struct adau *adau = snd_soc_component_get_drvdata(component);
452
453 switch (level) {
454 case SND_SOC_BIAS_ON:
455 break;
456 case SND_SOC_BIAS_PREPARE:
457 break;
458 case SND_SOC_BIAS_STANDBY:
459 regcache_cache_only(adau->regmap, false);
460 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL,
461 ADAU17X1_CLOCK_CONTROL_SYSCLK_EN,
462 ADAU17X1_CLOCK_CONTROL_SYSCLK_EN);
463 if (snd_soc_component_get_bias_level(component) ==
464 SND_SOC_BIAS_OFF) {
465 /*
466 * When going OFF -> STANDBY, the device can be
in two
467 * states:
468 * 1) Power-cycled and reset
469 * 2) Soft reboot
470 * In the case of soft reboot, we need to sync
the HW
471 * registers even if our regmap reports default
values.
472 * Marking the cache as dirty ensures that both
cases
473 * are handled.
474 */
475 regcache_mark_dirty(adau->regmap);
476 regcache_sync(adau->regmap);
477 /*
478 * In order for FW to load correctly, the
device needs
479 * DSP_RUN and DSP_ENABLE to be 0. This might
not be the
480 * case for soft reboots. Ensure that DSP_RUN
and
481 * DSP_ENABLE is 0 by bypassing the cache and
write
482 * directly to HW when going OFF -> STANDBY.
483 */
> 484 if (adau17x1_has_dsp(adau)) {
485 regcache_cache_bypass(adau->regmap,
true);
486 regmap_write(adau->regmap,
ADAU17X1_DSP_RUN, 0);
487 regmap_write(adau->regmap,
488 ADAU17X1_DSP_ENABLE, 0);
489 regcache_cache_bypass(adau->regmap,
false);
490 }
491 }
492 break;
493 case SND_SOC_BIAS_OFF:
494 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL,
495 ADAU17X1_CLOCK_CONTROL_SYSCLK_EN, 0);
496 regcache_cache_only(adau->regmap, true);
497 break;
498
499 }
500 return 0;
501 }
502
---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
.config.gz
Description: application/gzip
Re: [PATCH] ASoC: adau1761: Ensure DSP_RUN and DSP_ENABLE are disabled
Hi Niklas,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on asoc/for-next]
[also build test ERROR on v4.20-rc4 next-20181129]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/niklas-morberg-axis-com/ASoC-adau1761-Ensure-DSP_RUN-and-DSP_ENABLE-are-disabled/20181129-183313
base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
for-next
config: x86_64-randconfig-x019-201847 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
All errors (new ones prefixed by >>):
sound/soc/codecs/adau1761.c: In function 'adau1761_set_bias_level':
>> sound/soc/codecs/adau1761.c:484:8: error: implicit declaration of function
>> 'adau17x1_has_dsp'; did you mean 'adau17x1_resume'?
>> [-Werror=implicit-function-declaration]
if (adau17x1_has_dsp(adau)) {
^~~~
adau17x1_resume
cc1: some warnings being treated as errors
vim +484 sound/soc/codecs/adau1761.c
447
448 static int adau1761_set_bias_level(struct snd_soc_component *component,
449 enum snd_soc_bias_level level)
450 {
451 struct adau *adau = snd_soc_component_get_drvdata(component);
452
453 switch (level) {
454 case SND_SOC_BIAS_ON:
455 break;
456 case SND_SOC_BIAS_PREPARE:
457 break;
458 case SND_SOC_BIAS_STANDBY:
459 regcache_cache_only(adau->regmap, false);
460 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL,
461 ADAU17X1_CLOCK_CONTROL_SYSCLK_EN,
462 ADAU17X1_CLOCK_CONTROL_SYSCLK_EN);
463 if (snd_soc_component_get_bias_level(component) ==
464 SND_SOC_BIAS_OFF) {
465 /*
466 * When going OFF -> STANDBY, the device can be
in two
467 * states:
468 * 1) Power-cycled and reset
469 * 2) Soft reboot
470 * In the case of soft reboot, we need to sync
the HW
471 * registers even if our regmap reports default
values.
472 * Marking the cache as dirty ensures that both
cases
473 * are handled.
474 */
475 regcache_mark_dirty(adau->regmap);
476 regcache_sync(adau->regmap);
477 /*
478 * In order for FW to load correctly, the
device needs
479 * DSP_RUN and DSP_ENABLE to be 0. This might
not be the
480 * case for soft reboots. Ensure that DSP_RUN
and
481 * DSP_ENABLE is 0 by bypassing the cache and
write
482 * directly to HW when going OFF -> STANDBY.
483 */
> 484 if (adau17x1_has_dsp(adau)) {
485 regcache_cache_bypass(adau->regmap,
true);
486 regmap_write(adau->regmap,
ADAU17X1_DSP_RUN, 0);
487 regmap_write(adau->regmap,
488 ADAU17X1_DSP_ENABLE, 0);
489 regcache_cache_bypass(adau->regmap,
false);
490 }
491 }
492 break;
493 case SND_SOC_BIAS_OFF:
494 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL,
495 ADAU17X1_CLOCK_CONTROL_SYSCLK_EN, 0);
496 regcache_cache_only(adau->regmap, true);
497 break;
498
499 }
500 return 0;
501 }
502
---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
.config.gz
Description: application/gzip
[PATCH] ASoC: adau1761: Ensure DSP_RUN and DSP_ENABLE are disabled
DSP_RUN and DSP_ENABLE needs to be disabled during FW load. This is not
a problem after power-cycling but for soft reboots.
Signed-off-by: Niklas Carlsson
---
sound/soc/codecs/adau1761.c | 29 -
1 file changed, 28 insertions(+), 1 deletion(-)
diff --git a/sound/soc/codecs/adau1761.c b/sound/soc/codecs/adau1761.c
index bef3e9e74c26..3075c13bcbbc 100644
--- a/sound/soc/codecs/adau1761.c
+++ b/sound/soc/codecs/adau1761.c
@@ -460,8 +460,35 @@ static int adau1761_set_bias_level(struct
snd_soc_component *component,
regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL,
ADAU17X1_CLOCK_CONTROL_SYSCLK_EN,
ADAU17X1_CLOCK_CONTROL_SYSCLK_EN);
- if (snd_soc_component_get_bias_level(component) ==
SND_SOC_BIAS_OFF)
+ if (snd_soc_component_get_bias_level(component) ==
+ SND_SOC_BIAS_OFF) {
+ /*
+* When going OFF -> STANDBY, the device can be in two
+* states:
+* 1) Power-cycled and reset
+* 2) Soft reboot
+* In the case of soft reboot, we need to sync the HW
+* registers even if our regmap reports default values.
+* Marking the cache as dirty ensures that both cases
+* are handled.
+*/
+ regcache_mark_dirty(adau->regmap);
regcache_sync(adau->regmap);
+ /*
+* In order for FW to load correctly, the device needs
+* DSP_RUN and DSP_ENABLE to be 0. This might not be the
+* case for soft reboots. Ensure that DSP_RUN and
+* DSP_ENABLE is 0 by bypassing the cache and write
+* directly to HW when going OFF -> STANDBY.
+*/
+ if (adau17x1_has_dsp(adau)) {
+ regcache_cache_bypass(adau->regmap, true);
+ regmap_write(adau->regmap, ADAU17X1_DSP_RUN, 0);
+ regmap_write(adau->regmap,
+ ADAU17X1_DSP_ENABLE, 0);
+ regcache_cache_bypass(adau->regmap, false);
+ }
+ }
break;
case SND_SOC_BIAS_OFF:
regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL,
--
2.11.0
[PATCH] ASoC: adau1761: Ensure DSP_RUN and DSP_ENABLE are disabled
From: Niklas Carlsson
DSP_RUN and DSP_ENABLE needs to be disabled during FW load. This is not
a problem after power-cycling but for soft reboots.
Signed-off-by: Niklas Carlsson
---
sound/soc/codecs/adau1761.c | 29 -
1 file changed, 28 insertions(+), 1 deletion(-)
diff --git a/sound/soc/codecs/adau1761.c b/sound/soc/codecs/adau1761.c
index bef3e9e74c26..3075c13bcbbc 100644
--- a/sound/soc/codecs/adau1761.c
+++ b/sound/soc/codecs/adau1761.c
@@ -460,8 +460,35 @@ static int adau1761_set_bias_level(struct
snd_soc_component *component,
regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL,
ADAU17X1_CLOCK_CONTROL_SYSCLK_EN,
ADAU17X1_CLOCK_CONTROL_SYSCLK_EN);
- if (snd_soc_component_get_bias_level(component) ==
SND_SOC_BIAS_OFF)
+ if (snd_soc_component_get_bias_level(component) ==
+ SND_SOC_BIAS_OFF) {
+ /*
+* When going OFF -> STANDBY, the device can be in two
+* states:
+* 1) Power-cycled and reset
+* 2) Soft reboot
+* In the case of soft reboot, we need to sync the HW
+* registers even if our regmap reports default values.
+* Marking the cache as dirty ensures that both cases
+* are handled.
+*/
+ regcache_mark_dirty(adau->regmap);
regcache_sync(adau->regmap);
+ /*
+* In order for FW to load correctly, the device needs
+* DSP_RUN and DSP_ENABLE to be 0. This might not be the
+* case for soft reboots. Ensure that DSP_RUN and
+* DSP_ENABLE is 0 by bypassing the cache and write
+* directly to HW when going OFF -> STANDBY.
+*/
+ if (adau17x1_has_dsp(adau)) {
+ regcache_cache_bypass(adau->regmap, true);
+ regmap_write(adau->regmap, ADAU17X1_DSP_RUN, 0);
+ regmap_write(adau->regmap,
+ ADAU17X1_DSP_ENABLE, 0);
+ regcache_cache_bypass(adau->regmap, false);
+ }
+ }
break;
case SND_SOC_BIAS_OFF:
regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL,
--
2.11.0
