Re: [PATCH] ASoC: fsl_ssi: Don't try to round-up for PM divisor calculation

2015-03-05 Thread Mark Brown
On Wed, Mar 04, 2015 at 09:05:04PM -0800, Nicolin Chen wrote:
> According to i.MX6 Series Reference Manual, the formula to calculate
> the sys clock is

Applied, thanks.


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Re: [PATCH] ASoC: fsl_ssi: Don't try to round-up for PM divisor calculation

2015-03-05 Thread Mark Brown
On Wed, Mar 04, 2015 at 09:05:04PM -0800, Nicolin Chen wrote:
 According to i.MX6 Series Reference Manual, the formula to calculate
 the sys clock is

Applied, thanks.


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Description: Digital signature


[PATCH] ASoC: fsl_ssi: Don't try to round-up for PM divisor calculation

2015-03-04 Thread Nicolin Chen
According to i.MX6 Series Reference Manual, the formula to calculate
the sys clock is

sysclk rate = bclk rate * (div2 + 1) * (7 * psr + 1) * (pm + 1) * 2

Commit aafa85e71a75 ("ASoC: fsl_ssi: Add DAI master mode support for
SSI on i.MX series") added the divisor calculation which relies on
the clk_round_rate(). However, at that time, clk_round_rate() didn't
provide closest clock rates for some cases because it might not use
a correct rounding policy. So using the original formula (pm + 1) for
PM divisor was not able to give us a desired clock rate. And then we
used (pm + 2) to do the trick.

However, the clk-divider driver has been refined a lot since commit
b11d282dbea2 ("clk: divider: fix rate calculation for fractional rates")
Now using (pm + 2) trick would result an incorrect clock rate.

So this patch fixes the problem by removing the useless trick.

Reported-by: Stephane Cerveau 
Signed-off-by: Nicolin Chen 
---
 sound/soc/fsl/fsl_ssi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index 05575f4..6b0c8f7 100644
--- a/sound/soc/fsl/fsl_ssi.c
+++ b/sound/soc/fsl/fsl_ssi.c
@@ -603,7 +603,7 @@ static int fsl_ssi_set_bclk(struct snd_pcm_substream 
*substream,
factor = (div2 + 1) * (7 * psr + 1) * 2;
 
for (i = 0; i < 255; i++) {
-   tmprate = freq * factor * (i + 2);
+   tmprate = freq * factor * (i + 1);
 
if (baudclk_is_used)
clkrate = clk_get_rate(ssi_private->baudclk);
-- 
1.9.1

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[PATCH] ASoC: fsl_ssi: Don't try to round-up for PM divisor calculation

2015-03-04 Thread Nicolin Chen
According to i.MX6 Series Reference Manual, the formula to calculate
the sys clock is

sysclk rate = bclk rate * (div2 + 1) * (7 * psr + 1) * (pm + 1) * 2

Commit aafa85e71a75 (ASoC: fsl_ssi: Add DAI master mode support for
SSI on i.MX series) added the divisor calculation which relies on
the clk_round_rate(). However, at that time, clk_round_rate() didn't
provide closest clock rates for some cases because it might not use
a correct rounding policy. So using the original formula (pm + 1) for
PM divisor was not able to give us a desired clock rate. And then we
used (pm + 2) to do the trick.

However, the clk-divider driver has been refined a lot since commit
b11d282dbea2 (clk: divider: fix rate calculation for fractional rates)
Now using (pm + 2) trick would result an incorrect clock rate.

So this patch fixes the problem by removing the useless trick.

Reported-by: Stephane Cerveau scerv...@voxtok.com
Signed-off-by: Nicolin Chen nicoleots...@gmail.com
---
 sound/soc/fsl/fsl_ssi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index 05575f4..6b0c8f7 100644
--- a/sound/soc/fsl/fsl_ssi.c
+++ b/sound/soc/fsl/fsl_ssi.c
@@ -603,7 +603,7 @@ static int fsl_ssi_set_bclk(struct snd_pcm_substream 
*substream,
factor = (div2 + 1) * (7 * psr + 1) * 2;
 
for (i = 0; i  255; i++) {
-   tmprate = freq * factor * (i + 2);
+   tmprate = freq * factor * (i + 1);
 
if (baudclk_is_used)
clkrate = clk_get_rate(ssi_private-baudclk);
-- 
1.9.1

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Re: [PATCH] ASoC: fsl_ssi: Don't try to round-up for PM divisor calculation

2015-02-24 Thread Nicolin Chen
On Tue, Feb 24, 2015 at 05:26:42PM +0900, Mark Brown wrote:
> On Sun, Feb 15, 2015 at 01:37:11AM -0800, Nicolin Chen wrote:
> > According to i.MX6 Series Reference Manual, the formula to calculate
> > the sys clock is
> 
> This doesn't apply against current code, pleae check and resend.

That's strange...I downloaded it from Patchwork and tried to apply
it on the latest for-next. It doesn't give me any error...

And I git-formated a new one but it doesn't look so different from
the one in the maillist...

Thank you
Nicolin
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Re: [PATCH] ASoC: fsl_ssi: Don't try to round-up for PM divisor calculation

2015-02-24 Thread Mark Brown
On Sun, Feb 15, 2015 at 01:37:11AM -0800, Nicolin Chen wrote:
> According to i.MX6 Series Reference Manual, the formula to calculate
> the sys clock is

This doesn't apply against current code, pleae check and resend.


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Description: Digital signature


Re: [PATCH] ASoC: fsl_ssi: Don't try to round-up for PM divisor calculation

2015-02-24 Thread Mark Brown
On Sun, Feb 15, 2015 at 01:37:11AM -0800, Nicolin Chen wrote:
 According to i.MX6 Series Reference Manual, the formula to calculate
 the sys clock is

This doesn't apply against current code, pleae check and resend.


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Description: Digital signature


Re: [PATCH] ASoC: fsl_ssi: Don't try to round-up for PM divisor calculation

2015-02-24 Thread Nicolin Chen
On Tue, Feb 24, 2015 at 05:26:42PM +0900, Mark Brown wrote:
 On Sun, Feb 15, 2015 at 01:37:11AM -0800, Nicolin Chen wrote:
  According to i.MX6 Series Reference Manual, the formula to calculate
  the sys clock is
 
 This doesn't apply against current code, pleae check and resend.

That's strange...I downloaded it from Patchwork and tried to apply
it on the latest for-next. It doesn't give me any error...

And I git-formated a new one but it doesn't look so different from
the one in the maillist...

Thank you
Nicolin
--
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/


[PATCH] ASoC: fsl_ssi: Don't try to round-up for PM divisor calculation

2015-02-15 Thread Nicolin Chen
According to i.MX6 Series Reference Manual, the formula to calculate
the sys clock is

sysclk rate = bclk rate * (div2 + 1) * (7 * psr + 1) * (pm + 1) * 2

Commit aafa85e71a75 ("ASoC: fsl_ssi: Add DAI master mode support for
SSI on i.MX series") added the divisor calculation which relies on
the clk_round_rate(). However, at that time, clk_round_rate() didn't
provide closest clock rates for some cases because it might not use
a correct rounding policy. So using the original formula (pm + 1) for
PM divisor was not able to give us a desired clock rate. And then we
used (pm + 2) to do the trick.

However, the clk-divider driver has been refined a lot since commit
b11d282dbea2 ("clk: divider: fix rate calculation for fractional rates")
Now using (pm + 2) trick would result an incorrect clock rate.

So this patch fixes the problem by removing the useless trick.

Reported-by: Stephane Cerveau 
Signed-off-by: Nicolin Chen 
---

[ I also checked that only 3.18 stable tree has the refinements for
 clk-divider driver, so I guess it might not be able to apply to
 previous long-term trees if being treated as bug fix. -- Nicolin ]

 sound/soc/fsl/fsl_ssi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index d7365c5..3e7c644 100644
--- a/sound/soc/fsl/fsl_ssi.c
+++ b/sound/soc/fsl/fsl_ssi.c
@@ -603,7 +603,7 @@ static int fsl_ssi_set_bclk(struct snd_pcm_substream 
*substream,
factor = (div2 + 1) * (7 * psr + 1) * 2;
 
for (i = 0; i < 255; i++) {
-   tmprate = freq * factor * (i + 2);
+   tmprate = freq * factor * (i + 1);
 
if (baudclk_is_used)
clkrate = clk_get_rate(ssi_private->baudclk);
-- 
1.9.1

--
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Please read the FAQ at  http://www.tux.org/lkml/


[PATCH] ASoC: fsl_ssi: Don't try to round-up for PM divisor calculation

2015-02-15 Thread Nicolin Chen
According to i.MX6 Series Reference Manual, the formula to calculate
the sys clock is

sysclk rate = bclk rate * (div2 + 1) * (7 * psr + 1) * (pm + 1) * 2

Commit aafa85e71a75 (ASoC: fsl_ssi: Add DAI master mode support for
SSI on i.MX series) added the divisor calculation which relies on
the clk_round_rate(). However, at that time, clk_round_rate() didn't
provide closest clock rates for some cases because it might not use
a correct rounding policy. So using the original formula (pm + 1) for
PM divisor was not able to give us a desired clock rate. And then we
used (pm + 2) to do the trick.

However, the clk-divider driver has been refined a lot since commit
b11d282dbea2 (clk: divider: fix rate calculation for fractional rates)
Now using (pm + 2) trick would result an incorrect clock rate.

So this patch fixes the problem by removing the useless trick.

Reported-by: Stephane Cerveau scerv...@voxtok.com
Signed-off-by: Nicolin Chen nicoleots...@gmail.com
---

[ I also checked that only 3.18 stable tree has the refinements for
 clk-divider driver, so I guess it might not be able to apply to
 previous long-term trees if being treated as bug fix. -- Nicolin ]

 sound/soc/fsl/fsl_ssi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index d7365c5..3e7c644 100644
--- a/sound/soc/fsl/fsl_ssi.c
+++ b/sound/soc/fsl/fsl_ssi.c
@@ -603,7 +603,7 @@ static int fsl_ssi_set_bclk(struct snd_pcm_substream 
*substream,
factor = (div2 + 1) * (7 * psr + 1) * 2;
 
for (i = 0; i  255; i++) {
-   tmprate = freq * factor * (i + 2);
+   tmprate = freq * factor * (i + 1);
 
if (baudclk_is_used)
clkrate = clk_get_rate(ssi_private-baudclk);
-- 
1.9.1

--
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