Re: [PATCH] Align PCI memory regions to page size (4K) - Fix

2007-11-14 Thread Benjamin Herrenschmidt
On Wed, 2007-11-14 at 14:55 -0700, Grant Grundler wrote: > Ah ok.. I was assuming there was only a "Hypervisor" and all the "guests" > were equal. If one OS instance is "Host" and can see the device before hand, > then yeah, it makes sense to "hide" the device from the normal device drivers.

Re: [PATCH] Align PCI memory regions to page size (4K) - Fix

2007-11-14 Thread Grant Grundler
On Wed, Nov 14, 2007 at 07:16:18PM +1100, Benjamin Herrenschmidt wrote: > > We already have that "something": pci_enable_device(). > > The guest OS "Arch" code can then do the reassignment. > > See "3.1 Enable the PCI device" in Documentation/pci.txt. > > No, that can't be done there because that

Re: [PATCH] Align PCI memory regions to page size (4K) - Fix

2007-11-14 Thread Benjamin Herrenschmidt
On Tue, 2007-11-13 at 23:21 -0700, Grant Grundler wrote: > > > So something like your hypervisor binds a special driver to a device > > that is to be reflected to a partition, at which point we are sure > no > > other driver is using it, then that driver can call something in the > pci > > layer

Re: [PATCH] Align PCI memory regions to page size (4K) - Fix

2007-11-14 Thread Benjamin Herrenschmidt
On Tue, 2007-11-13 at 23:21 -0700, Grant Grundler wrote: So something like your hypervisor binds a special driver to a device that is to be reflected to a partition, at which point we are sure no other driver is using it, then that driver can call something in the pci layer that

Re: [PATCH] Align PCI memory regions to page size (4K) - Fix

2007-11-14 Thread Grant Grundler
On Wed, Nov 14, 2007 at 07:16:18PM +1100, Benjamin Herrenschmidt wrote: We already have that something: pci_enable_device(). The guest OS Arch code can then do the reassignment. See 3.1 Enable the PCI device in Documentation/pci.txt. No, that can't be done there because that would mean

Re: [PATCH] Align PCI memory regions to page size (4K) - Fix

2007-11-14 Thread Benjamin Herrenschmidt
On Wed, 2007-11-14 at 14:55 -0700, Grant Grundler wrote: Ah ok.. I was assuming there was only a Hypervisor and all the guests were equal. If one OS instance is Host and can see the device before hand, then yeah, it makes sense to hide the device from the normal device drivers. The Host is

Re: [PATCH] Align PCI memory regions to page size (4K) - Fix

2007-11-13 Thread Grant Grundler
On Wed, Nov 14, 2007 at 08:17:33AM +1100, Benjamin Herrenschmidt wrote: ... > Though he's trying to fix a real issue, his patch is not the right > approach imho. > > A better approach would be to have a mechanism to be triggered by the > hypervisor administration tools that will attempt to

Re: [PATCH] Align PCI memory regions to page size (4K) - Fix

2007-11-13 Thread Benjamin Herrenschmidt
On Sun, 2007-10-28 at 18:08 -0700, David Miller wrote: > From: Greg KH <[EMAIL PROTECTED]> > Date: Sun, 28 Oct 2007 13:03:36 -0700 > > > But doesn't aligning such regions on that alignment break some devices > > as that is not what the device is asking for in the BIOS? > > There are also

Re: [PATCH] Align PCI memory regions to page size (4K) - Fix

2007-11-13 Thread Benjamin Herrenschmidt
On Sun, 2007-10-28 at 18:08 -0700, David Miller wrote: From: Greg KH [EMAIL PROTECTED] Date: Sun, 28 Oct 2007 13:03:36 -0700 But doesn't aligning such regions on that alignment break some devices as that is not what the device is asking for in the BIOS? There are also platforms where

Re: [PATCH] Align PCI memory regions to page size (4K) - Fix

2007-11-13 Thread Grant Grundler
On Wed, Nov 14, 2007 at 08:17:33AM +1100, Benjamin Herrenschmidt wrote: ... Though he's trying to fix a real issue, his patch is not the right approach imho. A better approach would be to have a mechanism to be triggered by the hypervisor administration tools that will attempt to reassign

Re: [PATCH] Align PCI memory regions to page size (4K) - Fix

2007-11-12 Thread Grant Grundler
On Thu, Nov 08, 2007 at 05:24:00PM -0600, Linas Vepstas wrote: ... > > E.g. 4 port Gige card could directly support the host and 3 guests with > > somewhat > > lower risk of tromping on each other's MMIO space. > > > > If Xen is cooperative, this seems a bit paranoid. I don't recall ever > >

Re: [PATCH] Align PCI memory regions to page size (4K) - Fix

2007-11-12 Thread Grant Grundler
On Thu, Nov 08, 2007 at 05:24:00PM -0600, Linas Vepstas wrote: ... E.g. 4 port Gige card could directly support the host and 3 guests with somewhat lower risk of tromping on each other's MMIO space. If Xen is cooperative, this seems a bit paranoid. I don't recall ever seeing a

Re: [PATCH] Align PCI memory regions to page size (4K) - Fix

2007-11-08 Thread Linas Vepstas
On Sun, Oct 28, 2007 at 11:52:16PM -0600, Grant Grundler wrote: > > On Sun, Oct 28, 2007 at 03:53:20PM -0400, Barak Fargoun wrote: > ... > > > About your question: today, some of the hypervisors are using linux > > > kernel as their domain-0 (e.g. Xen). In order to implement direct > > > hardware

Re: [PATCH] Align PCI memory regions to page size (4K) - Fix

2007-11-08 Thread Linas Vepstas
On Sun, Oct 28, 2007 at 11:52:16PM -0600, Grant Grundler wrote: On Sun, Oct 28, 2007 at 03:53:20PM -0400, Barak Fargoun wrote: ... About your question: today, some of the hypervisors are using linux kernel as their domain-0 (e.g. Xen). In order to implement direct hardware access for

Re: [PATCH] Align PCI memory regions to page size (4K) - Fix

2007-10-28 Thread Grant Grundler
On Sun, Oct 28, 2007 at 01:03:36PM -0700, Greg KH wrote: > On Sun, Oct 28, 2007 at 03:53:20PM -0400, Barak Fargoun wrote: ... > > About your question: today, some of the hypervisors are using linux > > kernel as their domain-0 (e.g. Xen). In order to implement direct > > hardware access for these

Re: [PATCH] Align PCI memory regions to page size (4K) - Fix

2007-10-28 Thread David Miller
From: Greg KH <[EMAIL PROTECTED]> Date: Sun, 28 Oct 2007 13:03:36 -0700 > But doesn't aligning such regions on that alignment break some devices > as that is not what the device is asking for in the BIOS? There are also platforms where bootup firmware chooses the allocations, and that is what we

RE: [PATCH] Align PCI memory regions to page size (4K) - Fix

2007-10-28 Thread Barak Fargoun
> From: Greg KH [mailto:[EMAIL PROTECTED] > Sent: Sunday, October 28, 2007 10:04 PM > To: Barak Fargoun > Cc: linux-kernel@vger.kernel.org; > [EMAIL PROTECTED]; Guy Zana > Subject: Re: [PATCH] Align PCI memory regions to page size (4K) - Fix > > On Sun, Oct 28, 2007 at

Re: [PATCH] Align PCI memory regions to page size (4K) - Fix

2007-10-28 Thread Greg KH
On Sun, Oct 28, 2007 at 03:53:20PM -0400, Barak Fargoun wrote: > Hi! > > Regarding all the technical stuff (documentation, coding style, etc.) - > I thought I did it correctly :( I will fix it ASAP, > and send an update when I will finish it. > > About your question: today, some of the

Re: [PATCH] Align PCI memory regions to page size (4K) - Fix

2007-10-28 Thread Arjan van de Ven
On Sun, 28 Oct 2007 13:27:27 -0400 "Barak Fargoun" <[EMAIL PROTECTED]> wrote: > Sorry, my mail client corrupted the previous mail containing the > patch... it should be ok now... > > Add a boot parameter (‘pci-mem-align’) which forces PCI memory > regions to be aligned to 4K. > > This is very

RE: [PATCH] Align PCI memory regions to page size (4K) - Fix

2007-10-28 Thread Barak Fargoun
: Sunday, October 28, 2007 21:31 PM To: Barak Fargoun Cc: linux-kernel@vger.kernel.org; [EMAIL PROTECTED]; Guy Zana Subject: Re: [PATCH] Align PCI memory regions to page size (4K) - Fix On Sun, Oct 28, 2007 at 01:27:27PM -0400, Barak Fargoun wrote: > Sorry, my mail client corrupted the previ

Re: [PATCH] Align PCI memory regions to page size (4K) - Fix

2007-10-28 Thread Greg KH
On Sun, Oct 28, 2007 at 01:27:27PM -0400, Barak Fargoun wrote: > Sorry, my mail client corrupted the previous mail containing the patch... it > should be ok now... > > Add a boot parameter (?pci-mem-align?) which forces PCI memory regions > to be aligned to 4K. > > This is very useful when

[PATCH] Align PCI memory regions to page size (4K) - Fix

2007-10-28 Thread Barak Fargoun
Sorry, my mail client corrupted the previous mail containing the patch... it should be ok now... Add a boot parameter (‘pci-mem-align’) which forces PCI memory regions to be aligned to 4K. This is very useful when developing an hypervisor, since in case we want to let native domains direct

[PATCH] Align PCI memory regions to page size (4K) - Fix

2007-10-28 Thread Barak Fargoun
Sorry, my mail client corrupted the previous mail containing the patch... it should be ok now... Add a boot parameter (‘pci-mem-align’) which forces PCI memory regions to be aligned to 4K. This is very useful when developing an hypervisor, since in case we want to let native domains direct

Re: [PATCH] Align PCI memory regions to page size (4K) - Fix

2007-10-28 Thread Greg KH
On Sun, Oct 28, 2007 at 01:27:27PM -0400, Barak Fargoun wrote: Sorry, my mail client corrupted the previous mail containing the patch... it should be ok now... Add a boot parameter (?pci-mem-align?) which forces PCI memory regions to be aligned to 4K. This is very useful when developing

RE: [PATCH] Align PCI memory regions to page size (4K) - Fix

2007-10-28 Thread Barak Fargoun
: Sunday, October 28, 2007 21:31 PM To: Barak Fargoun Cc: linux-kernel@vger.kernel.org; [EMAIL PROTECTED]; Guy Zana Subject: Re: [PATCH] Align PCI memory regions to page size (4K) - Fix On Sun, Oct 28, 2007 at 01:27:27PM -0400, Barak Fargoun wrote: Sorry, my mail client corrupted the previous mail

Re: [PATCH] Align PCI memory regions to page size (4K) - Fix

2007-10-28 Thread Arjan van de Ven
On Sun, 28 Oct 2007 13:27:27 -0400 Barak Fargoun [EMAIL PROTECTED] wrote: Sorry, my mail client corrupted the previous mail containing the patch... it should be ok now... Add a boot parameter (‘pci-mem-align’) which forces PCI memory regions to be aligned to 4K. This is very useful when

Re: [PATCH] Align PCI memory regions to page size (4K) - Fix

2007-10-28 Thread Greg KH
On Sun, Oct 28, 2007 at 03:53:20PM -0400, Barak Fargoun wrote: Hi! Regarding all the technical stuff (documentation, coding style, etc.) - I thought I did it correctly :( I will fix it ASAP, and send an update when I will finish it. About your question: today, some of the hypervisors are

RE: [PATCH] Align PCI memory regions to page size (4K) - Fix

2007-10-28 Thread Barak Fargoun
From: Greg KH [mailto:[EMAIL PROTECTED] Sent: Sunday, October 28, 2007 10:04 PM To: Barak Fargoun Cc: linux-kernel@vger.kernel.org; [EMAIL PROTECTED]; Guy Zana Subject: Re: [PATCH] Align PCI memory regions to page size (4K) - Fix On Sun, Oct 28, 2007 at 03:53:20PM -0400, Barak Fargoun

Re: [PATCH] Align PCI memory regions to page size (4K) - Fix

2007-10-28 Thread David Miller
From: Greg KH [EMAIL PROTECTED] Date: Sun, 28 Oct 2007 13:03:36 -0700 But doesn't aligning such regions on that alignment break some devices as that is not what the device is asking for in the BIOS? There are also platforms where bootup firmware chooses the allocations, and that is what we use

Re: [PATCH] Align PCI memory regions to page size (4K) - Fix

2007-10-28 Thread Grant Grundler
On Sun, Oct 28, 2007 at 01:03:36PM -0700, Greg KH wrote: On Sun, Oct 28, 2007 at 03:53:20PM -0400, Barak Fargoun wrote: ... About your question: today, some of the hypervisors are using linux kernel as their domain-0 (e.g. Xen). In order to implement direct hardware access for these native