RE: [PATCH] PCI: Add AMD RV2 based APUs, such as 3015Ce, to D3hot to D3 quirk table.

[AMD Official Use Only - Internal Distribution Only] I observed an issue with D3hot to D0 transition on 3015e APUs. Since the peripheral device IP of the APUs already covered by this quirk is almost identical. I added the 3015e. Further testing an a great many machines has not shown the issue

Re: [PATCH] PCI: Add AMD RV2 based APUs, such as 3015Ce, to D3hot to D3 quirk table.

[+cc Daniel, Mika (author, reviewer of 3030df209aa8] On Thu, Mar 11, 2021 at 10:11:35AM +0530, Shirish S wrote: > From: Julian Schroeder > > This allows for an extra 10ms for the state transition. > Currently only AMD PCO based APUs are covered by this table. I'm really glad to see this coming

[PATCH] PCI: Add AMD RV2 based APUs, such as 3015Ce, to D3hot to D3 quirk table.

From: Julian Schroeder This allows for an extra 10ms for the state transition. Currently only AMD PCO based APUs are covered by this table. WIP. Working on commit to kernel.org. Signed-off-by: Julian Schroeder --- drivers/pci/quirks.c | 1 + 1 file changed, 1 insertion(+) diff --git