Re: [PATCH] Reorganize STM32 clocks in order to prepare them for PLLI2S and PLLSAI

Hi Radosław, Yes i m nearly ready to push a patch-set to manage LCD-TFT clock. In my patch-set i introduced PLLI2S and PLLSAI in generic way, and offer the possibility to change the vco frequency (in order to cover all frequencies for any LCD). And then, the vco is no longer a fixed factor.

Re: [PATCH] Reorganize STM32 clocks in order to prepare them for PLLI2S and PLLSAI

Hi Radosław, Yes i m nearly ready to push a patch-set to manage LCD-TFT clock. In my patch-set i introduced PLLI2S and PLLSAI in generic way, and offer the possibility to change the vco frequency (in order to cover all frequencies for any LCD). And then, the vco is no longer a fixed factor.

Re: [PATCH] Reorganize STM32 clocks in order to prepare them for PLLI2S and PLLSAI

Hi Radoslaw, I add Gabriel in the discussion. Gabriel is updating PLL management for STM32F429. Regards Alex On 10/10/2016 12:31 PM, Daniel Thompson wrote: On 10/10/16 10:56, Radosław Pietrzyk wrote: Hi, all plls have the same clock parent which is after a main divider. Currently the

Re: [PATCH] Reorganize STM32 clocks in order to prepare them for PLLI2S and PLLSAI

Hi Radoslaw, I add Gabriel in the discussion. Gabriel is updating PLL management for STM32F429. Regards Alex On 10/10/2016 12:31 PM, Daniel Thompson wrote: On 10/10/16 10:56, Radosław Pietrzyk wrote: Hi, all plls have the same clock parent which is after a main divider. Currently the

Re: [PATCH] Reorganize STM32 clocks in order to prepare them for PLLI2S and PLLSAI

On 10/10/16 10:56, Radosław Pietrzyk wrote: Hi, all plls have the same clock parent which is after a main divider. Currently the divider and multiplier are connected together within vco clock and therefore there is no chance to reuse the divider and clearly state where the conncetion "really"

Re: [PATCH] Reorganize STM32 clocks in order to prepare them for PLLI2S and PLLSAI

On 10/10/16 10:56, Radosław Pietrzyk wrote: Hi, all plls have the same clock parent which is after a main divider. Currently the divider and multiplier are connected together within vco clock and therefore there is no chance to reuse the divider and clearly state where the conncetion "really"

Re: [PATCH] Reorganize STM32 clocks in order to prepare them for PLLI2S and PLLSAI

On 06/10/16 23:01, radek wrote: From: Radoslaw Pietrzyk Signed-off-by: Radoslaw Pietrzyk --- drivers/clk/clk-stm32f4.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/clk/clk-stm32f4.c

Re: [PATCH] Reorganize STM32 clocks in order to prepare them for PLLI2S and PLLSAI

On 06/10/16 23:01, radek wrote: From: Radoslaw Pietrzyk Signed-off-by: Radoslaw Pietrzyk --- drivers/clk/clk-stm32f4.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c index 02d6810..1fd3eac 100644 ---

[PATCH] Reorganize STM32 clocks in order to prepare them for PLLI2S and PLLSAI

From: Radoslaw Pietrzyk Signed-off-by: Radoslaw Pietrzyk --- drivers/clk/clk-stm32f4.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c index

[PATCH] Reorganize STM32 clocks in order to prepare them for PLLI2S and PLLSAI

From: Radoslaw Pietrzyk Signed-off-by: Radoslaw Pietrzyk --- drivers/clk/clk-stm32f4.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c index 02d6810..1fd3eac 100644 --- a/drivers/clk/clk-stm32f4.c +++