Re: [PATCH] clk: sprd: add missing kfree
Quoting Chunyan Zhang (2019-09-05 03:30:09) > From: Chunyan Zhang > > The number of config registers for different pll clocks probably are not > same, so we have to use malloc, and should free the memory before return. > > Fixes: 3e37b005580b ("clk: sprd: add adjustable pll support") > Signed-off-by: Chunyan Zhang > Signed-off-by: Chunyan Zhang > --- Applied to clk-next
Re: [PATCH] clk: sprd: add missing kfree
gentle ping On Thu, 5 Sep 2019 at 18:30, Chunyan Zhang wrote: > > From: Chunyan Zhang > > The number of config registers for different pll clocks probably are not > same, so we have to use malloc, and should free the memory before return. > > Fixes: 3e37b005580b ("clk: sprd: add adjustable pll support") > Signed-off-by: Chunyan Zhang > Signed-off-by: Chunyan Zhang > --- > drivers/clk/sprd/pll.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/clk/sprd/pll.c b/drivers/clk/sprd/pll.c > index 36b4402bf09e..640270f51aa5 100644 > --- a/drivers/clk/sprd/pll.c > +++ b/drivers/clk/sprd/pll.c > @@ -136,6 +136,7 @@ static unsigned long _sprd_pll_recalc_rate(const struct > sprd_pll *pll, > k2 + refin * nint * CLK_PLL_1M; > } > > + kfree(cfg); > return rate; > } > > @@ -222,6 +223,7 @@ static int _sprd_pll_set_rate(const struct sprd_pll *pll, > if (!ret) > udelay(pll->udelay); > > + kfree(cfg); > return ret; > } > > -- > 2.20.1 >
[PATCH] clk: sprd: add missing kfree
From: Chunyan Zhang The number of config registers for different pll clocks probably are not same, so we have to use malloc, and should free the memory before return. Fixes: 3e37b005580b ("clk: sprd: add adjustable pll support") Signed-off-by: Chunyan Zhang Signed-off-by: Chunyan Zhang --- drivers/clk/sprd/pll.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/clk/sprd/pll.c b/drivers/clk/sprd/pll.c index 36b4402bf09e..640270f51aa5 100644 --- a/drivers/clk/sprd/pll.c +++ b/drivers/clk/sprd/pll.c @@ -136,6 +136,7 @@ static unsigned long _sprd_pll_recalc_rate(const struct sprd_pll *pll, k2 + refin * nint * CLK_PLL_1M; } + kfree(cfg); return rate; } @@ -222,6 +223,7 @@ static int _sprd_pll_set_rate(const struct sprd_pll *pll, if (!ret) udelay(pll->udelay); + kfree(cfg); return ret; } -- 2.20.1