Re: [PATCH] clk: ti: clk-7xx: Correct ABE DPLL configuration

2014-07-31 Thread Tero Kristo
On 07/31/2014 01:42 AM, Mike Turquette wrote: Quoting Tero Kristo (2014-07-30 05:27:07) On 07/30/2014 08:53 AM, Peter Ujfalusi wrote: On 07/29/2014 07:12 PM, Mike Turquette wrote: Oh yea, seems this got lost into the myriad of branches I have. I can push this on top of my for-v3.17/ti-clk-drv

Re: [PATCH] clk: ti: clk-7xx: Correct ABE DPLL configuration

2014-07-31 Thread Tero Kristo
On 07/31/2014 01:42 AM, Mike Turquette wrote: Quoting Tero Kristo (2014-07-30 05:27:07) On 07/30/2014 08:53 AM, Peter Ujfalusi wrote: On 07/29/2014 07:12 PM, Mike Turquette wrote: Oh yea, seems this got lost into the myriad of branches I have. I can push this on top of my for-v3.17/ti-clk-drv

Re: [PATCH] clk: ti: clk-7xx: Correct ABE DPLL configuration

2014-07-30 Thread Mike Turquette
Quoting Tero Kristo (2014-07-30 05:27:07) > On 07/30/2014 08:53 AM, Peter Ujfalusi wrote: > > On 07/29/2014 07:12 PM, Mike Turquette wrote: > >>> Oh yea, seems this got lost into the myriad of branches I have. I can push > >>> this on top of my for-v3.17/ti-clk-drv if you like. > >> > >> That is

Re: [PATCH] clk: ti: clk-7xx: Correct ABE DPLL configuration

2014-07-30 Thread Tero Kristo
On 07/30/2014 08:53 AM, Peter Ujfalusi wrote: On 07/29/2014 07:12 PM, Mike Turquette wrote: Oh yea, seems this got lost into the myriad of branches I have. I can push this on top of my for-v3.17/ti-clk-drv if you like. That is the easiest thing for me. I think that Peter wanted to take this

Re: [PATCH] clk: ti: clk-7xx: Correct ABE DPLL configuration

2014-07-30 Thread Tero Kristo
On 07/30/2014 08:53 AM, Peter Ujfalusi wrote: On 07/29/2014 07:12 PM, Mike Turquette wrote: Oh yea, seems this got lost into the myriad of branches I have. I can push this on top of my for-v3.17/ti-clk-drv if you like. That is the easiest thing for me. I think that Peter wanted to take this

Re: [PATCH] clk: ti: clk-7xx: Correct ABE DPLL configuration

2014-07-30 Thread Mike Turquette
Quoting Tero Kristo (2014-07-30 05:27:07) On 07/30/2014 08:53 AM, Peter Ujfalusi wrote: On 07/29/2014 07:12 PM, Mike Turquette wrote: Oh yea, seems this got lost into the myriad of branches I have. I can push this on top of my for-v3.17/ti-clk-drv if you like. That is the easiest thing

Re: [PATCH] clk: ti: clk-7xx: Correct ABE DPLL configuration

2014-07-29 Thread Peter Ujfalusi
On 07/29/2014 07:12 PM, Mike Turquette wrote: >> Oh yea, seems this got lost into the myriad of branches I have. I can push >> this on top of my for-v3.17/ti-clk-drv if you like. > > That is the easiest thing for me. I think that Peter wanted to take > this as a fix for 3.16 though. Peter is that

Re: [PATCH] clk: ti: clk-7xx: Correct ABE DPLL configuration

2014-07-29 Thread Mike Turquette
On Tue, Jul 29, 2014 at 1:23 AM, Tero Kristo wrote: > On 07/29/2014 09:27 AM, Mike Turquette wrote: >> >> Quoting Peter Ujfalusi (2014-07-14 03:10:28) >>> >>> On 05/06/2014 04:39 PM, Peter Ujfalusi wrote: >> >> Tero: can I have your ack for this patch or do you have further >>

Re: [PATCH] clk: ti: clk-7xx: Correct ABE DPLL configuration

2014-07-29 Thread Tero Kristo
On 07/29/2014 09:27 AM, Mike Turquette wrote: Quoting Peter Ujfalusi (2014-07-14 03:10:28) On 05/06/2014 04:39 PM, Peter Ujfalusi wrote: Tero: can I have your ack for this patch or do you have further concerns? Yea looks good to me, except for the fact that there is some work on getting

Re: [PATCH] clk: ti: clk-7xx: Correct ABE DPLL configuration

2014-07-29 Thread Mike Turquette
Quoting Peter Ujfalusi (2014-07-14 03:10:28) > On 05/06/2014 04:39 PM, Peter Ujfalusi wrote: > >>> Tero: can I have your ack for this patch or do you have further concerns? > >> > >> Yea looks good to me, except for the fact that there is some work on > >> getting > >> default rate/parent support

Re: [PATCH] clk: ti: clk-7xx: Correct ABE DPLL configuration

2014-07-29 Thread Mike Turquette
Quoting Peter Ujfalusi (2014-07-14 03:10:28) On 05/06/2014 04:39 PM, Peter Ujfalusi wrote: Tero: can I have your ack for this patch or do you have further concerns? Yea looks good to me, except for the fact that there is some work on getting default rate/parent support through DT. I

Re: [PATCH] clk: ti: clk-7xx: Correct ABE DPLL configuration

2014-07-29 Thread Tero Kristo
On 07/29/2014 09:27 AM, Mike Turquette wrote: Quoting Peter Ujfalusi (2014-07-14 03:10:28) On 05/06/2014 04:39 PM, Peter Ujfalusi wrote: Tero: can I have your ack for this patch or do you have further concerns? Yea looks good to me, except for the fact that there is some work on getting

Re: [PATCH] clk: ti: clk-7xx: Correct ABE DPLL configuration

2014-07-29 Thread Mike Turquette
On Tue, Jul 29, 2014 at 1:23 AM, Tero Kristo t-kri...@ti.com wrote: On 07/29/2014 09:27 AM, Mike Turquette wrote: Quoting Peter Ujfalusi (2014-07-14 03:10:28) On 05/06/2014 04:39 PM, Peter Ujfalusi wrote: Tero: can I have your ack for this patch or do you have further concerns? Yea

Re: [PATCH] clk: ti: clk-7xx: Correct ABE DPLL configuration

2014-07-29 Thread Peter Ujfalusi
On 07/29/2014 07:12 PM, Mike Turquette wrote: Oh yea, seems this got lost into the myriad of branches I have. I can push this on top of my for-v3.17/ti-clk-drv if you like. That is the easiest thing for me. I think that Peter wanted to take this as a fix for 3.16 though. Peter is that

Re: [PATCH] clk: ti: clk-7xx: Correct ABE DPLL configuration

2014-07-14 Thread Peter Ujfalusi
On 05/06/2014 04:39 PM, Peter Ujfalusi wrote: >>> Tero: can I have your ack for this patch or do you have further concerns? >> >> Yea looks good to me, except for the fact that there is some work on getting >> default rate/parent support through DT. I would like a comment from Mike >> about >>

Re: [PATCH] clk: ti: clk-7xx: Correct ABE DPLL configuration

2014-07-14 Thread Peter Ujfalusi
On 05/06/2014 04:39 PM, Peter Ujfalusi wrote: Tero: can I have your ack for this patch or do you have further concerns? Yea looks good to me, except for the fact that there is some work on getting default rate/parent support through DT. I would like a comment from Mike about the estimate

Re: [PATCH] clk: ti: clk-7xx: Correct ABE DPLL configuration

2014-05-19 Thread Tero Kristo
On 05/06/2014 04:39 PM, Peter Ujfalusi wrote: Mike, On 04/24/2014 06:03 PM, Tero Kristo wrote: On 04/24/2014 12:11 PM, Peter Ujfalusi wrote: Mike, Tero, On 04/03/2014 09:29 AM, Peter Ujfalusi wrote: On 04/02/2014 05:12 PM, Tero Kristo wrote: On 04/02/2014 04:48 PM, Peter Ujfalusi wrote:

Re: [PATCH] clk: ti: clk-7xx: Correct ABE DPLL configuration

2014-05-19 Thread Tero Kristo
On 05/06/2014 04:39 PM, Peter Ujfalusi wrote: Mike, On 04/24/2014 06:03 PM, Tero Kristo wrote: On 04/24/2014 12:11 PM, Peter Ujfalusi wrote: Mike, Tero, On 04/03/2014 09:29 AM, Peter Ujfalusi wrote: On 04/02/2014 05:12 PM, Tero Kristo wrote: On 04/02/2014 04:48 PM, Peter Ujfalusi wrote:

Re: [PATCH] clk: ti: clk-7xx: Correct ABE DPLL configuration

2014-05-06 Thread Peter Ujfalusi
Mike, On 04/24/2014 06:03 PM, Tero Kristo wrote: > On 04/24/2014 12:11 PM, Peter Ujfalusi wrote: >> Mike, Tero, >> >> On 04/03/2014 09:29 AM, Peter Ujfalusi wrote: >>> On 04/02/2014 05:12 PM, Tero Kristo wrote: On 04/02/2014 04:48 PM, Peter Ujfalusi wrote: > ABE DPLL frequency need to be

Re: [PATCH] clk: ti: clk-7xx: Correct ABE DPLL configuration

2014-05-06 Thread Peter Ujfalusi
Mike, On 04/24/2014 06:03 PM, Tero Kristo wrote: On 04/24/2014 12:11 PM, Peter Ujfalusi wrote: Mike, Tero, On 04/03/2014 09:29 AM, Peter Ujfalusi wrote: On 04/02/2014 05:12 PM, Tero Kristo wrote: On 04/02/2014 04:48 PM, Peter Ujfalusi wrote: ABE DPLL frequency need to be lowered from

Re: [PATCH] clk: ti: clk-7xx: Correct ABE DPLL configuration

2014-04-24 Thread Tero Kristo
On 04/24/2014 12:11 PM, Peter Ujfalusi wrote: Mike, Tero, On 04/03/2014 09:29 AM, Peter Ujfalusi wrote: On 04/02/2014 05:12 PM, Tero Kristo wrote: On 04/02/2014 04:48 PM, Peter Ujfalusi wrote: ABE DPLL frequency need to be lowered from 361267200 to 180633600 to facilitate the ATL

Re: [PATCH] clk: ti: clk-7xx: Correct ABE DPLL configuration

2014-04-24 Thread Peter Ujfalusi
Mike, Tero, On 04/03/2014 09:29 AM, Peter Ujfalusi wrote: > On 04/02/2014 05:12 PM, Tero Kristo wrote: >> On 04/02/2014 04:48 PM, Peter Ujfalusi wrote: >>> ABE DPLL frequency need to be lowered from 361267200 >>> to 180633600 to facilitate the ATL requironments. >>> The dpll_abe_m2x2_ck clock

Re: [PATCH] clk: ti: clk-7xx: Correct ABE DPLL configuration

2014-04-24 Thread Peter Ujfalusi
Mike, Tero, On 04/03/2014 09:29 AM, Peter Ujfalusi wrote: On 04/02/2014 05:12 PM, Tero Kristo wrote: On 04/02/2014 04:48 PM, Peter Ujfalusi wrote: ABE DPLL frequency need to be lowered from 361267200 to 180633600 to facilitate the ATL requironments. The dpll_abe_m2x2_ck clock need to be set

Re: [PATCH] clk: ti: clk-7xx: Correct ABE DPLL configuration

2014-04-24 Thread Tero Kristo
On 04/24/2014 12:11 PM, Peter Ujfalusi wrote: Mike, Tero, On 04/03/2014 09:29 AM, Peter Ujfalusi wrote: On 04/02/2014 05:12 PM, Tero Kristo wrote: On 04/02/2014 04:48 PM, Peter Ujfalusi wrote: ABE DPLL frequency need to be lowered from 361267200 to 180633600 to facilitate the ATL

Re: [PATCH] clk: ti: clk-7xx: Correct ABE DPLL configuration

2014-04-03 Thread Peter Ujfalusi
On 04/02/2014 05:12 PM, Tero Kristo wrote: > On 04/02/2014 04:48 PM, Peter Ujfalusi wrote: >> ABE DPLL frequency need to be lowered from 361267200 >> to 180633600 to facilitate the ATL requironments. >> The dpll_abe_m2x2_ck clock need to be set to double >> of ABE DPLL rate in order to have

Re: [PATCH] clk: ti: clk-7xx: Correct ABE DPLL configuration

2014-04-03 Thread Peter Ujfalusi
On 04/02/2014 05:12 PM, Tero Kristo wrote: On 04/02/2014 04:48 PM, Peter Ujfalusi wrote: ABE DPLL frequency need to be lowered from 361267200 to 180633600 to facilitate the ATL requironments. The dpll_abe_m2x2_ck clock need to be set to double of ABE DPLL rate in order to have correct clocks

Re: [PATCH] clk: ti: clk-7xx: Correct ABE DPLL configuration

2014-04-02 Thread Tero Kristo
On 04/02/2014 04:48 PM, Peter Ujfalusi wrote: ABE DPLL frequency need to be lowered from 361267200 to 180633600 to facilitate the ATL requironments. The dpll_abe_m2x2_ck clock need to be set to double of ABE DPLL rate in order to have correct clocks for audio. Do you have some sort of TRM

[PATCH] clk: ti: clk-7xx: Correct ABE DPLL configuration

2014-04-02 Thread Peter Ujfalusi
ABE DPLL frequency need to be lowered from 361267200 to 180633600 to facilitate the ATL requironments. The dpll_abe_m2x2_ck clock need to be set to double of ABE DPLL rate in order to have correct clocks for audio. Signed-off-by: Peter Ujfalusi --- drivers/clk/ti/clk-7xx.c | 7 ++- 1 file

[PATCH] clk: ti: clk-7xx: Correct ABE DPLL configuration

2014-04-02 Thread Peter Ujfalusi
ABE DPLL frequency need to be lowered from 361267200 to 180633600 to facilitate the ATL requironments. The dpll_abe_m2x2_ck clock need to be set to double of ABE DPLL rate in order to have correct clocks for audio. Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com --- drivers/clk/ti/clk-7xx.c

Re: [PATCH] clk: ti: clk-7xx: Correct ABE DPLL configuration

2014-04-02 Thread Tero Kristo
On 04/02/2014 04:48 PM, Peter Ujfalusi wrote: ABE DPLL frequency need to be lowered from 361267200 to 180633600 to facilitate the ATL requironments. The dpll_abe_m2x2_ck clock need to be set to double of ABE DPLL rate in order to have correct clocks for audio. Do you have some sort of TRM