Hi Anson,
On Mon, Jul 16, 2018 at 3:14 AM, Anson Huang wrote:
> OK, since i.MX7D has same GPIO type as i.MX35, to make it simple, I just added
> a flag to indicate whether it supports save/restore, only i.MX7D enables
In imx7s.dtsi the gpio nodes have:
compatible = "fsl,imx7d-gpio",
Hi Anson,
On Mon, Jul 16, 2018 at 3:14 AM, Anson Huang wrote:
> OK, since i.MX7D has same GPIO type as i.MX35, to make it simple, I just added
> a flag to indicate whether it supports save/restore, only i.MX7D enables
In imx7s.dtsi the gpio nodes have:
compatible = "fsl,imx7d-gpio",
Hi, Fabio
Anson Huang
Best Regards!
> -Original Message-
> From: Fabio Estevam [mailto:feste...@gmail.com]
> Sent: Sunday, July 15, 2018 12:13 AM
> To: Anson Huang
> Cc: Linus Walleij ; open list:GPIO SUBSYSTEM
> ; linux-kernel ;
> dl-linux-imx
> Subject: Re
Hi, Fabio
Anson Huang
Best Regards!
> -Original Message-
> From: Fabio Estevam [mailto:feste...@gmail.com]
> Sent: Sunday, July 15, 2018 12:13 AM
> To: Anson Huang
> Cc: Linus Walleij ; open list:GPIO SUBSYSTEM
> ; linux-kernel ;
> dl-linux-imx
> Subject: Re
Hi Anson,
On Fri, Jul 13, 2018 at 10:53 PM, Anson Huang wrote:
> Here are the details, i.MX7D LPSR mode and i.MX8QM/8QXP etc.' suspend/resume
> may cause GPIO bank lose power, so need to save/restore, for other i.MX SoCs,
> although no need to do save/restore, but doing it is NOT harmful, so do
Hi Anson,
On Fri, Jul 13, 2018 at 10:53 PM, Anson Huang wrote:
> Here are the details, i.MX7D LPSR mode and i.MX8QM/8QXP etc.' suspend/resume
> may cause GPIO bank lose power, so need to save/restore, for other i.MX SoCs,
> although no need to do save/restore, but doing it is NOT harmful, so do
Hi, Fabio
Anson Huang
Best Regards!
> -Original Message-
> From: Fabio Estevam [mailto:feste...@gmail.com]
> Sent: Saturday, July 14, 2018 2:34 AM
> To: Anson Huang
> Cc: Linus Walleij ; open list:GPIO SUBSYSTEM
> ; linux-kernel ;
> dl-linux-imx
> Subject: Re
Hi, Fabio
Anson Huang
Best Regards!
> -Original Message-
> From: Fabio Estevam [mailto:feste...@gmail.com]
> Sent: Saturday, July 14, 2018 2:34 AM
> To: Anson Huang
> Cc: Linus Walleij ; open list:GPIO SUBSYSTEM
> ; linux-kernel ;
> dl-linux-imx
> Subject: Re
Hi Anson,
On Tue, Jul 10, 2018 at 4:48 AM, Anson Huang wrote:
> GPIO registers could lose context on some i.MX SoCs,
> like on i.MX7D, when enter LPSR mode, the whole SoC
After further reviewing this patchI have a question: here you say that
i.MX7D needs to save some registers.
> will be
Hi Anson,
On Tue, Jul 10, 2018 at 4:48 AM, Anson Huang wrote:
> GPIO registers could lose context on some i.MX SoCs,
> like on i.MX7D, when enter LPSR mode, the whole SoC
After further reviewing this patchI have a question: here you say that
i.MX7D needs to save some registers.
> will be
On Fri, Jul 13, 2018 at 4:11 AM, Linus Walleij wrote:
> On Tue, Jul 10, 2018 at 9:53 AM Anson Huang wrote:
>
>> GPIO registers could lose context on some i.MX SoCs,
>> like on i.MX7D, when enter LPSR mode, the whole SoC
>> will be powered off except LPSR domain, GPIO banks
>> will lose context
On Fri, Jul 13, 2018 at 4:11 AM, Linus Walleij wrote:
> On Tue, Jul 10, 2018 at 9:53 AM Anson Huang wrote:
>
>> GPIO registers could lose context on some i.MX SoCs,
>> like on i.MX7D, when enter LPSR mode, the whole SoC
>> will be powered off except LPSR domain, GPIO banks
>> will lose context
2018-07-13 9:11 GMT+02:00 Linus Walleij :
> On Tue, Jul 10, 2018 at 9:53 AM Anson Huang wrote:
>
>> GPIO registers could lose context on some i.MX SoCs,
>> like on i.MX7D, when enter LPSR mode, the whole SoC
>> will be powered off except LPSR domain, GPIO banks
>> will lose context in this case,
2018-07-13 9:11 GMT+02:00 Linus Walleij :
> On Tue, Jul 10, 2018 at 9:53 AM Anson Huang wrote:
>
>> GPIO registers could lose context on some i.MX SoCs,
>> like on i.MX7D, when enter LPSR mode, the whole SoC
>> will be powered off except LPSR domain, GPIO banks
>> will lose context in this case,
On Tue, Jul 10, 2018 at 9:53 AM Anson Huang wrote:
> GPIO registers could lose context on some i.MX SoCs,
> like on i.MX7D, when enter LPSR mode, the whole SoC
> will be powered off except LPSR domain, GPIO banks
> will lose context in this case, need to restore
> the context after resume from
On Tue, Jul 10, 2018 at 9:53 AM Anson Huang wrote:
> GPIO registers could lose context on some i.MX SoCs,
> like on i.MX7D, when enter LPSR mode, the whole SoC
> will be powered off except LPSR domain, GPIO banks
> will lose context in this case, need to restore
> the context after resume from
GPIO registers could lose context on some i.MX SoCs,
like on i.MX7D, when enter LPSR mode, the whole SoC
will be powered off except LPSR domain, GPIO banks
will lose context in this case, need to restore
the context after resume from LPSR mode.
This patch adds GPIO save/restore for those
GPIO registers could lose context on some i.MX SoCs,
like on i.MX7D, when enter LPSR mode, the whole SoC
will be powered off except LPSR domain, GPIO banks
will lose context in this case, need to restore
the context after resume from LPSR mode.
This patch adds GPIO save/restore for those
18 matches
Mail list logo