Re: [PATCH] riscv: move flush_icache_range/user_range() after flush_icache_all()

2019-09-26 Thread Kefeng Wang



On 2019/9/26 14:52, Andreas Schwab wrote:
> https://lore.kernel.org/linux-riscv/mvm7e9spggv@suse.de/
> 
> Andreas.
> 
Hi Andreas, my change is wrong.

For no SMP,  lkdtm built ok because flush_icache_all() is defined as 
local_flush_icache_all() macro,
but for SMP, the reason of build error is that flush_icache_all() 
implementation is not exported as
you mentioned in your patch,  and this does make allmodconfig broken.

LKDTM is used to test the different dumping mechanisms by inducing system 
failures at predefined
crash points, riscv will enable kernel dump in the future, this module is 
useful to test this mechanism.

so, it's necessary to fix it, right, any comment, thanks.



Re: [PATCH] riscv: move flush_icache_range/user_range() after flush_icache_all()

2019-09-26 Thread Andreas Schwab
https://lore.kernel.org/linux-riscv/mvm7e9spggv@suse.de/

Andreas.

-- 
Andreas Schwab, SUSE Labs, sch...@suse.de
GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE  1748 E4D4 88E3 0EEA B9D7
"And now for something completely different."


Re: [PATCH] riscv: move flush_icache_range/user_range() after flush_icache_all()

2019-09-25 Thread Kefeng Wang
Please ignore this version.

On 2019/9/26 10:29, Kefeng Wang wrote:
> When build lkdtm module, which used flush_icache_range(), error occurred,
>
> ERROR: "flush_icache_all" [drivers/misc/lkdtm/lkdtm.ko] undefined!
>
> Fix it.
>
> Cc: Paul Walmsley 
> Cc: Palmer Dabbelt 
> Cc: Albert Ou 
> Signed-off-by: Kefeng Wang 
> ---
>  arch/riscv/include/asm/cacheflush.h | 14 +++---
>  1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/arch/riscv/include/asm/cacheflush.h 
> b/arch/riscv/include/asm/cacheflush.h
> index 555b20b11dc3..f6ec26589620 100644
> --- a/arch/riscv/include/asm/cacheflush.h
> +++ b/arch/riscv/include/asm/cacheflush.h
> @@ -80,13 +80,6 @@ static inline void flush_dcache_page(struct page *page)
>   clear_bit(PG_dcache_clean, >flags);
>  }
>  
> -/*
> - * RISC-V doesn't have an instruction to flush parts of the instruction 
> cache,
> - * so instead we just flush the whole thing.
> - */
> -#define flush_icache_range(start, end) flush_icache_all()
> -#define flush_icache_user_range(vma, pg, addr, len) flush_icache_all()
> -
>  #ifndef CONFIG_SMP
>  
>  #define flush_icache_all() local_flush_icache_all()
> @@ -99,6 +92,13 @@ void flush_icache_mm(struct mm_struct *mm, bool local);
>  
>  #endif /* CONFIG_SMP */
>  
> +/*
> + * RISC-V doesn't have an instruction to flush parts of the instruction 
> cache,
> + * so instead we just flush the whole thing.
> + */
> +#define flush_icache_range(start, end) flush_icache_all()
> +#define flush_icache_user_range(vma, pg, addr, len) flush_icache_all()
> +
>  /*
>   * Bits in sys_riscv_flush_icache()'s flags argument.
>   */



[PATCH] riscv: move flush_icache_range/user_range() after flush_icache_all()

2019-09-25 Thread Kefeng Wang
When build lkdtm module, which used flush_icache_range(), error occurred,

ERROR: "flush_icache_all" [drivers/misc/lkdtm/lkdtm.ko] undefined!

Fix it.

Cc: Paul Walmsley 
Cc: Palmer Dabbelt 
Cc: Albert Ou 
Signed-off-by: Kefeng Wang 
---
 arch/riscv/include/asm/cacheflush.h | 14 +++---
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/arch/riscv/include/asm/cacheflush.h 
b/arch/riscv/include/asm/cacheflush.h
index 555b20b11dc3..f6ec26589620 100644
--- a/arch/riscv/include/asm/cacheflush.h
+++ b/arch/riscv/include/asm/cacheflush.h
@@ -80,13 +80,6 @@ static inline void flush_dcache_page(struct page *page)
clear_bit(PG_dcache_clean, >flags);
 }
 
-/*
- * RISC-V doesn't have an instruction to flush parts of the instruction cache,
- * so instead we just flush the whole thing.
- */
-#define flush_icache_range(start, end) flush_icache_all()
-#define flush_icache_user_range(vma, pg, addr, len) flush_icache_all()
-
 #ifndef CONFIG_SMP
 
 #define flush_icache_all() local_flush_icache_all()
@@ -99,6 +92,13 @@ void flush_icache_mm(struct mm_struct *mm, bool local);
 
 #endif /* CONFIG_SMP */
 
+/*
+ * RISC-V doesn't have an instruction to flush parts of the instruction cache,
+ * so instead we just flush the whole thing.
+ */
+#define flush_icache_range(start, end) flush_icache_all()
+#define flush_icache_user_range(vma, pg, addr, len) flush_icache_all()
+
 /*
  * Bits in sys_riscv_flush_icache()'s flags argument.
  */
-- 
2.20.1