On Mon, 6 Aug 2018 15:01:37 +0300
Dan Carpenter wrote:
> On Mon, Aug 06, 2018 at 01:46:48PM +0200, Boris Brezillon wrote:
> > Hi Dan,
> >
> > On Wed, 1 Aug 2018 15:05:51 +0300
> > Dan Carpenter wrote:
> >
> > > On Wed, Aug 01, 2018 at 11:24:19AM +0800, Jheng-Jhong Wu wrote:
> > > > For NAN
On Mon, Aug 06, 2018 at 01:46:48PM +0200, Boris Brezillon wrote:
> Hi Dan,
>
> On Wed, 1 Aug 2018 15:05:51 +0300
> Dan Carpenter wrote:
>
> > On Wed, Aug 01, 2018 at 11:24:19AM +0800, Jheng-Jhong Wu wrote:
> > > For NAND flash chips with more than 1Gbit (e.g. MT29F2G) more than 16 bits
> > > are
Hi Dan,
On Wed, 1 Aug 2018 15:05:51 +0300
Dan Carpenter wrote:
> On Wed, Aug 01, 2018 at 11:24:19AM +0800, Jheng-Jhong Wu wrote:
> > For NAND flash chips with more than 1Gbit (e.g. MT29F2G) more than 16 bits
> > are necessary to address the correct page. The driver sets the address for
> > more
On Mon, Aug 06, 2018 at 09:49:01AM +0800, Jheng-Jhong Wu wrote:
> So should I change this into a revert patch, or you will revert commit
> 6efb21d6d0e7 ("staging:mt29f_spinand: MT29F2G failing as only 16 bits
> used for addressing.") by yourself?
> Thanks.
>
Are you asking me? I'm not going to r
So should I change this into a revert patch, or you will revert commit
6efb21d6d0e7 ("staging:mt29f_spinand: MT29F2G failing as only 16 bits
used for addressing.") by yourself?
Thanks.
Best Regards,
Jheng-Jhong Wu (Victor Wu)
On Wed, Aug 01, 2018 at 03:55:30PM +0200, Miquel Raynal wrote:
> Hi Dan,
>
> Dan Carpenter wrote on Wed, 1 Aug 2018
> 15:05:51 +0300:
>
> > On Wed, Aug 01, 2018 at 11:24:19AM +0800, Jheng-Jhong Wu wrote:
> > > For NAND flash chips with more than 1Gbit (e.g. MT29F2G) more than 16 bits
> > > are n
Hi Dan,
Dan Carpenter wrote on Wed, 1 Aug 2018
15:05:51 +0300:
> On Wed, Aug 01, 2018 at 11:24:19AM +0800, Jheng-Jhong Wu wrote:
> > For NAND flash chips with more than 1Gbit (e.g. MT29F2G) more than 16 bits
> > are necessary to address the correct page. The driver sets the address for
> > more
On Wed, Aug 01, 2018 at 11:24:19AM +0800, Jheng-Jhong Wu wrote:
> For NAND flash chips with more than 1Gbit (e.g. MT29F2G) more than 16 bits
> are necessary to address the correct page. The driver sets the address for
> more than 16 bits, but it uses 16-bit arguments and variables (these are
> page
Hi Jheng-Jhong,
On Wed, 1 Aug 2018 11:24:19 +0800
Jheng-Jhong Wu wrote:
> For NAND flash chips with more than 1Gbit (e.g. MT29F2G) more than 16 bits
> are necessary to address the correct page. The driver sets the address for
> more than 16 bits, but it uses 16-bit arguments and variables (thes
For NAND flash chips with more than 1Gbit (e.g. MT29F2G) more than 16 bits
are necessary to address the correct page. The driver sets the address for
more than 16 bits, but it uses 16-bit arguments and variables (these are
page_id, block_id, row) to do address operations. Obviously, these
arguments
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