Re: [PATCH] usb: dwc2: add optional usb ecc reset bit

[John Youn]

On 11/01/2017 08:35 AM, Dinh Nguyen wrote:
> The dwc2 USB controller in Stratix10 has an additional ECC reset bit that
> needs to get de-asserted in order for the controller to work properly.
>
> Signed-off-by: Dinh Nguyen 
> ---
>  drivers/usb/dwc2/core.h |  1 +
>  drivers/usb/dwc2/platform.c | 10 ++
>  2 files changed, 11 insertions(+)
>
> diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
> index 8367d4f9..a4b5f4e 100644
> --- a/drivers/usb/dwc2/core.h
> +++ b/drivers/usb/dwc2/core.h
> @@ -920,6 +920,7 @@ struct dwc2_hsotg {
>   int irq;
>   struct clk *clk;
>   struct reset_control *reset;
> + struct reset_control *reset_ecc;
>
>   unsigned int queuing_high_bandwidth:1;
>   unsigned int srp_success:1;
> diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
> index daf0d37..d466e03 100644
> --- a/drivers/usb/dwc2/platform.c
> +++ b/drivers/usb/dwc2/platform.c
> @@ -220,6 +220,15 @@ static int dwc2_lowlevel_hw_init(struct dwc2_hsotg 
> *hsotg)
>
>   reset_control_deassert(hsotg->reset);
>
> + hsotg->reset_ecc = devm_reset_control_get_optional(hsotg->dev, 
> "dwc2-ecc");
> + if (IS_ERR(hsotg->reset_ecc)) {
> + ret = PTR_ERR(hsotg->reset_ecc);
> + dev_err(hsotg->dev, "error getting reset control for ecc %d\n", 
> ret);
> + return ret;
> + }
> +
> + reset_control_deassert(hsotg->reset_ecc);
> +
>   /* Set default UTMI width */
>   hsotg->phyif = GUSBCFG_PHYIF16;
>
> @@ -318,6 +327,7 @@ static int dwc2_driver_remove(struct platform_device *dev)
>   dwc2_lowlevel_hw_disable(hsotg);
>
>   reset_control_assert(hsotg->reset);
> + reset_control_assert(hsotg->reset_ecc);
>
>   return 0;
>  }
>

Acked-by: John Youn 

John

Re: [PATCH] usb: dwc2: add optional usb ecc reset bit

[John Youn]

On 11/01/2017 08:35 AM, Dinh Nguyen wrote:
> The dwc2 USB controller in Stratix10 has an additional ECC reset bit that
> needs to get de-asserted in order for the controller to work properly.
>
> Signed-off-by: Dinh Nguyen 
> ---
>  drivers/usb/dwc2/core.h |  1 +
>  drivers/usb/dwc2/platform.c | 10 ++
>  2 files changed, 11 insertions(+)
>
> diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
> index 8367d4f9..a4b5f4e 100644
> --- a/drivers/usb/dwc2/core.h
> +++ b/drivers/usb/dwc2/core.h
> @@ -920,6 +920,7 @@ struct dwc2_hsotg {
>   int irq;
>   struct clk *clk;
>   struct reset_control *reset;
> + struct reset_control *reset_ecc;
>
>   unsigned int queuing_high_bandwidth:1;
>   unsigned int srp_success:1;
> diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
> index daf0d37..d466e03 100644
> --- a/drivers/usb/dwc2/platform.c
> +++ b/drivers/usb/dwc2/platform.c
> @@ -220,6 +220,15 @@ static int dwc2_lowlevel_hw_init(struct dwc2_hsotg 
> *hsotg)
>
>   reset_control_deassert(hsotg->reset);
>
> + hsotg->reset_ecc = devm_reset_control_get_optional(hsotg->dev, 
> "dwc2-ecc");
> + if (IS_ERR(hsotg->reset_ecc)) {
> + ret = PTR_ERR(hsotg->reset_ecc);
> + dev_err(hsotg->dev, "error getting reset control for ecc %d\n", 
> ret);
> + return ret;
> + }
> +
> + reset_control_deassert(hsotg->reset_ecc);
> +
>   /* Set default UTMI width */
>   hsotg->phyif = GUSBCFG_PHYIF16;
>
> @@ -318,6 +327,7 @@ static int dwc2_driver_remove(struct platform_device *dev)
>   dwc2_lowlevel_hw_disable(hsotg);
>
>   reset_control_assert(hsotg->reset);
> + reset_control_assert(hsotg->reset_ecc);
>
>   return 0;
>  }
>

Acked-by: John Youn 

John

Re: [PATCH] usb: dwc2: add optional usb ecc reset bit

[Dinh Nguyen]

Hi John,

was wondering if you have gotten a chance to review this?

Thank,
Dinh

On 11/01/2017 10:34 AM, Dinh Nguyen wrote:
> The dwc2 USB controller in Stratix10 has an additional ECC reset bit that
> needs to get de-asserted in order for the controller to work properly.
> 
> Signed-off-by: Dinh Nguyen 
> ---
>  drivers/usb/dwc2/core.h |  1 +
>  drivers/usb/dwc2/platform.c | 10 ++
>  2 files changed, 11 insertions(+)
> 
> diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
> index 8367d4f9..a4b5f4e 100644
> --- a/drivers/usb/dwc2/core.h
> +++ b/drivers/usb/dwc2/core.h
> @@ -920,6 +920,7 @@ struct dwc2_hsotg {
>   int irq;
>   struct clk *clk;
>   struct reset_control *reset;
> + struct reset_control *reset_ecc;
>  
>   unsigned int queuing_high_bandwidth:1;
>   unsigned int srp_success:1;
> diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
> index daf0d37..d466e03 100644
> --- a/drivers/usb/dwc2/platform.c
> +++ b/drivers/usb/dwc2/platform.c
> @@ -220,6 +220,15 @@ static int dwc2_lowlevel_hw_init(struct dwc2_hsotg 
> *hsotg)
>  
>   reset_control_deassert(hsotg->reset);
>  
> + hsotg->reset_ecc = devm_reset_control_get_optional(hsotg->dev, 
> "dwc2-ecc");
> + if (IS_ERR(hsotg->reset_ecc)) {
> + ret = PTR_ERR(hsotg->reset_ecc);
> + dev_err(hsotg->dev, "error getting reset control for ecc %d\n", 
> ret);
> + return ret;
> + }
> +
> + reset_control_deassert(hsotg->reset_ecc);
> +
>   /* Set default UTMI width */
>   hsotg->phyif = GUSBCFG_PHYIF16;
>  
> @@ -318,6 +327,7 @@ static int dwc2_driver_remove(struct platform_device *dev)
>   dwc2_lowlevel_hw_disable(hsotg);
>  
>   reset_control_assert(hsotg->reset);
> + reset_control_assert(hsotg->reset_ecc);
>  
>   return 0;
>  }
> 

Re: [PATCH] usb: dwc2: add optional usb ecc reset bit

[Dinh Nguyen]

Hi John,

was wondering if you have gotten a chance to review this?

Thank,
Dinh

On 11/01/2017 10:34 AM, Dinh Nguyen wrote:
> The dwc2 USB controller in Stratix10 has an additional ECC reset bit that
> needs to get de-asserted in order for the controller to work properly.
> 
> Signed-off-by: Dinh Nguyen 
> ---
>  drivers/usb/dwc2/core.h |  1 +
>  drivers/usb/dwc2/platform.c | 10 ++
>  2 files changed, 11 insertions(+)
> 
> diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
> index 8367d4f9..a4b5f4e 100644
> --- a/drivers/usb/dwc2/core.h
> +++ b/drivers/usb/dwc2/core.h
> @@ -920,6 +920,7 @@ struct dwc2_hsotg {
>   int irq;
>   struct clk *clk;
>   struct reset_control *reset;
> + struct reset_control *reset_ecc;
>  
>   unsigned int queuing_high_bandwidth:1;
>   unsigned int srp_success:1;
> diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
> index daf0d37..d466e03 100644
> --- a/drivers/usb/dwc2/platform.c
> +++ b/drivers/usb/dwc2/platform.c
> @@ -220,6 +220,15 @@ static int dwc2_lowlevel_hw_init(struct dwc2_hsotg 
> *hsotg)
>  
>   reset_control_deassert(hsotg->reset);
>  
> + hsotg->reset_ecc = devm_reset_control_get_optional(hsotg->dev, 
> "dwc2-ecc");
> + if (IS_ERR(hsotg->reset_ecc)) {
> + ret = PTR_ERR(hsotg->reset_ecc);
> + dev_err(hsotg->dev, "error getting reset control for ecc %d\n", 
> ret);
> + return ret;
> + }
> +
> + reset_control_deassert(hsotg->reset_ecc);
> +
>   /* Set default UTMI width */
>   hsotg->phyif = GUSBCFG_PHYIF16;
>  
> @@ -318,6 +327,7 @@ static int dwc2_driver_remove(struct platform_device *dev)
>   dwc2_lowlevel_hw_disable(hsotg);
>  
>   reset_control_assert(hsotg->reset);
> + reset_control_assert(hsotg->reset_ecc);
>  
>   return 0;
>  }
> 

[PATCH] usb: dwc2: add optional usb ecc reset bit

[Dinh Nguyen]

The dwc2 USB controller in Stratix10 has an additional ECC reset bit that
needs to get de-asserted in order for the controller to work properly.

Signed-off-by: Dinh Nguyen 
---
 drivers/usb/dwc2/core.h |  1 +
 drivers/usb/dwc2/platform.c | 10 ++
 2 files changed, 11 insertions(+)

diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
index 8367d4f9..a4b5f4e 100644
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -920,6 +920,7 @@ struct dwc2_hsotg {
int irq;
struct clk *clk;
struct reset_control *reset;
+   struct reset_control *reset_ecc;
 
unsigned int queuing_high_bandwidth:1;
unsigned int srp_success:1;
diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
index daf0d37..d466e03 100644
--- a/drivers/usb/dwc2/platform.c
+++ b/drivers/usb/dwc2/platform.c
@@ -220,6 +220,15 @@ static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
 
reset_control_deassert(hsotg->reset);
 
+   hsotg->reset_ecc = devm_reset_control_get_optional(hsotg->dev, 
"dwc2-ecc");
+   if (IS_ERR(hsotg->reset_ecc)) {
+   ret = PTR_ERR(hsotg->reset_ecc);
+   dev_err(hsotg->dev, "error getting reset control for ecc %d\n", 
ret);
+   return ret;
+   }
+
+   reset_control_deassert(hsotg->reset_ecc);
+
/* Set default UTMI width */
hsotg->phyif = GUSBCFG_PHYIF16;
 
@@ -318,6 +327,7 @@ static int dwc2_driver_remove(struct platform_device *dev)
dwc2_lowlevel_hw_disable(hsotg);
 
reset_control_assert(hsotg->reset);
+   reset_control_assert(hsotg->reset_ecc);
 
return 0;
 }
-- 
2.7.4

[PATCH] usb: dwc2: add optional usb ecc reset bit

[Dinh Nguyen]

The dwc2 USB controller in Stratix10 has an additional ECC reset bit that
needs to get de-asserted in order for the controller to work properly.

Signed-off-by: Dinh Nguyen 
---
 drivers/usb/dwc2/core.h |  1 +
 drivers/usb/dwc2/platform.c | 10 ++
 2 files changed, 11 insertions(+)

diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
index 8367d4f9..a4b5f4e 100644
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -920,6 +920,7 @@ struct dwc2_hsotg {
int irq;
struct clk *clk;
struct reset_control *reset;
+   struct reset_control *reset_ecc;
 
unsigned int queuing_high_bandwidth:1;
unsigned int srp_success:1;
diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
index daf0d37..d466e03 100644
--- a/drivers/usb/dwc2/platform.c
+++ b/drivers/usb/dwc2/platform.c
@@ -220,6 +220,15 @@ static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
 
reset_control_deassert(hsotg->reset);
 
+   hsotg->reset_ecc = devm_reset_control_get_optional(hsotg->dev, 
"dwc2-ecc");
+   if (IS_ERR(hsotg->reset_ecc)) {
+   ret = PTR_ERR(hsotg->reset_ecc);
+   dev_err(hsotg->dev, "error getting reset control for ecc %d\n", 
ret);
+   return ret;
+   }
+
+   reset_control_deassert(hsotg->reset_ecc);
+
/* Set default UTMI width */
hsotg->phyif = GUSBCFG_PHYIF16;
 
@@ -318,6 +327,7 @@ static int dwc2_driver_remove(struct platform_device *dev)
dwc2_lowlevel_hw_disable(hsotg);
 
reset_control_assert(hsotg->reset);
+   reset_control_assert(hsotg->reset_ecc);
 
return 0;
 }
-- 
2.7.4