On 14/07/2019 18:21, Nadav Amit wrote:
>> On Jul 14, 2019, at 8:23 AM, Andy Lutomirski wrote:
>>
>> The APIC, per spec, is fundamentally confused and thinks that
>> interrupt vectors 16-31 are valid. This makes no sense -- the CPU
>> reserves vectors 0-31 for exceptions (faults, traps, etc).
>>
> On Jul 14, 2019, at 8:23 AM, Andy Lutomirski wrote:
>
> The APIC, per spec, is fundamentally confused and thinks that
> interrupt vectors 16-31 are valid. This makes no sense -- the CPU
> reserves vectors 0-31 for exceptions (faults, traps, etc).
> Obviously, no device should actually produce
The APIC, per spec, is fundamentally confused and thinks that
interrupt vectors 16-31 are valid. This makes no sense -- the CPU
reserves vectors 0-31 for exceptions (faults, traps, etc).
Obviously, no device should actually produce an interrupt with
vector 16-31, but we can improve robustness by
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