On July 30, 2019 1:08:43 AM PDT, Peter Zijlstra wrote:
>On Mon, Jul 29, 2019 at 11:44:17PM +0300, Alexey Dobriyan wrote:
>> On Mon, Jul 29, 2019 at 12:04:47PM +0200, Peter Zijlstra wrote:
>> > +#define _ASM_ARG1B__ASM_FORM_RAW(dil)
>> > +#define _ASM_ARG2B__ASM_FORM_RAW(sil)
>> >
On Mon, Jul 29, 2019 at 11:44:17PM +0300, Alexey Dobriyan wrote:
> On Mon, Jul 29, 2019 at 12:04:47PM +0200, Peter Zijlstra wrote:
> > +#define _ASM_ARG1B __ASM_FORM_RAW(dil)
> > +#define _ASM_ARG2B __ASM_FORM_RAW(sil)
> > +#define _ASM_ARG3B __ASM_FORM_RAW(dl)
> > +#define _ASM_ARG4B
On Mon, Jul 29, 2019 at 12:04:47PM +0200, Peter Zijlstra wrote:
> +#define _ASM_ARG1B __ASM_FORM_RAW(dil)
> +#define _ASM_ARG2B __ASM_FORM_RAW(sil)
> +#define _ASM_ARG3B __ASM_FORM_RAW(dl)
> +#define _ASM_ARG4B __ASM_FORM_RAW(cl)
> +#define _ASM_ARG5B __ASM_FORM_RAW(r8b)
> +#define
On Mon, Jul 29, 2019 at 11:43:29AM +0200, Peter Zijlstra wrote:
> I _think_ something like the below should also work:
>
> (fwiw _ASM_ARG 5 and 6 are broken, as are all the QLWB variants)
Fixed that, because
> ---
> diff --git a/arch/x86/include/asm/arch_hweight.h
>
On Sun, Jul 28, 2019 at 02:51:40PM +0300, Alexey Dobriyan wrote:
> Output register is always RAX/EAX.
>
> Signed-off-by: Alexey Dobriyan
> ---
>
> arch/x86/include/asm/arch_hweight.h |6 ++
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
> --- a/arch/x86/include/asm/arch_hweight.h
Output register is always RAX/EAX.
Signed-off-by: Alexey Dobriyan
---
arch/x86/include/asm/arch_hweight.h |6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
--- a/arch/x86/include/asm/arch_hweight.h
+++ b/arch/x86/include/asm/arch_hweight.h
@@ -6,10 +6,8 @@
#ifdef CONFIG_64BIT
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