Re: [PATCH 0/4] Add support for HiSilicon PCIe Tune and Trace device

2021-04-08 Thread Yicong Yang
On 2021/4/7 18:25, Greg KH wrote: > On Wed, Apr 07, 2021 at 06:03:11PM +0800, Yicong Yang wrote: >> On 2021/4/6 21:49, Greg KH wrote: >>> On Tue, Apr 06, 2021 at 08:45:50PM +0800, Yicong Yang wrote: HiSilicon PCIe tune and trace device(PTT) is a PCIe Root Complex integrated

Re: [PATCH 0/4] Add support for HiSilicon PCIe Tune and Trace device

2021-04-07 Thread Greg KH
On Wed, Apr 07, 2021 at 06:03:11PM +0800, Yicong Yang wrote: > On 2021/4/6 21:49, Greg KH wrote: > > On Tue, Apr 06, 2021 at 08:45:50PM +0800, Yicong Yang wrote: > >> HiSilicon PCIe tune and trace device(PTT) is a PCIe Root Complex > >> integrated Endpoint(RCiEP) device, providing the capability >

Re: [PATCH 0/4] Add support for HiSilicon PCIe Tune and Trace device

2021-04-07 Thread Yicong Yang
On 2021/4/6 21:49, Greg KH wrote: > On Tue, Apr 06, 2021 at 08:45:50PM +0800, Yicong Yang wrote: >> HiSilicon PCIe tune and trace device(PTT) is a PCIe Root Complex >> integrated Endpoint(RCiEP) device, providing the capability >> to dynamically monitor and tune the PCIe traffic(tune), >> and

Re: [PATCH 0/4] Add support for HiSilicon PCIe Tune and Trace device

2021-04-06 Thread Greg KH
On Tue, Apr 06, 2021 at 08:45:50PM +0800, Yicong Yang wrote: > HiSilicon PCIe tune and trace device(PTT) is a PCIe Root Complex > integrated Endpoint(RCiEP) device, providing the capability > to dynamically monitor and tune the PCIe traffic(tune), > and trace the TLP headers(trace). The driver

[PATCH 0/4] Add support for HiSilicon PCIe Tune and Trace device

2021-04-06 Thread Yicong Yang
HiSilicon PCIe tune and trace device(PTT) is a PCIe Root Complex integrated Endpoint(RCiEP) device, providing the capability to dynamically monitor and tune the PCIe traffic(tune), and trace the TLP headers(trace). The driver exposes the user interface through debugfs, so no need for extra user