Re: [PATCH 0/4] soc: bcm: brcmstb: BIUCTRL updates

2020-09-06 Thread Florian Fainelli




On 9/4/2020 1:50 PM, Florian Fainelli wrote:

This patch series adds support for two new STB chips: 72164 and 72165
and allows them to be tuned the same way other Brahma-B53 chips are.

The last two changes are some minor configuration changes to the
read-ahead cache logic to improve performance for Cortex-A72 based
systems.


Series applied to drivers/next, there was an incorrectly updated comment 
in the last patch that was removed.

--
Florian


[PATCH 0/4] soc: bcm: brcmstb: BIUCTRL updates

2020-09-04 Thread Florian Fainelli
This patch series adds support for two new STB chips: 72164 and 72165
and allows them to be tuned the same way other Brahma-B53 chips are.

The last two changes are some minor configuration changes to the
read-ahead cache logic to improve performance for Cortex-A72 based
systems.

Florian Fainelli (4):
  soc: bcm: brcmstb: biuctrl: Tune MCP settings for 72164
  soc: bcm: brcmstb: biuctrl: Tune MCP settings for 72165
  soc: bcm: brcmstb: biuctrl: Change RAC prefetch distance from +/-1 to
+/- 2
  soc: bcm: brcmstb: biuctrl: Change RAC data line prefetching after 4
consecutive lines

 drivers/soc/bcm/brcmstb/biuctrl.c | 30 +-
 1 file changed, 25 insertions(+), 5 deletions(-)

-- 
2.25.1