Re: [EXT] Re: [PATCH 03/11] dts: mvebu: Add pin control definitions for SDIO interafce

2021-02-03 Thread Andrew Lunn
> > > + sdhci_pins: sdhi-pins {
> > 
> > sdhi-pins ?
> > 
> [KP] You mean to replace the underline with dash?

I think he would like a c added in the correct place.

  Andrew


RE: [EXT] Re: [PATCH 03/11] dts: mvebu: Add pin control definitions for SDIO interafce

2021-02-03 Thread Kostya Porotchkin



> > > > +   sdhci_pins: sdhi-pins {
> > >
> > > sdhi-pins ?
> > >
> > [KP] You mean to replace the underline with dash?
> 
> I think he would like a c added in the correct place.
> 
[KP] Ahh, now I see it. Thank you, Andrew!
Kosta

>   Andrew


RE: [EXT] Re: [PATCH 03/11] dts: mvebu: Add pin control definitions for SDIO interafce

2021-02-03 Thread Kostya Porotchkin
Hu, Russel,

> -Original Message-
> From: Russell King - ARM Linux admin 
> Sent: Wednesday, February 3, 2021 16:28
> To: Kostya Porotchkin 
> Cc: linux-kernel@vger.kernel.org; devicet...@vger.kernel.org; linux-arm-
> ker...@lists.infradead.org; robh...@kernel.org;
> sebastian.hesselba...@gmail.com; gregory.clem...@bootlin.com;
> and...@lunn.ch; m...@semihalf.com; j...@semihalf.com; Nadav Haklai
> ; Stefan Chulski ; Ben Peled
> 
> Subject: [EXT] Re: [PATCH 03/11] dts: mvebu: Add pin control definitions for
> SDIO interafce
> 
> External Email
> 
> --
> On Wed, Feb 03, 2021 at 03:31:30PM +0200, kos...@marvell.com wrote:
> > From: Konstantin Porotchkin 
> >
> > Add SDIO mode pin control configration for CP0 on A8K DB.
> >
> > Signed-off-by: Konstantin Porotchkin 
> > ---
> >  arch/arm64/boot/dts/marvell/armada-70x0.dtsi | 6 ++
> > arch/arm64/boot/dts/marvell/armada-80x0.dtsi | 6 ++
> >  2 files changed, 12 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/marvell/armada-70x0.dtsi
> > b/arch/arm64/boot/dts/marvell/armada-70x0.dtsi
> > index 293403a1a333..179218774ba9 100644
> > --- a/arch/arm64/boot/dts/marvell/armada-70x0.dtsi
> > +++ b/arch/arm64/boot/dts/marvell/armada-70x0.dtsi
> > @@ -47,6 +47,12 @@
> > cp0_pinctrl: pinctrl {
> > compatible = "marvell,armada-7k-pinctrl";
> >
> > +   sdhci_pins: sdhi-pins {
> 
> sdhi-pins ?
> 
[KP] You mean to replace the underline with dash?
Will do it in the next version, no problem.

> > +   marvell,pins = "mpp56", "mpp57", "mpp58",
> > +  "mpp59", "mpp60", "mpp61", "mpp62";
> > +   marvell,function = "sdio";
> > +   };
> > +
> > nand_pins: nand-pins {
> > marvell,pins =
> > "mpp15", "mpp16", "mpp17", "mpp18", diff --git
> > a/arch/arm64/boot/dts/marvell/armada-80x0.dtsi
> > b/arch/arm64/boot/dts/marvell/armada-80x0.dtsi
> > index ee67c70bf02e..64100ae204da 100644
> > --- a/arch/arm64/boot/dts/marvell/armada-80x0.dtsi
> > +++ b/arch/arm64/boot/dts/marvell/armada-80x0.dtsi
> > @@ -70,6 +70,12 @@
> >  _syscon0 {
> > cp0_pinctrl: pinctrl {
> > compatible = "marvell,armada-8k-cpm-pinctrl";
> > +
> > +   sdhci_pins: sdhi-pins {
> 
> sdhi-pins ?
> 
> > +   marvell,pins = "mpp56", "mpp57", "mpp58",
> > +  "mpp59", "mpp60", "mpp61", "mpp62";
> > +   marvell,function = "sdio";
> > +   };
> > };
> >  };
> >
> > --
> > 2.17.1
> >
> >
> 
> --
> RMK's Patch system: https://urldefense.proofpoint.com/v2/url?u=https-
> 3A__www.armlinux.org.uk_developer_patches_=DwIBAg=nKjWec2b6R0
> mOyPaz7xtfQ=-
> N9sN4p5NSr0JGQoQ_2UCOgAqajG99W1EbSOww0WU8o=wUA0mnqioCngi
> HLZcn2iOBuiWLQtawWb1yfozx_80C4=_yolpLSRiJi4CnA-
> iEzpbF5r77VBdLcM6pouXxTdupk=
> FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!


RE: [EXT] Re: [PATCH 03/11] dts: mvebu: Add pin control definitions for SDIO interafce

2021-02-03 Thread Kostya Porotchkin



> -Original Message-
> From: Baruch Siach 
> Sent: Wednesday, February 3, 2021 16:01
> To: Kostya Porotchkin 
> Cc: linux-kernel@vger.kernel.org; devicet...@vger.kernel.org;
> and...@lunn.ch; j...@semihalf.com; gregory.clem...@bootlin.com;
> li...@armlinux.org.uk; Nadav Haklai ;
> robh...@kernel.org; Stefan Chulski ;
> m...@semihalf.com; Ben Peled ;
> sebastian.hesselba...@gmail.com; linux-arm-ker...@lists.infradead.org
> Subject: [EXT] Re: [PATCH 03/11] dts: mvebu: Add pin control definitions for
> SDIO interafce
> 
> External Email
> 
> --
> Hi Konstantin,
> 
> On Wed, Feb 03 2021, kos...@marvell.com wrote:
> > From: Konstantin Porotchkin 
> >
> > Add SDIO mode pin control configration for CP0 on A8K DB.
> 
> This patch does not touch the A8K DB device-tree file.
> 
[KP] Right, it changes the SoC DTSI. I missed it when ported the patch.
Will fix in the next version

Kosta

> baruch
> 
> >
> > Signed-off-by: Konstantin Porotchkin 
> > ---
> >  arch/arm64/boot/dts/marvell/armada-70x0.dtsi | 6 ++
> > arch/arm64/boot/dts/marvell/armada-80x0.dtsi | 6 ++
> >  2 files changed, 12 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/marvell/armada-70x0.dtsi
> > b/arch/arm64/boot/dts/marvell/armada-70x0.dtsi
> > index 293403a1a333..179218774ba9 100644
> > --- a/arch/arm64/boot/dts/marvell/armada-70x0.dtsi
> > +++ b/arch/arm64/boot/dts/marvell/armada-70x0.dtsi
> > @@ -47,6 +47,12 @@
> > cp0_pinctrl: pinctrl {
> > compatible = "marvell,armada-7k-pinctrl";
> >
> > +   sdhci_pins: sdhi-pins {
> > +   marvell,pins = "mpp56", "mpp57", "mpp58",
> > +  "mpp59", "mpp60", "mpp61", "mpp62";
> > +   marvell,function = "sdio";
> > +   };
> > +
> > nand_pins: nand-pins {
> > marvell,pins =
> > "mpp15", "mpp16", "mpp17", "mpp18", diff --git
> > a/arch/arm64/boot/dts/marvell/armada-80x0.dtsi
> > b/arch/arm64/boot/dts/marvell/armada-80x0.dtsi
> > index ee67c70bf02e..64100ae204da 100644
> > --- a/arch/arm64/boot/dts/marvell/armada-80x0.dtsi
> > +++ b/arch/arm64/boot/dts/marvell/armada-80x0.dtsi
> > @@ -70,6 +70,12 @@
> >  _syscon0 {
> > cp0_pinctrl: pinctrl {
> > compatible = "marvell,armada-8k-cpm-pinctrl";
> > +
> > +   sdhci_pins: sdhi-pins {
> > +   marvell,pins = "mpp56", "mpp57", "mpp58",
> > +  "mpp59", "mpp60", "mpp61", "mpp62";
> > +   marvell,function = "sdio";
> > +   };
> > };
> >  };
> 
> 
> --
>  ~. .~   Tk Open Systems
> =}ooO--U--Ooo{=
>- bar...@tkos.co.il - tel: +972.52.368.4656,
> https://urldefense.proofpoint.com/v2/url?u=http-
> 3A__www.tkos.co.il=DwIBAg=nKjWec2b6R0mOyPaz7xtfQ=-
> N9sN4p5NSr0JGQoQ_2UCOgAqajG99W1EbSOww0WU8o=8Kz0ddezxxG41
> 9tiQOva_I9GUi6QZw9Pa6tRxYugqQw=Ky8dBlut-daLt2-
> 0j3BIwiBEBAVzKi8e9oJetRIzuPA=  -


Re: [PATCH 03/11] dts: mvebu: Add pin control definitions for SDIO interafce

2021-02-03 Thread Russell King - ARM Linux admin
On Wed, Feb 03, 2021 at 03:31:30PM +0200, kos...@marvell.com wrote:
> From: Konstantin Porotchkin 
> 
> Add SDIO mode pin control configration for CP0 on A8K DB.
> 
> Signed-off-by: Konstantin Porotchkin 
> ---
>  arch/arm64/boot/dts/marvell/armada-70x0.dtsi | 6 ++
>  arch/arm64/boot/dts/marvell/armada-80x0.dtsi | 6 ++
>  2 files changed, 12 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/marvell/armada-70x0.dtsi 
> b/arch/arm64/boot/dts/marvell/armada-70x0.dtsi
> index 293403a1a333..179218774ba9 100644
> --- a/arch/arm64/boot/dts/marvell/armada-70x0.dtsi
> +++ b/arch/arm64/boot/dts/marvell/armada-70x0.dtsi
> @@ -47,6 +47,12 @@
>   cp0_pinctrl: pinctrl {
>   compatible = "marvell,armada-7k-pinctrl";
>  
> + sdhci_pins: sdhi-pins {

sdhi-pins ?

> + marvell,pins = "mpp56", "mpp57", "mpp58",
> +"mpp59", "mpp60", "mpp61", "mpp62";
> + marvell,function = "sdio";
> + };
> +
>   nand_pins: nand-pins {
>   marvell,pins =
>   "mpp15", "mpp16", "mpp17", "mpp18",
> diff --git a/arch/arm64/boot/dts/marvell/armada-80x0.dtsi 
> b/arch/arm64/boot/dts/marvell/armada-80x0.dtsi
> index ee67c70bf02e..64100ae204da 100644
> --- a/arch/arm64/boot/dts/marvell/armada-80x0.dtsi
> +++ b/arch/arm64/boot/dts/marvell/armada-80x0.dtsi
> @@ -70,6 +70,12 @@
>  _syscon0 {
>   cp0_pinctrl: pinctrl {
>   compatible = "marvell,armada-8k-cpm-pinctrl";
> +
> + sdhci_pins: sdhi-pins {

sdhi-pins ?

> + marvell,pins = "mpp56", "mpp57", "mpp58",
> +"mpp59", "mpp60", "mpp61", "mpp62";
> + marvell,function = "sdio";
> + };
>   };
>  };
>  
> -- 
> 2.17.1
> 
> 

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!


Re: [PATCH 03/11] dts: mvebu: Add pin control definitions for SDIO interafce

2021-02-03 Thread Baruch Siach
Hi Konstantin,

On Wed, Feb 03 2021, kos...@marvell.com wrote:
> From: Konstantin Porotchkin 
>
> Add SDIO mode pin control configration for CP0 on A8K DB.

This patch does not touch the A8K DB device-tree file.

baruch

>
> Signed-off-by: Konstantin Porotchkin 
> ---
>  arch/arm64/boot/dts/marvell/armada-70x0.dtsi | 6 ++
>  arch/arm64/boot/dts/marvell/armada-80x0.dtsi | 6 ++
>  2 files changed, 12 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-70x0.dtsi 
> b/arch/arm64/boot/dts/marvell/armada-70x0.dtsi
> index 293403a1a333..179218774ba9 100644
> --- a/arch/arm64/boot/dts/marvell/armada-70x0.dtsi
> +++ b/arch/arm64/boot/dts/marvell/armada-70x0.dtsi
> @@ -47,6 +47,12 @@
>   cp0_pinctrl: pinctrl {
>   compatible = "marvell,armada-7k-pinctrl";
>  
> + sdhci_pins: sdhi-pins {
> + marvell,pins = "mpp56", "mpp57", "mpp58",
> +"mpp59", "mpp60", "mpp61", "mpp62";
> + marvell,function = "sdio";
> + };
> +
>   nand_pins: nand-pins {
>   marvell,pins =
>   "mpp15", "mpp16", "mpp17", "mpp18",
> diff --git a/arch/arm64/boot/dts/marvell/armada-80x0.dtsi 
> b/arch/arm64/boot/dts/marvell/armada-80x0.dtsi
> index ee67c70bf02e..64100ae204da 100644
> --- a/arch/arm64/boot/dts/marvell/armada-80x0.dtsi
> +++ b/arch/arm64/boot/dts/marvell/armada-80x0.dtsi
> @@ -70,6 +70,12 @@
>  _syscon0 {
>   cp0_pinctrl: pinctrl {
>   compatible = "marvell,armada-8k-cpm-pinctrl";
> +
> + sdhci_pins: sdhi-pins {
> + marvell,pins = "mpp56", "mpp57", "mpp58",
> +"mpp59", "mpp60", "mpp61", "mpp62";
> + marvell,function = "sdio";
> + };
>   };
>  };


-- 
 ~. .~   Tk Open Systems
=}ooO--U--Ooo{=
   - bar...@tkos.co.il - tel: +972.52.368.4656, http://www.tkos.co.il -


[PATCH 03/11] dts: mvebu: Add pin control definitions for SDIO interafce

2021-02-03 Thread kostap
From: Konstantin Porotchkin 

Add SDIO mode pin control configration for CP0 on A8K DB.

Signed-off-by: Konstantin Porotchkin 
---
 arch/arm64/boot/dts/marvell/armada-70x0.dtsi | 6 ++
 arch/arm64/boot/dts/marvell/armada-80x0.dtsi | 6 ++
 2 files changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/marvell/armada-70x0.dtsi 
b/arch/arm64/boot/dts/marvell/armada-70x0.dtsi
index 293403a1a333..179218774ba9 100644
--- a/arch/arm64/boot/dts/marvell/armada-70x0.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-70x0.dtsi
@@ -47,6 +47,12 @@
cp0_pinctrl: pinctrl {
compatible = "marvell,armada-7k-pinctrl";
 
+   sdhci_pins: sdhi-pins {
+   marvell,pins = "mpp56", "mpp57", "mpp58",
+  "mpp59", "mpp60", "mpp61", "mpp62";
+   marvell,function = "sdio";
+   };
+
nand_pins: nand-pins {
marvell,pins =
"mpp15", "mpp16", "mpp17", "mpp18",
diff --git a/arch/arm64/boot/dts/marvell/armada-80x0.dtsi 
b/arch/arm64/boot/dts/marvell/armada-80x0.dtsi
index ee67c70bf02e..64100ae204da 100644
--- a/arch/arm64/boot/dts/marvell/armada-80x0.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-80x0.dtsi
@@ -70,6 +70,12 @@
 _syscon0 {
cp0_pinctrl: pinctrl {
compatible = "marvell,armada-8k-cpm-pinctrl";
+
+   sdhci_pins: sdhi-pins {
+   marvell,pins = "mpp56", "mpp57", "mpp58",
+  "mpp59", "mpp60", "mpp61", "mpp62";
+   marvell,function = "sdio";
+   };
};
 };
 
-- 
2.17.1