Re: [PATCH 04/12] ARM: sa1100/pxa: fix MTD_XIP build

On Sun, Jul 23, 2017 at 5:53 PM, Robert Jarzmik wrote: > Arnd Bergmann writes: > > Hi Arnd, > >> -#define xip_irqpending() (ICIP & ICMR) >> +/* restored July 2017, this did not build since 2011! */ >> + >> +#define ICIP

Re: [PATCH 04/12] ARM: sa1100/pxa: fix MTD_XIP build

On Sun, Jul 23, 2017 at 5:53 PM, Robert Jarzmik wrote: > Arnd Bergmann writes: > > Hi Arnd, > >> -#define xip_irqpending() (ICIP & ICMR) >> +/* restored July 2017, this did not build since 2011! */ >> + >> +#define ICIP io_p2v(0x40d0) >> +#define ICMR

Re: [PATCH 04/12] ARM: sa1100/pxa: fix MTD_XIP build

Arnd Bergmann writes: Hi Arnd, > -#define xip_irqpending() (ICIP & ICMR) > +/* restored July 2017, this did not build since 2011! */ > + > +#define ICIP io_p2v(0x40d0) > +#define ICMR io_p2v(0x40d4) Okay, I suppose the IO mapping is

Re: [PATCH 04/12] ARM: sa1100/pxa: fix MTD_XIP build

Arnd Bergmann writes: Hi Arnd, > -#define xip_irqpending() (ICIP & ICMR) > +/* restored July 2017, this did not build since 2011! */ > + > +#define ICIP io_p2v(0x40d0) > +#define ICMR io_p2v(0x40d4) Okay, I suppose the IO mapping is guaranteed to

[PATCH 04/12] ARM: sa1100/pxa: fix MTD_XIP build

In commit 3169663ac5902 "ARM: sa11x0/pxa: convert OS timer registers to IOMEM", the definition of the OSCR macro was changed to be an __iomem pointer, but the same register is also used by the XIP code. This patch does the corresponding change here as well. On PXA, the IRQ register definitions

[PATCH 04/12] ARM: sa1100/pxa: fix MTD_XIP build

In commit 3169663ac5902 "ARM: sa11x0/pxa: convert OS timer registers to IOMEM", the definition of the OSCR macro was changed to be an __iomem pointer, but the same register is also used by the XIP code. This patch does the corresponding change here as well. On PXA, the IRQ register definitions