On Thursday, July 30, 2015 at 02:18:09 PM, Michal Suchanek wrote:
> On 30 July 2015 at 13:24, Marek Vasut wrote:
> > On Monday, July 27, 2015 at 10:43:05 PM, Michal Suchanek wrote:
> >> On 27 July 2015 at 19:43, Marek Vasut wrote:
> >> > On Monday, July 27, 2015 at 11:46:25 AM, Michal Suchanek
On 30 July 2015 at 13:24, Marek Vasut wrote:
> On Monday, July 27, 2015 at 10:43:05 PM, Michal Suchanek wrote:
>> On 27 July 2015 at 19:43, Marek Vasut wrote:
>> > On Monday, July 27, 2015 at 11:46:25 AM, Michal Suchanek wrote:
>> >> On 24 July 2015 at 10:34, Marek Vasut wrote:
>> >> > On
On Monday, July 27, 2015 at 10:43:05 PM, Michal Suchanek wrote:
> On 27 July 2015 at 19:43, Marek Vasut wrote:
> > On Monday, July 27, 2015 at 11:46:25 AM, Michal Suchanek wrote:
> >> On 24 July 2015 at 10:34, Marek Vasut wrote:
> >> > On Thursday, July 23, 2015 at 07:03:47 PM, Michal Suchanek
On 30 July 2015 at 13:24, Marek Vasut ma...@denx.de wrote:
On Monday, July 27, 2015 at 10:43:05 PM, Michal Suchanek wrote:
On 27 July 2015 at 19:43, Marek Vasut ma...@denx.de wrote:
On Monday, July 27, 2015 at 11:46:25 AM, Michal Suchanek wrote:
On 24 July 2015 at 10:34, Marek Vasut
On Thursday, July 30, 2015 at 02:18:09 PM, Michal Suchanek wrote:
On 30 July 2015 at 13:24, Marek Vasut ma...@denx.de wrote:
On Monday, July 27, 2015 at 10:43:05 PM, Michal Suchanek wrote:
On 27 July 2015 at 19:43, Marek Vasut ma...@denx.de wrote:
On Monday, July 27, 2015 at 11:46:25 AM,
On Monday, July 27, 2015 at 10:43:05 PM, Michal Suchanek wrote:
On 27 July 2015 at 19:43, Marek Vasut ma...@denx.de wrote:
On Monday, July 27, 2015 at 11:46:25 AM, Michal Suchanek wrote:
On 24 July 2015 at 10:34, Marek Vasut ma...@denx.de wrote:
On Thursday, July 23, 2015 at 07:03:47 PM,
On 27 July 2015 at 19:43, Marek Vasut wrote:
> On Monday, July 27, 2015 at 11:46:25 AM, Michal Suchanek wrote:
>> On 24 July 2015 at 10:34, Marek Vasut wrote:
>> > On Thursday, July 23, 2015 at 07:03:47 PM, Michal Suchanek wrote:
>> >
>> Ok, so here is some summary.
>>
>> I have a NOR flash
On Monday, July 27, 2015 at 11:46:25 AM, Michal Suchanek wrote:
> On 24 July 2015 at 10:34, Marek Vasut wrote:
> > On Thursday, July 23, 2015 at 07:03:47 PM, Michal Suchanek wrote:
> >
> > Hi!
> >
> > [...]
> >
> >> >>> It's probably slower to set up DMA for 2-byte commands but it might
> >>
On 24 July 2015 at 10:34, Marek Vasut wrote:
> On Thursday, July 23, 2015 at 07:03:47 PM, Michal Suchanek wrote:
>
> Hi!
>
> [...]
>
>> >>> It's probably slower to set up DMA for 2-byte commands but it might
>> >>> work nonetheless.
>> >>
>> >> It is, the overhead will be considerable. It might
On Monday, July 27, 2015 at 11:46:25 AM, Michal Suchanek wrote:
On 24 July 2015 at 10:34, Marek Vasut ma...@denx.de wrote:
On Thursday, July 23, 2015 at 07:03:47 PM, Michal Suchanek wrote:
Hi!
[...]
It's probably slower to set up DMA for 2-byte commands but it might
work
On 27 July 2015 at 19:43, Marek Vasut ma...@denx.de wrote:
On Monday, July 27, 2015 at 11:46:25 AM, Michal Suchanek wrote:
On 24 July 2015 at 10:34, Marek Vasut ma...@denx.de wrote:
On Thursday, July 23, 2015 at 07:03:47 PM, Michal Suchanek wrote:
Ok, so here is some summary.
I have a NOR
On 24 July 2015 at 10:34, Marek Vasut ma...@denx.de wrote:
On Thursday, July 23, 2015 at 07:03:47 PM, Michal Suchanek wrote:
Hi!
[...]
It's probably slower to set up DMA for 2-byte commands but it might
work nonetheless.
It is, the overhead will be considerable. It might help the
On 24 July 2015 at 10:34, Marek Vasut wrote:
> On Thursday, July 23, 2015 at 07:03:47 PM, Michal Suchanek wrote:
>
> Hi!
>
> [...]
>
>> >>> It's probably slower to set up DMA for 2-byte commands but it might
>> >>> work nonetheless.
>> >>
>> >> It is, the overhead will be considerable. It might
On Thursday, July 23, 2015 at 07:03:47 PM, Michal Suchanek wrote:
Hi!
[...]
> >>> It's probably slower to set up DMA for 2-byte commands but it might
> >>> work nonetheless.
> >>
> >> It is, the overhead will be considerable. It might help the stability
> >> though. I'm really looking forward
On Thursday, July 23, 2015 at 07:03:47 PM, Michal Suchanek wrote:
Hi!
[...]
It's probably slower to set up DMA for 2-byte commands but it might
work nonetheless.
It is, the overhead will be considerable. It might help the stability
though. I'm really looking forward to the results!
On 24 July 2015 at 10:34, Marek Vasut ma...@denx.de wrote:
On Thursday, July 23, 2015 at 07:03:47 PM, Michal Suchanek wrote:
Hi!
[...]
It's probably slower to set up DMA for 2-byte commands but it might
work nonetheless.
It is, the overhead will be considerable. It might help the
On 23 July 2015 at 18:46, Michal Suchanek wrote:
> On 22 July 2015 at 11:01, Marek Vasut wrote:
>> On Wednesday, July 22, 2015 at 10:38:14 AM, Michal Suchanek wrote:
>>> On 22 July 2015 at 10:24, Marek Vasut wrote:
>>> > On Wednesday, July 22, 2015 at 10:18:04 AM, Michal Suchanek wrote:
>>> >>
On 22 July 2015 at 11:01, Marek Vasut wrote:
> On Wednesday, July 22, 2015 at 10:38:14 AM, Michal Suchanek wrote:
>> On 22 July 2015 at 10:24, Marek Vasut wrote:
>> > On Wednesday, July 22, 2015 at 10:18:04 AM, Michal Suchanek wrote:
>> >> On 22 July 2015 at 09:58, Marek Vasut wrote:
>> >> > On
On 22 July 2015 at 11:01, Marek Vasut ma...@denx.de wrote:
On Wednesday, July 22, 2015 at 10:38:14 AM, Michal Suchanek wrote:
On 22 July 2015 at 10:24, Marek Vasut ma...@denx.de wrote:
On Wednesday, July 22, 2015 at 10:18:04 AM, Michal Suchanek wrote:
On 22 July 2015 at 09:58, Marek Vasut
On 23 July 2015 at 18:46, Michal Suchanek hramr...@gmail.com wrote:
On 22 July 2015 at 11:01, Marek Vasut ma...@denx.de wrote:
On Wednesday, July 22, 2015 at 10:38:14 AM, Michal Suchanek wrote:
On 22 July 2015 at 10:24, Marek Vasut ma...@denx.de wrote:
On Wednesday, July 22, 2015 at 10:18:04
On Wednesday, July 22, 2015 at 10:38:14 AM, Michal Suchanek wrote:
> On 22 July 2015 at 10:24, Marek Vasut wrote:
> > On Wednesday, July 22, 2015 at 10:18:04 AM, Michal Suchanek wrote:
> >> On 22 July 2015 at 09:58, Marek Vasut wrote:
> >> > On Wednesday, July 22, 2015 at 09:45:27 AM, Michal
On 22 July 2015 at 10:24, Marek Vasut wrote:
> On Wednesday, July 22, 2015 at 10:18:04 AM, Michal Suchanek wrote:
>> On 22 July 2015 at 09:58, Marek Vasut wrote:
>> > On Wednesday, July 22, 2015 at 09:45:27 AM, Michal Suchanek wrote:
>> >> On 22 July 2015 at 09:33, Marek Vasut wrote:
>> >> > On
On Wednesday, July 22, 2015 at 10:18:04 AM, Michal Suchanek wrote:
> On 22 July 2015 at 09:58, Marek Vasut wrote:
> > On Wednesday, July 22, 2015 at 09:45:27 AM, Michal Suchanek wrote:
> >> On 22 July 2015 at 09:33, Marek Vasut wrote:
> >> > On Wednesday, July 22, 2015 at 09:30:54 AM, Michal
On 22 July 2015 at 09:58, Marek Vasut wrote:
> On Wednesday, July 22, 2015 at 09:45:27 AM, Michal Suchanek wrote:
>> On 22 July 2015 at 09:33, Marek Vasut wrote:
>> > On Wednesday, July 22, 2015 at 09:30:54 AM, Michal Suchanek wrote:
>> >> On 22 July 2015 at 06:49, Vinod Koul wrote:
>> >> > On
On Wednesday, July 22, 2015 at 09:45:27 AM, Michal Suchanek wrote:
> On 22 July 2015 at 09:33, Marek Vasut wrote:
> > On Wednesday, July 22, 2015 at 09:30:54 AM, Michal Suchanek wrote:
> >> On 22 July 2015 at 06:49, Vinod Koul wrote:
> >> > On Tue, Jul 21, 2015 at 10:14:11AM +0200, Michal
On 22 July 2015 at 09:33, Marek Vasut wrote:
> On Wednesday, July 22, 2015 at 09:30:54 AM, Michal Suchanek wrote:
>> On 22 July 2015 at 06:49, Vinod Koul wrote:
>> > On Tue, Jul 21, 2015 at 10:14:11AM +0200, Michal Suchanek wrote:
>> >> > Or alternatively we could publish the limitations of the
On Wednesday, July 22, 2015 at 09:30:54 AM, Michal Suchanek wrote:
> On 22 July 2015 at 06:49, Vinod Koul wrote:
> > On Tue, Jul 21, 2015 at 10:14:11AM +0200, Michal Suchanek wrote:
> >> > Or alternatively we could publish the limitations of the channel using
> >> > capabilities so SPI knows I
On 22 July 2015 at 06:49, Vinod Koul wrote:
> On Tue, Jul 21, 2015 at 10:14:11AM +0200, Michal Suchanek wrote:
>> > Or alternatively we could publish the limitations of the channel using
>> > capabilities so SPI knows I have a dmaengine channel and it can transfer
>> > max N
>> > length
On Wednesday, July 22, 2015 at 09:30:54 AM, Michal Suchanek wrote:
On 22 July 2015 at 06:49, Vinod Koul vinod.k...@intel.com wrote:
On Tue, Jul 21, 2015 at 10:14:11AM +0200, Michal Suchanek wrote:
Or alternatively we could publish the limitations of the channel using
capabilities so SPI
On 22 July 2015 at 06:49, Vinod Koul vinod.k...@intel.com wrote:
On Tue, Jul 21, 2015 at 10:14:11AM +0200, Michal Suchanek wrote:
Or alternatively we could publish the limitations of the channel using
capabilities so SPI knows I have a dmaengine channel and it can transfer
max N
length
On 22 July 2015 at 09:58, Marek Vasut ma...@denx.de wrote:
On Wednesday, July 22, 2015 at 09:45:27 AM, Michal Suchanek wrote:
On 22 July 2015 at 09:33, Marek Vasut ma...@denx.de wrote:
On Wednesday, July 22, 2015 at 09:30:54 AM, Michal Suchanek wrote:
On 22 July 2015 at 06:49, Vinod Koul
On 22 July 2015 at 09:33, Marek Vasut ma...@denx.de wrote:
On Wednesday, July 22, 2015 at 09:30:54 AM, Michal Suchanek wrote:
On 22 July 2015 at 06:49, Vinod Koul vinod.k...@intel.com wrote:
On Tue, Jul 21, 2015 at 10:14:11AM +0200, Michal Suchanek wrote:
Or alternatively we could publish
On Wednesday, July 22, 2015 at 10:38:14 AM, Michal Suchanek wrote:
On 22 July 2015 at 10:24, Marek Vasut ma...@denx.de wrote:
On Wednesday, July 22, 2015 at 10:18:04 AM, Michal Suchanek wrote:
On 22 July 2015 at 09:58, Marek Vasut ma...@denx.de wrote:
On Wednesday, July 22, 2015 at
On Wednesday, July 22, 2015 at 09:45:27 AM, Michal Suchanek wrote:
On 22 July 2015 at 09:33, Marek Vasut ma...@denx.de wrote:
On Wednesday, July 22, 2015 at 09:30:54 AM, Michal Suchanek wrote:
On 22 July 2015 at 06:49, Vinod Koul vinod.k...@intel.com wrote:
On Tue, Jul 21, 2015 at
On Wednesday, July 22, 2015 at 10:18:04 AM, Michal Suchanek wrote:
On 22 July 2015 at 09:58, Marek Vasut ma...@denx.de wrote:
On Wednesday, July 22, 2015 at 09:45:27 AM, Michal Suchanek wrote:
On 22 July 2015 at 09:33, Marek Vasut ma...@denx.de wrote:
On Wednesday, July 22, 2015 at
On 22 July 2015 at 10:24, Marek Vasut ma...@denx.de wrote:
On Wednesday, July 22, 2015 at 10:18:04 AM, Michal Suchanek wrote:
On 22 July 2015 at 09:58, Marek Vasut ma...@denx.de wrote:
On Wednesday, July 22, 2015 at 09:45:27 AM, Michal Suchanek wrote:
On 22 July 2015 at 09:33, Marek Vasut
On Tue, Jul 21, 2015 at 10:14:11AM +0200, Michal Suchanek wrote:
> > Or alternatively we could publish the limitations of the channel using
> > capabilities so SPI knows I have a dmaengine channel and it can transfer
> > max N
> > length transfers so would be able to break rather than guessing it
Hello,
On 21 July 2015 at 06:29, Vinod Koul wrote:
> On Sun, Jul 19, 2015 at 09:01:34PM +0200, Michal Suchanek wrote:
>> Hello,
>>
>> On 15 July 2015 at 17:59, Brian Norris wrote:
>> > Hi Michal,
>> >
>> > On Wed, Jul 15, 2015 at 01:52:27PM +0200, Marek Vasut wrote:
>> >> The problem is, if you
On Tue, Jul 21, 2015 at 10:14:11AM +0200, Michal Suchanek wrote:
Or alternatively we could publish the limitations of the channel using
capabilities so SPI knows I have a dmaengine channel and it can transfer
max N
length transfers so would be able to break rather than guessing it or
Hello,
On 21 July 2015 at 06:29, Vinod Koul vinod.k...@intel.com wrote:
On Sun, Jul 19, 2015 at 09:01:34PM +0200, Michal Suchanek wrote:
Hello,
On 15 July 2015 at 17:59, Brian Norris computersforpe...@gmail.com wrote:
Hi Michal,
On Wed, Jul 15, 2015 at 01:52:27PM +0200, Marek Vasut
On Sun, Jul 19, 2015 at 09:01:34PM +0200, Michal Suchanek wrote:
> Hello,
>
> On 15 July 2015 at 17:59, Brian Norris wrote:
> > Hi Michal,
> >
> > On Wed, Jul 15, 2015 at 01:52:27PM +0200, Marek Vasut wrote:
> >> The problem is, if you add a new DT binding, you'd have to support it
> >> forever,
On Sun, Jul 19, 2015 at 09:01:34PM +0200, Michal Suchanek wrote:
Hello,
On 15 July 2015 at 17:59, Brian Norris computersforpe...@gmail.com wrote:
Hi Michal,
On Wed, Jul 15, 2015 at 01:52:27PM +0200, Marek Vasut wrote:
The problem is, if you add a new DT binding, you'd have to support
Hello,
On 15 July 2015 at 17:59, Brian Norris wrote:
> Hi Michal,
>
> On Wed, Jul 15, 2015 at 01:52:27PM +0200, Marek Vasut wrote:
>> The problem is, if you add a new DT binding, you'd have to support it
>> forever, no matter how bad idea that binding turned out to be.
>
> Agreed, and a solid
Hello,
On 15 July 2015 at 17:59, Brian Norris computersforpe...@gmail.com wrote:
Hi Michal,
On Wed, Jul 15, 2015 at 01:52:27PM +0200, Marek Vasut wrote:
The problem is, if you add a new DT binding, you'd have to support it
forever, no matter how bad idea that binding turned out to be.
On Thursday, July 16, 2015 at 03:19:35 AM, Brian Norris wrote:
> On Wed, Jul 15, 2015 at 07:15:50PM +0200, Marek Vasut wrote:
> > On Wednesday, July 15, 2015 at 05:59:46 PM, Brian Norris wrote:
> > > 1. Fix up the SPI driver so that it knows how to break large SPI
> > > transfers up into smaller
On Wed, Jul 15, 2015 at 07:15:50PM +0200, Marek Vasut wrote:
> On Wednesday, July 15, 2015 at 05:59:46 PM, Brian Norris wrote:
> > 1. Fix up the SPI driver so that it knows how to break large SPI
> > transfers up into smaller segments that its constituent hardware (DMA
> > controllers, fast
On Wednesday, July 15, 2015 at 05:59:46 PM, Brian Norris wrote:
> Hi Michal,
Hi all,
> On Wed, Jul 15, 2015 at 01:52:27PM +0200, Marek Vasut wrote:
> > The problem is, if you add a new DT binding, you'd have to support it
> > forever, no matter how bad idea that binding turned out to be.
>
>
Hi Michal,
On Wed, Jul 15, 2015 at 01:52:27PM +0200, Marek Vasut wrote:
> The problem is, if you add a new DT binding, you'd have to support it
> forever, no matter how bad idea that binding turned out to be.
Agreed, and a solid NAK to this patch. I could have sworn I gave such a
response when
On Wednesday, July 15, 2015 at 11:45:07 AM, Michal Suchanek wrote:
> On 4 June 2015 at 19:15, Richard Cochran wrote:
> > On Thu, Jun 04, 2015 at 10:31:45AM +0200, Michal Suchanek wrote:
> >> You might want to try to run the bus at 60MHz or 80MHz and then the
> >> values would probably again be
On 4 June 2015 at 19:15, Richard Cochran wrote:
> On Thu, Jun 04, 2015 at 10:31:45AM +0200, Michal Suchanek wrote:
>> You might want to try to run the bus at 60MHz or 80MHz and then the
>> values would probably again be different.
>>
>> The first two values are set in DT so the logical place for
On Thursday, July 16, 2015 at 03:19:35 AM, Brian Norris wrote:
On Wed, Jul 15, 2015 at 07:15:50PM +0200, Marek Vasut wrote:
On Wednesday, July 15, 2015 at 05:59:46 PM, Brian Norris wrote:
1. Fix up the SPI driver so that it knows how to break large SPI
transfers up into smaller segments
On Wed, Jul 15, 2015 at 07:15:50PM +0200, Marek Vasut wrote:
On Wednesday, July 15, 2015 at 05:59:46 PM, Brian Norris wrote:
1. Fix up the SPI driver so that it knows how to break large SPI
transfers up into smaller segments that its constituent hardware (DMA
controllers, fast clocks, etc.)
On 4 June 2015 at 19:15, Richard Cochran richardcoch...@gmail.com wrote:
On Thu, Jun 04, 2015 at 10:31:45AM +0200, Michal Suchanek wrote:
You might want to try to run the bus at 60MHz or 80MHz and then the
values would probably again be different.
The first two values are set in DT so the
On Wednesday, July 15, 2015 at 05:59:46 PM, Brian Norris wrote:
Hi Michal,
Hi all,
On Wed, Jul 15, 2015 at 01:52:27PM +0200, Marek Vasut wrote:
The problem is, if you add a new DT binding, you'd have to support it
forever, no matter how bad idea that binding turned out to be.
Agreed,
On Wednesday, July 15, 2015 at 11:45:07 AM, Michal Suchanek wrote:
On 4 June 2015 at 19:15, Richard Cochran richardcoch...@gmail.com wrote:
On Thu, Jun 04, 2015 at 10:31:45AM +0200, Michal Suchanek wrote:
You might want to try to run the bus at 60MHz or 80MHz and then the
values would
Hi Michal,
On Wed, Jul 15, 2015 at 01:52:27PM +0200, Marek Vasut wrote:
The problem is, if you add a new DT binding, you'd have to support it
forever, no matter how bad idea that binding turned out to be.
Agreed, and a solid NAK to this patch. I could have sworn I gave such a
response when
On Thu, Jun 04, 2015 at 10:31:45AM +0200, Michal Suchanek wrote:
> You might want to try to run the bus at 60MHz or 80MHz and then the
> values would probably again be different.
>
> The first two values are set in DT so the logical place for setting
> the third is also in DT.
>
> Otherwise you
On Thursday, June 04, 2015 at 06:31:45 AM, Michal Suchanek wrote:
> On 4 June 2015 at 01:03, Marek Vasut wrote:
> > On Wednesday, June 03, 2015 at 11:26:41 PM, Michal Suchanek wrote:
> >> On sunxi the SPI controller currently does not have DMA support and
> >> fails any transfer larger than 63
On 4 June 2015 at 08:42, Geert Uytterhoeven wrote:
> On Wed, Jun 3, 2015 at 11:26 PM, Michal Suchanek wrote:
>> On sunxi the SPI controller currently does not have DMA support and fails
>> any transfer larger than 63 bytes.
>
> This is a driver limitation, not a hardware limitation.
>
>> On
On Wed, Jun 3, 2015 at 11:26 PM, Michal Suchanek wrote:
> On sunxi the SPI controller currently does not have DMA support and fails
> any transfer larger than 63 bytes.
This is a driver limitation, not a hardware limitation.
> On Exynos the pl330 DMA controller fails any transfer larger than
On Thu, Jun 04, 2015 at 10:31:45AM +0200, Michal Suchanek wrote:
You might want to try to run the bus at 60MHz or 80MHz and then the
values would probably again be different.
The first two values are set in DT so the logical place for setting
the third is also in DT.
Otherwise you would
On Thursday, June 04, 2015 at 06:31:45 AM, Michal Suchanek wrote:
On 4 June 2015 at 01:03, Marek Vasut ma...@denx.de wrote:
On Wednesday, June 03, 2015 at 11:26:41 PM, Michal Suchanek wrote:
On sunxi the SPI controller currently does not have DMA support and
fails any transfer larger than
On Wed, Jun 3, 2015 at 11:26 PM, Michal Suchanek hramr...@gmail.com wrote:
On sunxi the SPI controller currently does not have DMA support and fails
any transfer larger than 63 bytes.
This is a driver limitation, not a hardware limitation.
On Exynos the pl330 DMA controller fails any transfer
On 4 June 2015 at 08:42, Geert Uytterhoeven ge...@linux-m68k.org wrote:
On Wed, Jun 3, 2015 at 11:26 PM, Michal Suchanek hramr...@gmail.com wrote:
On sunxi the SPI controller currently does not have DMA support and fails
any transfer larger than 63 bytes.
This is a driver limitation, not a
On 4 June 2015 at 01:03, Marek Vasut wrote:
> On Wednesday, June 03, 2015 at 11:26:41 PM, Michal Suchanek wrote:
>> On sunxi the SPI controller currently does not have DMA support and fails
>> any transfer larger than 63 bytes.
>>
>> On Exynos the pl330 DMA controller fails any transfer larger
On Wednesday, June 03, 2015 at 11:26:41 PM, Michal Suchanek wrote:
> On sunxi the SPI controller currently does not have DMA support and fails
> any transfer larger than 63 bytes.
>
> On Exynos the pl330 DMA controller fails any transfer larger than 64kb
> when using slower speed like 40MHz and
On Wednesday, June 03, 2015 at 11:26:41 PM, Michal Suchanek wrote:
On sunxi the SPI controller currently does not have DMA support and fails
any transfer larger than 63 bytes.
On Exynos the pl330 DMA controller fails any transfer larger than 64kb
when using slower speed like 40MHz and any
On 4 June 2015 at 01:03, Marek Vasut ma...@denx.de wrote:
On Wednesday, June 03, 2015 at 11:26:41 PM, Michal Suchanek wrote:
On sunxi the SPI controller currently does not have DMA support and fails
any transfer larger than 63 bytes.
On Exynos the pl330 DMA controller fails any transfer
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