Re: [PATCH 1/1] perf, Add support for Xeon-Phi PMU

2012-09-25 Thread Cyrill Gorcunov
On Tue, Sep 25, 2012 at 10:45:02AM -0400, Vince Weaver wrote: > > On Tue, 25 Sep 2012, Cyrill Gorcunov wrote: > > > So guys, if understand all things correctly it's supposed to use some > > -1/-2 as initial @config value for unsupported events, right? Vince, > > may not it be easier to use bit

Re: [PATCH 1/1] perf, Add support for Xeon-Phi PMU

2012-09-25 Thread Vince Weaver
On Tue, 25 Sep 2012, Cyrill Gorcunov wrote: > So guys, if understand all things correctly it's supposed to use some > -1/-2 as initial @config value for unsupported events, right? Vince, > may not it be easier to use bit 19 as a flag of valid event and clear > it when you write to msr, thus we

Re: [PATCH 1/1] perf, Add support for Xeon-Phi PMU

2012-09-25 Thread Cyrill Gorcunov
On Tue, Sep 25, 2012 at 02:01:26PM +0200, Peter Zijlstra wrote: > On Tue, 2012-09-25 at 15:42 +0400, Cyrill Gorcunov wrote: > > > Guys, letme re-read this whole mail thread first since I have no clue > > what this remapping about ;) > > x86_setup_perfctr() / set_ext_hw_attr() have special

Re: [PATCH 1/1] perf, Add support for Xeon-Phi PMU

2012-09-25 Thread Cyrill Gorcunov
On Tue, Sep 25, 2012 at 04:22:29PM +0400, Cyrill Gorcunov wrote: > On Tue, Sep 25, 2012 at 02:05:58PM +0200, stephane eranian wrote: > > On Tue, Sep 25, 2012 at 2:01 PM, Peter Zijlstra > > wrote: > > > On Tue, 2012-09-25 at 15:42 +0400, Cyrill Gorcunov wrote: > > > > > >> Guys, letme re-read

Re: [PATCH 1/1] perf, Add support for Xeon-Phi PMU

2012-09-25 Thread Cyrill Gorcunov
On Tue, Sep 25, 2012 at 02:05:58PM +0200, stephane eranian wrote: > On Tue, Sep 25, 2012 at 2:01 PM, Peter Zijlstra > wrote: > > On Tue, 2012-09-25 at 15:42 +0400, Cyrill Gorcunov wrote: > > > >> Guys, letme re-read this whole mail thread first since I have no clue > >> what this remapping about

Re: [PATCH 1/1] perf, Add support for Xeon-Phi PMU

2012-09-25 Thread stephane eranian
On Tue, Sep 25, 2012 at 2:01 PM, Peter Zijlstra wrote: > On Tue, 2012-09-25 at 15:42 +0400, Cyrill Gorcunov wrote: > >> Guys, letme re-read this whole mail thread first since I have no clue >> what this remapping about ;) > > x86_setup_perfctr() / set_ext_hw_attr() have special purposed 0 and -1

Re: [PATCH 1/1] perf, Add support for Xeon-Phi PMU

2012-09-25 Thread Peter Zijlstra
On Tue, 2012-09-25 at 15:42 +0400, Cyrill Gorcunov wrote: > Guys, letme re-read this whole mail thread first since I have no clue > what this remapping about ;) x86_setup_perfctr() / set_ext_hw_attr() have special purposed 0 and -1 config values to mean -ENOENT and -EINVAL resp. This means

Re: [PATCH 1/1] perf, Add support for Xeon-Phi PMU

2012-09-25 Thread Cyrill Gorcunov
On Tue, Sep 25, 2012 at 03:42:25PM +0400, Cyrill Gorcunov wrote: > On Tue, Sep 25, 2012 at 01:32:38PM +0200, Peter Zijlstra wrote: > > On Thu, 2012-09-20 at 13:03 -0400, Vince Weaver wrote: > > > One additional complication: some of the cache events map to > > > event "0". This causes problems

Re: [PATCH 1/1] perf, Add support for Xeon-Phi PMU

2012-09-25 Thread Cyrill Gorcunov
On Tue, Sep 25, 2012 at 01:32:38PM +0200, Peter Zijlstra wrote: > On Thu, 2012-09-20 at 13:03 -0400, Vince Weaver wrote: > > One additional complication: some of the cache events map to > > event "0". This causes problems because the generic events code > > assumes "0" means not-available. I'm

Re: [PATCH 1/1] perf, Add support for Xeon-Phi PMU

2012-09-25 Thread Peter Zijlstra
On Thu, 2012-09-20 at 13:03 -0400, Vince Weaver wrote: > One additional complication: some of the cache events map to > event "0". This causes problems because the generic events code > assumes "0" means not-available. I'm not sure the best way to address > that problem. For all except P4 we

Re: [PATCH 1/1] perf, Add support for Xeon-Phi PMU

2012-09-25 Thread Peter Zijlstra
On Thu, 2012-09-20 at 13:03 -0400, Vince Weaver wrote: One additional complication: some of the cache events map to event 0. This causes problems because the generic events code assumes 0 means not-available. I'm not sure the best way to address that problem. For all except P4 we could

Re: [PATCH 1/1] perf, Add support for Xeon-Phi PMU

2012-09-25 Thread Cyrill Gorcunov
On Tue, Sep 25, 2012 at 01:32:38PM +0200, Peter Zijlstra wrote: On Thu, 2012-09-20 at 13:03 -0400, Vince Weaver wrote: One additional complication: some of the cache events map to event 0. This causes problems because the generic events code assumes 0 means not-available. I'm not sure

Re: [PATCH 1/1] perf, Add support for Xeon-Phi PMU

2012-09-25 Thread Cyrill Gorcunov
On Tue, Sep 25, 2012 at 03:42:25PM +0400, Cyrill Gorcunov wrote: On Tue, Sep 25, 2012 at 01:32:38PM +0200, Peter Zijlstra wrote: On Thu, 2012-09-20 at 13:03 -0400, Vince Weaver wrote: One additional complication: some of the cache events map to event 0. This causes problems because the

Re: [PATCH 1/1] perf, Add support for Xeon-Phi PMU

2012-09-25 Thread Peter Zijlstra
On Tue, 2012-09-25 at 15:42 +0400, Cyrill Gorcunov wrote: Guys, letme re-read this whole mail thread first since I have no clue what this remapping about ;) x86_setup_perfctr() / set_ext_hw_attr() have special purposed 0 and -1 config values to mean -ENOENT and -EINVAL resp. This means

Re: [PATCH 1/1] perf, Add support for Xeon-Phi PMU

2012-09-25 Thread stephane eranian
On Tue, Sep 25, 2012 at 2:01 PM, Peter Zijlstra a.p.zijls...@chello.nl wrote: On Tue, 2012-09-25 at 15:42 +0400, Cyrill Gorcunov wrote: Guys, letme re-read this whole mail thread first since I have no clue what this remapping about ;) x86_setup_perfctr() / set_ext_hw_attr() have special

Re: [PATCH 1/1] perf, Add support for Xeon-Phi PMU

2012-09-25 Thread Cyrill Gorcunov
On Tue, Sep 25, 2012 at 02:05:58PM +0200, stephane eranian wrote: On Tue, Sep 25, 2012 at 2:01 PM, Peter Zijlstra a.p.zijls...@chello.nl wrote: On Tue, 2012-09-25 at 15:42 +0400, Cyrill Gorcunov wrote: Guys, letme re-read this whole mail thread first since I have no clue what this

Re: [PATCH 1/1] perf, Add support for Xeon-Phi PMU

2012-09-25 Thread Cyrill Gorcunov
On Tue, Sep 25, 2012 at 04:22:29PM +0400, Cyrill Gorcunov wrote: On Tue, Sep 25, 2012 at 02:05:58PM +0200, stephane eranian wrote: On Tue, Sep 25, 2012 at 2:01 PM, Peter Zijlstra a.p.zijls...@chello.nl wrote: On Tue, 2012-09-25 at 15:42 +0400, Cyrill Gorcunov wrote: Guys, letme

Re: [PATCH 1/1] perf, Add support for Xeon-Phi PMU

2012-09-25 Thread Cyrill Gorcunov
On Tue, Sep 25, 2012 at 02:01:26PM +0200, Peter Zijlstra wrote: On Tue, 2012-09-25 at 15:42 +0400, Cyrill Gorcunov wrote: Guys, letme re-read this whole mail thread first since I have no clue what this remapping about ;) x86_setup_perfctr() / set_ext_hw_attr() have special purposed 0 and

Re: [PATCH 1/1] perf, Add support for Xeon-Phi PMU

2012-09-25 Thread Vince Weaver
On Tue, 25 Sep 2012, Cyrill Gorcunov wrote: So guys, if understand all things correctly it's supposed to use some -1/-2 as initial @config value for unsupported events, right? Vince, may not it be easier to use bit 19 as a flag of valid event and clear it when you write to msr, thus we will

Re: [PATCH 1/1] perf, Add support for Xeon-Phi PMU

2012-09-25 Thread Cyrill Gorcunov
On Tue, Sep 25, 2012 at 10:45:02AM -0400, Vince Weaver wrote: On Tue, 25 Sep 2012, Cyrill Gorcunov wrote: So guys, if understand all things correctly it's supposed to use some -1/-2 as initial @config value for unsupported events, right? Vince, may not it be easier to use bit 19 as a

RE: [PATCH 1/1] perf, Add support for Xeon-Phi PMU

2012-09-24 Thread Meadows, Lawrence F
:03 AM To: linux-kernel@vger.kernel.org Cc: Peter Zijlstra; Paul Mackerras; Ingo Molnar; Arnaldo Carvalho de Melo; eran...@gmail.com; Meadows, Lawrence F Subject: [PATCH 1/1] perf, Add support for Xeon-Phi PMU Hello Included below is a patch that adds perf support for the Xeon-Phi PMU

RE: [PATCH 1/1] perf, Add support for Xeon-Phi PMU

2012-09-24 Thread Meadows, Lawrence F
:03 AM To: linux-kernel@vger.kernel.org Cc: Peter Zijlstra; Paul Mackerras; Ingo Molnar; Arnaldo Carvalho de Melo; eran...@gmail.com; Meadows, Lawrence F Subject: [PATCH 1/1] perf, Add support for Xeon-Phi PMU Hello Included below is a patch that adds perf support for the Xeon-Phi PMU

[PATCH 1/1] perf, Add support for Xeon-Phi PMU

2012-09-20 Thread Vince Weaver
Hello Included below is a patch that adds perf support for the Xeon-Phi PMU, as documented in the "Intel Xeon Phi Coprocessor (codename: Knights Corner) Performance Monitoring Units" manual. Even though it is a co-processor, a Phi runs a full Linux environment and can support performance

[PATCH 1/1] perf, Add support for Xeon-Phi PMU

2012-09-20 Thread Vince Weaver
Hello Included below is a patch that adds perf support for the Xeon-Phi PMU, as documented in the Intel Xeon Phi Coprocessor (codename: Knights Corner) Performance Monitoring Units manual. Even though it is a co-processor, a Phi runs a full Linux environment and can support performance