Re: [PATCH 1/2] ARM: dts: Add TOPEET itop core board SCP package version
On 08/22/2016 10:45 PM, Chanwoo Choi wrote: Hi, 2016-08-22 17:28 GMT+09:00 Ayaka: Thank you 從我的 iPad 傳送 Marek Szyprowski 於 2016年8月22日 下午2:50 寫道: Dear Randy, On 2016-08-21 22:04, Randy Li wrote: The TOPEET itop is a samsung exnynos 4412 core board, which have two package versions. This patch add the support for SCP version. Currently supported are USB3503A HSIC, USB OTG, eMMC, RTC and PMIC. The future features are in the based board. Also MFC and watchdog have been enabled. Signed-off-by: Randy Li --- arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi | 434 1 file changed, 434 insertions(+) create mode 100644 arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi diff --git a/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi b/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi new file mode 100644 index 000..0860ee6 --- /dev/null +++ b/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi @@ -0,0 +1,434 @@ +/* + * TOPEET's Exynos4412 based itop board device tree source + * + * Copyright (c) 2016 SUMOMO Computer Association + *https://www.sumomo.mobi + *Randy Li + * + * Device tree source file for TOPEET iTop Exynos 4412 SCP package core + * board which is based on Samsung's Exynos4412 SoC. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include "exynos4412.dtsi" +#include +#include + +/ { +memory { +reg = <0x4000 0x4000>; +}; + +firmware@0203F000 { +compatible = "samsung,secure-firmware"; +reg = <0x0203F000 0x1000>; +}; + +display-timings { +native-mode = <>; +timing0: timing { +clock-frequency = <4750>; +hactive = <1024>; +vactive = <600>; +hfront-porch = <64>; +hback-porch = <16>; +hsync-len = <48>; +vback-porch = <64>; +vfront-porch = <16>; +vsync-len = <3>; +}; +}; + +fixed-rate-clocks { +xxti { +compatible = "samsung,clock-xxti"; +clock-frequency = <0>; +}; + +xusbxti { +compatible = "samsung,clock-xusbxti"; +clock-frequency = <2400>; +}; +}; + +usb-hub { +compatible = "smsc,usb3503a"; +reset-gpios = < 4 GPIO_ACTIVE_LOW>; +connect-gpios = < 3 GPIO_ACTIVE_HIGH>; +intn-gpios = < 3 GPIO_ACTIVE_HIGH>; +pinctrl-names = "default"; +pinctrl-0 = <_reset>; +}; +}; + + { +cpu0-supply = <_reg>; +}; + +_1 { +#address-cells = <1>; +#size-cells = <0>; +samsung,i2c-sda-delay = <100>; +samsung,i2c-max-bus-freq = <40>; +pinctrl-0 = <_bus>; +pinctrl-names = "default"; +status = "okay"; + +s5m8767_pmic@66 { +compatible = "samsung,s5m8767-pmic"; +reg = <0x66>; + +s5m8767,pmic-buck-default-dvs-idx = <3>; + +s5m8767,pmic-buck-dvs-gpios = < 5 GPIO_ACTIVE_HIGH>, + < 6 GPIO_ACTIVE_HIGH>, + < 7 GPIO_ACTIVE_HIGH>; + +s5m8767,pmic-buck-ds-gpios = < 5 GPIO_ACTIVE_HIGH>, +< 6 GPIO_ACTIVE_HIGH>, +< 7 GPIO_ACTIVE_HIGH>; + +/* VDD_ARM */ +s5m8767,pmic-buck2-dvs-voltage = <1356250>, <130>, + <1243750>, <1118750>, + <1068750>, <1012500>, + <956250>, <90>; +/* VDD_INT */ +s5m8767,pmic-buck3-dvs-voltage = <100>, <100>, + <925000>, <925000>, + <887500>, <887500>, + <85>, <85>; +/* VDD_G3D */ +s5m8767,pmic-buck4-dvs-voltage = <1081250>, <1081250>, + <1025000>, <95>, + <918750>, <90>, + <875000>, <831250>; + +regulators { +ldo1_reg: LDO1 { +regulator-name = "VDD_ALIVE"; +regulator-min-microvolt = <110>; +regulator-max-microvolt = <110>; +regulator-always-on; +regulator-boot-on; +op_mode = <1>; /* Normal Mode */ +}; + +/* SCP uses 1.5v, POP uses 1.2v */ +ldo2_reg: LDO2 { +regulator-name = "VDDQ_M12"; +regulator-min-microvolt = <150>; +regulator-max-microvolt = <150>; +regulator-always-on; +regulator-boot-on; +op_mode = <1>; /* Normal Mode */ +}; + +ldo3_reg: LDO3 { +regulator-name = "VDDIOAP_18"; +regulator-min-microvolt = <180>; +
Re: [PATCH 1/2] ARM: dts: Add TOPEET itop core board SCP package version
On 08/22/2016 10:45 PM, Chanwoo Choi wrote: Hi, 2016-08-22 17:28 GMT+09:00 Ayaka : Thank you 從我的 iPad 傳送 Marek Szyprowski 於 2016年8月22日 下午2:50 寫道: Dear Randy, On 2016-08-21 22:04, Randy Li wrote: The TOPEET itop is a samsung exnynos 4412 core board, which have two package versions. This patch add the support for SCP version. Currently supported are USB3503A HSIC, USB OTG, eMMC, RTC and PMIC. The future features are in the based board. Also MFC and watchdog have been enabled. Signed-off-by: Randy Li --- arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi | 434 1 file changed, 434 insertions(+) create mode 100644 arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi diff --git a/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi b/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi new file mode 100644 index 000..0860ee6 --- /dev/null +++ b/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi @@ -0,0 +1,434 @@ +/* + * TOPEET's Exynos4412 based itop board device tree source + * + * Copyright (c) 2016 SUMOMO Computer Association + *https://www.sumomo.mobi + *Randy Li + * + * Device tree source file for TOPEET iTop Exynos 4412 SCP package core + * board which is based on Samsung's Exynos4412 SoC. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include "exynos4412.dtsi" +#include +#include + +/ { +memory { +reg = <0x4000 0x4000>; +}; + +firmware@0203F000 { +compatible = "samsung,secure-firmware"; +reg = <0x0203F000 0x1000>; +}; + +display-timings { +native-mode = <>; +timing0: timing { +clock-frequency = <4750>; +hactive = <1024>; +vactive = <600>; +hfront-porch = <64>; +hback-porch = <16>; +hsync-len = <48>; +vback-porch = <64>; +vfront-porch = <16>; +vsync-len = <3>; +}; +}; + +fixed-rate-clocks { +xxti { +compatible = "samsung,clock-xxti"; +clock-frequency = <0>; +}; + +xusbxti { +compatible = "samsung,clock-xusbxti"; +clock-frequency = <2400>; +}; +}; + +usb-hub { +compatible = "smsc,usb3503a"; +reset-gpios = < 4 GPIO_ACTIVE_LOW>; +connect-gpios = < 3 GPIO_ACTIVE_HIGH>; +intn-gpios = < 3 GPIO_ACTIVE_HIGH>; +pinctrl-names = "default"; +pinctrl-0 = <_reset>; +}; +}; + + { +cpu0-supply = <_reg>; +}; + +_1 { +#address-cells = <1>; +#size-cells = <0>; +samsung,i2c-sda-delay = <100>; +samsung,i2c-max-bus-freq = <40>; +pinctrl-0 = <_bus>; +pinctrl-names = "default"; +status = "okay"; + +s5m8767_pmic@66 { +compatible = "samsung,s5m8767-pmic"; +reg = <0x66>; + +s5m8767,pmic-buck-default-dvs-idx = <3>; + +s5m8767,pmic-buck-dvs-gpios = < 5 GPIO_ACTIVE_HIGH>, + < 6 GPIO_ACTIVE_HIGH>, + < 7 GPIO_ACTIVE_HIGH>; + +s5m8767,pmic-buck-ds-gpios = < 5 GPIO_ACTIVE_HIGH>, +< 6 GPIO_ACTIVE_HIGH>, +< 7 GPIO_ACTIVE_HIGH>; + +/* VDD_ARM */ +s5m8767,pmic-buck2-dvs-voltage = <1356250>, <130>, + <1243750>, <1118750>, + <1068750>, <1012500>, + <956250>, <90>; +/* VDD_INT */ +s5m8767,pmic-buck3-dvs-voltage = <100>, <100>, + <925000>, <925000>, + <887500>, <887500>, + <85>, <85>; +/* VDD_G3D */ +s5m8767,pmic-buck4-dvs-voltage = <1081250>, <1081250>, + <1025000>, <95>, + <918750>, <90>, + <875000>, <831250>; + +regulators { +ldo1_reg: LDO1 { +regulator-name = "VDD_ALIVE"; +regulator-min-microvolt = <110>; +regulator-max-microvolt = <110>; +regulator-always-on; +regulator-boot-on; +op_mode = <1>; /* Normal Mode */ +}; + +/* SCP uses 1.5v, POP uses 1.2v */ +ldo2_reg: LDO2 { +regulator-name = "VDDQ_M12"; +regulator-min-microvolt = <150>; +regulator-max-microvolt = <150>; +regulator-always-on; +regulator-boot-on; +op_mode = <1>; /* Normal Mode */ +}; + +ldo3_reg: LDO3 { +regulator-name = "VDDIOAP_18"; +regulator-min-microvolt = <180>; +regulator-max-microvolt = <180>; +
Re: [PATCH 1/2] ARM: dts: Add TOPEET itop core board SCP package version
Hi, 2016-08-22 17:28 GMT+09:00 Ayaka: > > Thank you > 從我的 iPad 傳送 > >> Marek Szyprowski 於 2016年8月22日 下午2:50 寫道: >> >> Dear Randy, >> >> >>> On 2016-08-21 22:04, Randy Li wrote: >>> The TOPEET itop is a samsung exnynos 4412 core board, which have >>> two package versions. This patch add the support for SCP version. >>> >>> Currently supported are USB3503A HSIC, USB OTG, eMMC, RTC and PMIC. >>> The future features are in the based board. Also MFC and watchdog >>> have been enabled. >>> >>> Signed-off-by: Randy Li >>> --- >>> arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi | 434 >>> >>> 1 file changed, 434 insertions(+) >>> create mode 100644 arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi >>> >>> diff --git a/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi >>> b/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi >>> new file mode 100644 >>> index 000..0860ee6 >>> --- /dev/null >>> +++ b/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi >>> @@ -0,0 +1,434 @@ >>> +/* >>> + * TOPEET's Exynos4412 based itop board device tree source >>> + * >>> + * Copyright (c) 2016 SUMOMO Computer Association >>> + *https://www.sumomo.mobi >>> + *Randy Li >>> + * >>> + * Device tree source file for TOPEET iTop Exynos 4412 SCP package core >>> + * board which is based on Samsung's Exynos4412 SoC. >>> + * >>> + * This program is free software; you can redistribute it and/or modify >>> + * it under the terms of the GNU General Public License version 2 as >>> + * published by the Free Software Foundation. >>> +*/ >>> + >>> +#include "exynos4412.dtsi" >>> +#include >>> +#include >>> + >>> +/ { >>> +memory { >>> +reg = <0x4000 0x4000>; >>> +}; >>> + >>> +firmware@0203F000 { >>> +compatible = "samsung,secure-firmware"; >>> +reg = <0x0203F000 0x1000>; >>> +}; >>> + >>> +display-timings { >>> +native-mode = <>; >>> +timing0: timing { >>> +clock-frequency = <4750>; >>> +hactive = <1024>; >>> +vactive = <600>; >>> +hfront-porch = <64>; >>> +hback-porch = <16>; >>> +hsync-len = <48>; >>> +vback-porch = <64>; >>> +vfront-porch = <16>; >>> +vsync-len = <3>; >>> +}; >>> +}; >>> + >>> +fixed-rate-clocks { >>> +xxti { >>> +compatible = "samsung,clock-xxti"; >>> +clock-frequency = <0>; >>> +}; >>> + >>> +xusbxti { >>> +compatible = "samsung,clock-xusbxti"; >>> +clock-frequency = <2400>; >>> +}; >>> +}; >>> + >>> +usb-hub { >>> +compatible = "smsc,usb3503a"; >>> +reset-gpios = < 4 GPIO_ACTIVE_LOW>; >>> +connect-gpios = < 3 GPIO_ACTIVE_HIGH>; >>> +intn-gpios = < 3 GPIO_ACTIVE_HIGH>; >>> +pinctrl-names = "default"; >>> +pinctrl-0 = <_reset>; >>> +}; >>> +}; >>> + >>> + { >>> +cpu0-supply = <_reg>; >>> +}; >>> + >>> +_1 { >>> +#address-cells = <1>; >>> +#size-cells = <0>; >>> +samsung,i2c-sda-delay = <100>; >>> +samsung,i2c-max-bus-freq = <40>; >>> +pinctrl-0 = <_bus>; >>> +pinctrl-names = "default"; >>> +status = "okay"; >>> + >>> +s5m8767_pmic@66 { >>> +compatible = "samsung,s5m8767-pmic"; >>> +reg = <0x66>; >>> + >>> +s5m8767,pmic-buck-default-dvs-idx = <3>; >>> + >>> +s5m8767,pmic-buck-dvs-gpios = < 5 GPIO_ACTIVE_HIGH>, >>> + < 6 GPIO_ACTIVE_HIGH>, >>> + < 7 GPIO_ACTIVE_HIGH>; >>> + >>> +s5m8767,pmic-buck-ds-gpios = < 5 GPIO_ACTIVE_HIGH>, >>> +< 6 GPIO_ACTIVE_HIGH>, >>> +< 7 GPIO_ACTIVE_HIGH>; >>> + >>> +/* VDD_ARM */ >>> +s5m8767,pmic-buck2-dvs-voltage = <1356250>, <130>, >>> + <1243750>, <1118750>, >>> + <1068750>, <1012500>, >>> + <956250>, <90>; >>> +/* VDD_INT */ >>> +s5m8767,pmic-buck3-dvs-voltage = <100>, <100>, >>> + <925000>, <925000>, >>> + <887500>, <887500>, >>> + <85>, <85>; >>> +/* VDD_G3D */ >>> +s5m8767,pmic-buck4-dvs-voltage = <1081250>, <1081250>, >>> + <1025000>, <95>, >>> + <918750>, <90>, >>> + <875000>, <831250>; >>> + >>> +regulators { >>> +ldo1_reg: LDO1 { >>> +regulator-name = "VDD_ALIVE"; >>> +regulator-min-microvolt = <110>; >>> +regulator-max-microvolt = <110>; >>> +regulator-always-on; >>> +regulator-boot-on; >>> +op_mode = <1>; /* Normal Mode */ >>> +
Re: [PATCH 1/2] ARM: dts: Add TOPEET itop core board SCP package version
Hi, 2016-08-22 17:28 GMT+09:00 Ayaka : > > Thank you > 從我的 iPad 傳送 > >> Marek Szyprowski 於 2016年8月22日 下午2:50 寫道: >> >> Dear Randy, >> >> >>> On 2016-08-21 22:04, Randy Li wrote: >>> The TOPEET itop is a samsung exnynos 4412 core board, which have >>> two package versions. This patch add the support for SCP version. >>> >>> Currently supported are USB3503A HSIC, USB OTG, eMMC, RTC and PMIC. >>> The future features are in the based board. Also MFC and watchdog >>> have been enabled. >>> >>> Signed-off-by: Randy Li >>> --- >>> arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi | 434 >>> >>> 1 file changed, 434 insertions(+) >>> create mode 100644 arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi >>> >>> diff --git a/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi >>> b/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi >>> new file mode 100644 >>> index 000..0860ee6 >>> --- /dev/null >>> +++ b/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi >>> @@ -0,0 +1,434 @@ >>> +/* >>> + * TOPEET's Exynos4412 based itop board device tree source >>> + * >>> + * Copyright (c) 2016 SUMOMO Computer Association >>> + *https://www.sumomo.mobi >>> + *Randy Li >>> + * >>> + * Device tree source file for TOPEET iTop Exynos 4412 SCP package core >>> + * board which is based on Samsung's Exynos4412 SoC. >>> + * >>> + * This program is free software; you can redistribute it and/or modify >>> + * it under the terms of the GNU General Public License version 2 as >>> + * published by the Free Software Foundation. >>> +*/ >>> + >>> +#include "exynos4412.dtsi" >>> +#include >>> +#include >>> + >>> +/ { >>> +memory { >>> +reg = <0x4000 0x4000>; >>> +}; >>> + >>> +firmware@0203F000 { >>> +compatible = "samsung,secure-firmware"; >>> +reg = <0x0203F000 0x1000>; >>> +}; >>> + >>> +display-timings { >>> +native-mode = <>; >>> +timing0: timing { >>> +clock-frequency = <4750>; >>> +hactive = <1024>; >>> +vactive = <600>; >>> +hfront-porch = <64>; >>> +hback-porch = <16>; >>> +hsync-len = <48>; >>> +vback-porch = <64>; >>> +vfront-porch = <16>; >>> +vsync-len = <3>; >>> +}; >>> +}; >>> + >>> +fixed-rate-clocks { >>> +xxti { >>> +compatible = "samsung,clock-xxti"; >>> +clock-frequency = <0>; >>> +}; >>> + >>> +xusbxti { >>> +compatible = "samsung,clock-xusbxti"; >>> +clock-frequency = <2400>; >>> +}; >>> +}; >>> + >>> +usb-hub { >>> +compatible = "smsc,usb3503a"; >>> +reset-gpios = < 4 GPIO_ACTIVE_LOW>; >>> +connect-gpios = < 3 GPIO_ACTIVE_HIGH>; >>> +intn-gpios = < 3 GPIO_ACTIVE_HIGH>; >>> +pinctrl-names = "default"; >>> +pinctrl-0 = <_reset>; >>> +}; >>> +}; >>> + >>> + { >>> +cpu0-supply = <_reg>; >>> +}; >>> + >>> +_1 { >>> +#address-cells = <1>; >>> +#size-cells = <0>; >>> +samsung,i2c-sda-delay = <100>; >>> +samsung,i2c-max-bus-freq = <40>; >>> +pinctrl-0 = <_bus>; >>> +pinctrl-names = "default"; >>> +status = "okay"; >>> + >>> +s5m8767_pmic@66 { >>> +compatible = "samsung,s5m8767-pmic"; >>> +reg = <0x66>; >>> + >>> +s5m8767,pmic-buck-default-dvs-idx = <3>; >>> + >>> +s5m8767,pmic-buck-dvs-gpios = < 5 GPIO_ACTIVE_HIGH>, >>> + < 6 GPIO_ACTIVE_HIGH>, >>> + < 7 GPIO_ACTIVE_HIGH>; >>> + >>> +s5m8767,pmic-buck-ds-gpios = < 5 GPIO_ACTIVE_HIGH>, >>> +< 6 GPIO_ACTIVE_HIGH>, >>> +< 7 GPIO_ACTIVE_HIGH>; >>> + >>> +/* VDD_ARM */ >>> +s5m8767,pmic-buck2-dvs-voltage = <1356250>, <130>, >>> + <1243750>, <1118750>, >>> + <1068750>, <1012500>, >>> + <956250>, <90>; >>> +/* VDD_INT */ >>> +s5m8767,pmic-buck3-dvs-voltage = <100>, <100>, >>> + <925000>, <925000>, >>> + <887500>, <887500>, >>> + <85>, <85>; >>> +/* VDD_G3D */ >>> +s5m8767,pmic-buck4-dvs-voltage = <1081250>, <1081250>, >>> + <1025000>, <95>, >>> + <918750>, <90>, >>> + <875000>, <831250>; >>> + >>> +regulators { >>> +ldo1_reg: LDO1 { >>> +regulator-name = "VDD_ALIVE"; >>> +regulator-min-microvolt = <110>; >>> +regulator-max-microvolt = <110>; >>> +regulator-always-on; >>> +regulator-boot-on; >>> +op_mode = <1>; /* Normal Mode */ >>> +}; >>> + >>> +/* SCP uses 1.5v, POP uses 1.2v */ >>> +
[PATCH 1/2] ARM: dts: Add TOPEET itop core board SCP package version
The TOPEET itop is a samsung exnynos 4412 core board, which have two package versions. This patch add the support for SCP version. Currently supported are USB3503A HSIC, USB OTG, eMMC and PMIC. The future features are in the based board. Also MFC and watchdog have been enabled. The RTC clock source comes from PMIC, addtional clk driver is needed. Signed-off-by: Randy Li--- arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi | 472 1 file changed, 472 insertions(+) create mode 100644 arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi diff --git a/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi b/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi new file mode 100644 index 000..4fdf546 --- /dev/null +++ b/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi @@ -0,0 +1,472 @@ +/* + * TOPEET's Exynos4412 based itop board device tree source + * + * Copyright (c) 2016 SUMOMO Computer Association + * https://www.sumomo.mobi + * Randy Li + * + * Device tree source file for TOPEET iTop Exynos 4412 SCP package core + * board which is based on Samsung's Exynos4412 SoC. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include "exynos4412.dtsi" +#include "exynos4412-ppmu-common.dtsi" +#include "exynos-mfc-reserved-memory.dtsi" +#include +#include +#include + +/ { + memory { + reg = <0x4000 0x4000>; + }; + + firmware@0203F000 { + compatible = "samsung,secure-firmware"; + reg = <0x0203F000 0x1000>; + }; + + display-timings { + native-mode = <>; + timing0: timing { + clock-frequency = <4750>; + hactive = <1024>; + vactive = <600>; + hfront-porch = <64>; + hback-porch = <16>; + hsync-len = <48>; + vback-porch = <64>; + vfront-porch = <16>; + vsync-len = <3>; + }; + }; + + fixed-rate-clocks { + xxti { + compatible = "samsung,clock-xxti"; + clock-frequency = <0>; + }; + + xusbxti { + compatible = "samsung,clock-xusbxti"; + clock-frequency = <2400>; + }; + }; + + usb-hub { + compatible = "smsc,usb3503a"; + reset-gpios = < 4 GPIO_ACTIVE_LOW>; + connect-gpios = < 3 GPIO_ACTIVE_HIGH>; + intn-gpios = < 3 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <_reset>; + }; +}; + +_dmc { + devfreq-events = <_dmc0_3>, <_dmc1_3>; + vdd-supply = <_reg>; + status = "okay"; +}; + +_acp { +devfreq = <_dmc>; +status = "okay"; +}; + +_c2c { +devfreq = <_dmc>; +status = "okay"; +}; + +_leftbus { +devfreq-events = <_leftbus_3>, <_rightbus_3>; +vdd-supply = <_reg>; +status = "okay"; +}; + +_rightbus { +devfreq = <_leftbus>; +status = "okay"; +}; + +_fsys { +devfreq = <_leftbus>; +status = "okay"; +}; + +_peri { +devfreq = <_leftbus>; +status = "okay"; +}; + +_mfc { +devfreq = <_leftbus>; +status = "okay"; +}; + + { + cpu0-supply = <_reg>; +}; + +_1 { + #address-cells = <1>; + #size-cells = <0>; + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <40>; + pinctrl-0 = <_bus>; + pinctrl-names = "default"; + status = "okay"; + + s5m8767: s5m8767_pmic@66 { + compatible = "samsung,s5m8767-pmic"; + reg = <0x66>; + + s5m8767,pmic-buck-default-dvs-idx = <3>; + + s5m8767,pmic-buck-dvs-gpios = < 5 GPIO_ACTIVE_HIGH>, +< 6 GPIO_ACTIVE_HIGH>, +< 7 GPIO_ACTIVE_HIGH>; + + s5m8767,pmic-buck-ds-gpios = < 5 GPIO_ACTIVE_HIGH>, + < 6 GPIO_ACTIVE_HIGH>, + < 7 GPIO_ACTIVE_HIGH>; + + /* VDD_ARM */ + s5m8767,pmic-buck2-dvs-voltage = <1356250>, <130>, +<1243750>, <1118750>, +<1068750>, <1012500>, +<956250>, <90>; + /* VDD_INT */ + s5m8767,pmic-buck3-dvs-voltage = <100>, <100>, +<925000>, <925000>,
[PATCH 1/2] ARM: dts: Add TOPEET itop core board SCP package version
The TOPEET itop is a samsung exnynos 4412 core board, which have two package versions. This patch add the support for SCP version. Currently supported are USB3503A HSIC, USB OTG, eMMC and PMIC. The future features are in the based board. Also MFC and watchdog have been enabled. The RTC clock source comes from PMIC, addtional clk driver is needed. Signed-off-by: Randy Li --- arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi | 472 1 file changed, 472 insertions(+) create mode 100644 arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi diff --git a/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi b/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi new file mode 100644 index 000..4fdf546 --- /dev/null +++ b/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi @@ -0,0 +1,472 @@ +/* + * TOPEET's Exynos4412 based itop board device tree source + * + * Copyright (c) 2016 SUMOMO Computer Association + * https://www.sumomo.mobi + * Randy Li + * + * Device tree source file for TOPEET iTop Exynos 4412 SCP package core + * board which is based on Samsung's Exynos4412 SoC. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include "exynos4412.dtsi" +#include "exynos4412-ppmu-common.dtsi" +#include "exynos-mfc-reserved-memory.dtsi" +#include +#include +#include + +/ { + memory { + reg = <0x4000 0x4000>; + }; + + firmware@0203F000 { + compatible = "samsung,secure-firmware"; + reg = <0x0203F000 0x1000>; + }; + + display-timings { + native-mode = <>; + timing0: timing { + clock-frequency = <4750>; + hactive = <1024>; + vactive = <600>; + hfront-porch = <64>; + hback-porch = <16>; + hsync-len = <48>; + vback-porch = <64>; + vfront-porch = <16>; + vsync-len = <3>; + }; + }; + + fixed-rate-clocks { + xxti { + compatible = "samsung,clock-xxti"; + clock-frequency = <0>; + }; + + xusbxti { + compatible = "samsung,clock-xusbxti"; + clock-frequency = <2400>; + }; + }; + + usb-hub { + compatible = "smsc,usb3503a"; + reset-gpios = < 4 GPIO_ACTIVE_LOW>; + connect-gpios = < 3 GPIO_ACTIVE_HIGH>; + intn-gpios = < 3 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <_reset>; + }; +}; + +_dmc { + devfreq-events = <_dmc0_3>, <_dmc1_3>; + vdd-supply = <_reg>; + status = "okay"; +}; + +_acp { +devfreq = <_dmc>; +status = "okay"; +}; + +_c2c { +devfreq = <_dmc>; +status = "okay"; +}; + +_leftbus { +devfreq-events = <_leftbus_3>, <_rightbus_3>; +vdd-supply = <_reg>; +status = "okay"; +}; + +_rightbus { +devfreq = <_leftbus>; +status = "okay"; +}; + +_fsys { +devfreq = <_leftbus>; +status = "okay"; +}; + +_peri { +devfreq = <_leftbus>; +status = "okay"; +}; + +_mfc { +devfreq = <_leftbus>; +status = "okay"; +}; + + { + cpu0-supply = <_reg>; +}; + +_1 { + #address-cells = <1>; + #size-cells = <0>; + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <40>; + pinctrl-0 = <_bus>; + pinctrl-names = "default"; + status = "okay"; + + s5m8767: s5m8767_pmic@66 { + compatible = "samsung,s5m8767-pmic"; + reg = <0x66>; + + s5m8767,pmic-buck-default-dvs-idx = <3>; + + s5m8767,pmic-buck-dvs-gpios = < 5 GPIO_ACTIVE_HIGH>, +< 6 GPIO_ACTIVE_HIGH>, +< 7 GPIO_ACTIVE_HIGH>; + + s5m8767,pmic-buck-ds-gpios = < 5 GPIO_ACTIVE_HIGH>, + < 6 GPIO_ACTIVE_HIGH>, + < 7 GPIO_ACTIVE_HIGH>; + + /* VDD_ARM */ + s5m8767,pmic-buck2-dvs-voltage = <1356250>, <130>, +<1243750>, <1118750>, +<1068750>, <1012500>, +<956250>, <90>; + /* VDD_INT */ + s5m8767,pmic-buck3-dvs-voltage = <100>, <100>, +<925000>, <925000>, +
Re: [PATCH 1/2] ARM: dts: Add TOPEET itop core board SCP package version
Thank you 從我的 iPad 傳送 > Marek Szyprowski於 2016年8月22日 下午2:50 寫道: > > Dear Randy, > > >> On 2016-08-21 22:04, Randy Li wrote: >> The TOPEET itop is a samsung exnynos 4412 core board, which have >> two package versions. This patch add the support for SCP version. >> >> Currently supported are USB3503A HSIC, USB OTG, eMMC, RTC and PMIC. >> The future features are in the based board. Also MFC and watchdog >> have been enabled. >> >> Signed-off-by: Randy Li >> --- >> arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi | 434 >> >> 1 file changed, 434 insertions(+) >> create mode 100644 arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi >> >> diff --git a/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi >> b/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi >> new file mode 100644 >> index 000..0860ee6 >> --- /dev/null >> +++ b/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi >> @@ -0,0 +1,434 @@ >> +/* >> + * TOPEET's Exynos4412 based itop board device tree source >> + * >> + * Copyright (c) 2016 SUMOMO Computer Association >> + *https://www.sumomo.mobi >> + *Randy Li >> + * >> + * Device tree source file for TOPEET iTop Exynos 4412 SCP package core >> + * board which is based on Samsung's Exynos4412 SoC. >> + * >> + * This program is free software; you can redistribute it and/or modify >> + * it under the terms of the GNU General Public License version 2 as >> + * published by the Free Software Foundation. >> +*/ >> + >> +#include "exynos4412.dtsi" >> +#include >> +#include >> + >> +/ { >> +memory { >> +reg = <0x4000 0x4000>; >> +}; >> + >> +firmware@0203F000 { >> +compatible = "samsung,secure-firmware"; >> +reg = <0x0203F000 0x1000>; >> +}; >> + >> +display-timings { >> +native-mode = <>; >> +timing0: timing { >> +clock-frequency = <4750>; >> +hactive = <1024>; >> +vactive = <600>; >> +hfront-porch = <64>; >> +hback-porch = <16>; >> +hsync-len = <48>; >> +vback-porch = <64>; >> +vfront-porch = <16>; >> +vsync-len = <3>; >> +}; >> +}; >> + >> +fixed-rate-clocks { >> +xxti { >> +compatible = "samsung,clock-xxti"; >> +clock-frequency = <0>; >> +}; >> + >> +xusbxti { >> +compatible = "samsung,clock-xusbxti"; >> +clock-frequency = <2400>; >> +}; >> +}; >> + >> +usb-hub { >> +compatible = "smsc,usb3503a"; >> +reset-gpios = < 4 GPIO_ACTIVE_LOW>; >> +connect-gpios = < 3 GPIO_ACTIVE_HIGH>; >> +intn-gpios = < 3 GPIO_ACTIVE_HIGH>; >> +pinctrl-names = "default"; >> +pinctrl-0 = <_reset>; >> +}; >> +}; >> + >> + { >> +cpu0-supply = <_reg>; >> +}; >> + >> +_1 { >> +#address-cells = <1>; >> +#size-cells = <0>; >> +samsung,i2c-sda-delay = <100>; >> +samsung,i2c-max-bus-freq = <40>; >> +pinctrl-0 = <_bus>; >> +pinctrl-names = "default"; >> +status = "okay"; >> + >> +s5m8767_pmic@66 { >> +compatible = "samsung,s5m8767-pmic"; >> +reg = <0x66>; >> + >> +s5m8767,pmic-buck-default-dvs-idx = <3>; >> + >> +s5m8767,pmic-buck-dvs-gpios = < 5 GPIO_ACTIVE_HIGH>, >> + < 6 GPIO_ACTIVE_HIGH>, >> + < 7 GPIO_ACTIVE_HIGH>; >> + >> +s5m8767,pmic-buck-ds-gpios = < 5 GPIO_ACTIVE_HIGH>, >> +< 6 GPIO_ACTIVE_HIGH>, >> +< 7 GPIO_ACTIVE_HIGH>; >> + >> +/* VDD_ARM */ >> +s5m8767,pmic-buck2-dvs-voltage = <1356250>, <130>, >> + <1243750>, <1118750>, >> + <1068750>, <1012500>, >> + <956250>, <90>; >> +/* VDD_INT */ >> +s5m8767,pmic-buck3-dvs-voltage = <100>, <100>, >> + <925000>, <925000>, >> + <887500>, <887500>, >> + <85>, <85>; >> +/* VDD_G3D */ >> +s5m8767,pmic-buck4-dvs-voltage = <1081250>, <1081250>, >> + <1025000>, <95>, >> + <918750>, <90>, >> + <875000>, <831250>; >> + >> +regulators { >> +ldo1_reg: LDO1 { >> +regulator-name = "VDD_ALIVE"; >> +regulator-min-microvolt = <110>; >> +regulator-max-microvolt = <110>; >> +regulator-always-on; >> +regulator-boot-on; >> +op_mode = <1>; /* Normal Mode */ >> +}; >> + >> +/* SCP uses 1.5v, POP uses 1.2v */ >> +ldo2_reg: LDO2 { >> +regulator-name = "VDDQ_M12"; >> +regulator-min-microvolt =
Re: [PATCH 1/2] ARM: dts: Add TOPEET itop core board SCP package version
Thank you 從我的 iPad 傳送 > Marek Szyprowski 於 2016年8月22日 下午2:50 寫道: > > Dear Randy, > > >> On 2016-08-21 22:04, Randy Li wrote: >> The TOPEET itop is a samsung exnynos 4412 core board, which have >> two package versions. This patch add the support for SCP version. >> >> Currently supported are USB3503A HSIC, USB OTG, eMMC, RTC and PMIC. >> The future features are in the based board. Also MFC and watchdog >> have been enabled. >> >> Signed-off-by: Randy Li >> --- >> arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi | 434 >> >> 1 file changed, 434 insertions(+) >> create mode 100644 arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi >> >> diff --git a/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi >> b/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi >> new file mode 100644 >> index 000..0860ee6 >> --- /dev/null >> +++ b/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi >> @@ -0,0 +1,434 @@ >> +/* >> + * TOPEET's Exynos4412 based itop board device tree source >> + * >> + * Copyright (c) 2016 SUMOMO Computer Association >> + *https://www.sumomo.mobi >> + *Randy Li >> + * >> + * Device tree source file for TOPEET iTop Exynos 4412 SCP package core >> + * board which is based on Samsung's Exynos4412 SoC. >> + * >> + * This program is free software; you can redistribute it and/or modify >> + * it under the terms of the GNU General Public License version 2 as >> + * published by the Free Software Foundation. >> +*/ >> + >> +#include "exynos4412.dtsi" >> +#include >> +#include >> + >> +/ { >> +memory { >> +reg = <0x4000 0x4000>; >> +}; >> + >> +firmware@0203F000 { >> +compatible = "samsung,secure-firmware"; >> +reg = <0x0203F000 0x1000>; >> +}; >> + >> +display-timings { >> +native-mode = <>; >> +timing0: timing { >> +clock-frequency = <4750>; >> +hactive = <1024>; >> +vactive = <600>; >> +hfront-porch = <64>; >> +hback-porch = <16>; >> +hsync-len = <48>; >> +vback-porch = <64>; >> +vfront-porch = <16>; >> +vsync-len = <3>; >> +}; >> +}; >> + >> +fixed-rate-clocks { >> +xxti { >> +compatible = "samsung,clock-xxti"; >> +clock-frequency = <0>; >> +}; >> + >> +xusbxti { >> +compatible = "samsung,clock-xusbxti"; >> +clock-frequency = <2400>; >> +}; >> +}; >> + >> +usb-hub { >> +compatible = "smsc,usb3503a"; >> +reset-gpios = < 4 GPIO_ACTIVE_LOW>; >> +connect-gpios = < 3 GPIO_ACTIVE_HIGH>; >> +intn-gpios = < 3 GPIO_ACTIVE_HIGH>; >> +pinctrl-names = "default"; >> +pinctrl-0 = <_reset>; >> +}; >> +}; >> + >> + { >> +cpu0-supply = <_reg>; >> +}; >> + >> +_1 { >> +#address-cells = <1>; >> +#size-cells = <0>; >> +samsung,i2c-sda-delay = <100>; >> +samsung,i2c-max-bus-freq = <40>; >> +pinctrl-0 = <_bus>; >> +pinctrl-names = "default"; >> +status = "okay"; >> + >> +s5m8767_pmic@66 { >> +compatible = "samsung,s5m8767-pmic"; >> +reg = <0x66>; >> + >> +s5m8767,pmic-buck-default-dvs-idx = <3>; >> + >> +s5m8767,pmic-buck-dvs-gpios = < 5 GPIO_ACTIVE_HIGH>, >> + < 6 GPIO_ACTIVE_HIGH>, >> + < 7 GPIO_ACTIVE_HIGH>; >> + >> +s5m8767,pmic-buck-ds-gpios = < 5 GPIO_ACTIVE_HIGH>, >> +< 6 GPIO_ACTIVE_HIGH>, >> +< 7 GPIO_ACTIVE_HIGH>; >> + >> +/* VDD_ARM */ >> +s5m8767,pmic-buck2-dvs-voltage = <1356250>, <130>, >> + <1243750>, <1118750>, >> + <1068750>, <1012500>, >> + <956250>, <90>; >> +/* VDD_INT */ >> +s5m8767,pmic-buck3-dvs-voltage = <100>, <100>, >> + <925000>, <925000>, >> + <887500>, <887500>, >> + <85>, <85>; >> +/* VDD_G3D */ >> +s5m8767,pmic-buck4-dvs-voltage = <1081250>, <1081250>, >> + <1025000>, <95>, >> + <918750>, <90>, >> + <875000>, <831250>; >> + >> +regulators { >> +ldo1_reg: LDO1 { >> +regulator-name = "VDD_ALIVE"; >> +regulator-min-microvolt = <110>; >> +regulator-max-microvolt = <110>; >> +regulator-always-on; >> +regulator-boot-on; >> +op_mode = <1>; /* Normal Mode */ >> +}; >> + >> +/* SCP uses 1.5v, POP uses 1.2v */ >> +ldo2_reg: LDO2 { >> +regulator-name = "VDDQ_M12"; >> +regulator-min-microvolt = <150>; >> +regulator-max-microvolt =
Re: [PATCH 1/2] ARM: dts: Add TOPEET itop core board SCP package version
Dear Randy, On 2016-08-21 22:04, Randy Li wrote: The TOPEET itop is a samsung exnynos 4412 core board, which have two package versions. This patch add the support for SCP version. Currently supported are USB3503A HSIC, USB OTG, eMMC, RTC and PMIC. The future features are in the based board. Also MFC and watchdog have been enabled. Signed-off-by: Randy Li--- arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi | 434 1 file changed, 434 insertions(+) create mode 100644 arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi diff --git a/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi b/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi new file mode 100644 index 000..0860ee6 --- /dev/null +++ b/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi @@ -0,0 +1,434 @@ +/* + * TOPEET's Exynos4412 based itop board device tree source + * + * Copyright (c) 2016 SUMOMO Computer Association + * https://www.sumomo.mobi + * Randy Li + * + * Device tree source file for TOPEET iTop Exynos 4412 SCP package core + * board which is based on Samsung's Exynos4412 SoC. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include "exynos4412.dtsi" +#include +#include + +/ { + memory { + reg = <0x4000 0x4000>; + }; + + firmware@0203F000 { + compatible = "samsung,secure-firmware"; + reg = <0x0203F000 0x1000>; + }; + + display-timings { + native-mode = <>; + timing0: timing { + clock-frequency = <4750>; + hactive = <1024>; + vactive = <600>; + hfront-porch = <64>; + hback-porch = <16>; + hsync-len = <48>; + vback-porch = <64>; + vfront-porch = <16>; + vsync-len = <3>; + }; + }; + + fixed-rate-clocks { + xxti { + compatible = "samsung,clock-xxti"; + clock-frequency = <0>; + }; + + xusbxti { + compatible = "samsung,clock-xusbxti"; + clock-frequency = <2400>; + }; + }; + + usb-hub { + compatible = "smsc,usb3503a"; + reset-gpios = < 4 GPIO_ACTIVE_LOW>; + connect-gpios = < 3 GPIO_ACTIVE_HIGH>; + intn-gpios = < 3 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <_reset>; + }; +}; + + { + cpu0-supply = <_reg>; +}; + +_1 { + #address-cells = <1>; + #size-cells = <0>; + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <40>; + pinctrl-0 = <_bus>; + pinctrl-names = "default"; + status = "okay"; + + s5m8767_pmic@66 { + compatible = "samsung,s5m8767-pmic"; + reg = <0x66>; + + s5m8767,pmic-buck-default-dvs-idx = <3>; + + s5m8767,pmic-buck-dvs-gpios = < 5 GPIO_ACTIVE_HIGH>, +< 6 GPIO_ACTIVE_HIGH>, +< 7 GPIO_ACTIVE_HIGH>; + + s5m8767,pmic-buck-ds-gpios = < 5 GPIO_ACTIVE_HIGH>, + < 6 GPIO_ACTIVE_HIGH>, + < 7 GPIO_ACTIVE_HIGH>; + + /* VDD_ARM */ + s5m8767,pmic-buck2-dvs-voltage = <1356250>, <130>, +<1243750>, <1118750>, +<1068750>, <1012500>, +<956250>, <90>; + /* VDD_INT */ + s5m8767,pmic-buck3-dvs-voltage = <100>, <100>, +<925000>, <925000>, +<887500>, <887500>, +<85>, <85>; + /* VDD_G3D */ + s5m8767,pmic-buck4-dvs-voltage = <1081250>, <1081250>, +<1025000>, <95>, +<918750>, <90>, +<875000>, <831250>; + + regulators { + ldo1_reg: LDO1 { + regulator-name = "VDD_ALIVE"; + regulator-min-microvolt = <110>; + regulator-max-microvolt = <110>; + regulator-always-on; +
Re: [PATCH 1/2] ARM: dts: Add TOPEET itop core board SCP package version
Dear Randy, On 2016-08-21 22:04, Randy Li wrote: The TOPEET itop is a samsung exnynos 4412 core board, which have two package versions. This patch add the support for SCP version. Currently supported are USB3503A HSIC, USB OTG, eMMC, RTC and PMIC. The future features are in the based board. Also MFC and watchdog have been enabled. Signed-off-by: Randy Li --- arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi | 434 1 file changed, 434 insertions(+) create mode 100644 arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi diff --git a/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi b/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi new file mode 100644 index 000..0860ee6 --- /dev/null +++ b/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi @@ -0,0 +1,434 @@ +/* + * TOPEET's Exynos4412 based itop board device tree source + * + * Copyright (c) 2016 SUMOMO Computer Association + * https://www.sumomo.mobi + * Randy Li + * + * Device tree source file for TOPEET iTop Exynos 4412 SCP package core + * board which is based on Samsung's Exynos4412 SoC. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include "exynos4412.dtsi" +#include +#include + +/ { + memory { + reg = <0x4000 0x4000>; + }; + + firmware@0203F000 { + compatible = "samsung,secure-firmware"; + reg = <0x0203F000 0x1000>; + }; + + display-timings { + native-mode = <>; + timing0: timing { + clock-frequency = <4750>; + hactive = <1024>; + vactive = <600>; + hfront-porch = <64>; + hback-porch = <16>; + hsync-len = <48>; + vback-porch = <64>; + vfront-porch = <16>; + vsync-len = <3>; + }; + }; + + fixed-rate-clocks { + xxti { + compatible = "samsung,clock-xxti"; + clock-frequency = <0>; + }; + + xusbxti { + compatible = "samsung,clock-xusbxti"; + clock-frequency = <2400>; + }; + }; + + usb-hub { + compatible = "smsc,usb3503a"; + reset-gpios = < 4 GPIO_ACTIVE_LOW>; + connect-gpios = < 3 GPIO_ACTIVE_HIGH>; + intn-gpios = < 3 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <_reset>; + }; +}; + + { + cpu0-supply = <_reg>; +}; + +_1 { + #address-cells = <1>; + #size-cells = <0>; + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <40>; + pinctrl-0 = <_bus>; + pinctrl-names = "default"; + status = "okay"; + + s5m8767_pmic@66 { + compatible = "samsung,s5m8767-pmic"; + reg = <0x66>; + + s5m8767,pmic-buck-default-dvs-idx = <3>; + + s5m8767,pmic-buck-dvs-gpios = < 5 GPIO_ACTIVE_HIGH>, +< 6 GPIO_ACTIVE_HIGH>, +< 7 GPIO_ACTIVE_HIGH>; + + s5m8767,pmic-buck-ds-gpios = < 5 GPIO_ACTIVE_HIGH>, + < 6 GPIO_ACTIVE_HIGH>, + < 7 GPIO_ACTIVE_HIGH>; + + /* VDD_ARM */ + s5m8767,pmic-buck2-dvs-voltage = <1356250>, <130>, +<1243750>, <1118750>, +<1068750>, <1012500>, +<956250>, <90>; + /* VDD_INT */ + s5m8767,pmic-buck3-dvs-voltage = <100>, <100>, +<925000>, <925000>, +<887500>, <887500>, +<85>, <85>; + /* VDD_G3D */ + s5m8767,pmic-buck4-dvs-voltage = <1081250>, <1081250>, +<1025000>, <95>, +<918750>, <90>, +<875000>, <831250>; + + regulators { + ldo1_reg: LDO1 { + regulator-name = "VDD_ALIVE"; + regulator-min-microvolt = <110>; + regulator-max-microvolt = <110>; + regulator-always-on; +
[PATCH 1/2] ARM: dts: Add TOPEET itop core board SCP package version
The TOPEET itop is a samsung exnynos 4412 core board, which have two package versions. This patch add the support for SCP version. Currently supported are USB3503A HSIC, USB OTG, eMMC, RTC and PMIC. The future features are in the based board. Also MFC and watchdog have been enabled. Signed-off-by: Randy Li--- arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi | 434 1 file changed, 434 insertions(+) create mode 100644 arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi diff --git a/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi b/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi new file mode 100644 index 000..0860ee6 --- /dev/null +++ b/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi @@ -0,0 +1,434 @@ +/* + * TOPEET's Exynos4412 based itop board device tree source + * + * Copyright (c) 2016 SUMOMO Computer Association + * https://www.sumomo.mobi + * Randy Li + * + * Device tree source file for TOPEET iTop Exynos 4412 SCP package core + * board which is based on Samsung's Exynos4412 SoC. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include "exynos4412.dtsi" +#include +#include + +/ { + memory { + reg = <0x4000 0x4000>; + }; + + firmware@0203F000 { + compatible = "samsung,secure-firmware"; + reg = <0x0203F000 0x1000>; + }; + + display-timings { + native-mode = <>; + timing0: timing { + clock-frequency = <4750>; + hactive = <1024>; + vactive = <600>; + hfront-porch = <64>; + hback-porch = <16>; + hsync-len = <48>; + vback-porch = <64>; + vfront-porch = <16>; + vsync-len = <3>; + }; + }; + + fixed-rate-clocks { + xxti { + compatible = "samsung,clock-xxti"; + clock-frequency = <0>; + }; + + xusbxti { + compatible = "samsung,clock-xusbxti"; + clock-frequency = <2400>; + }; + }; + + usb-hub { + compatible = "smsc,usb3503a"; + reset-gpios = < 4 GPIO_ACTIVE_LOW>; + connect-gpios = < 3 GPIO_ACTIVE_HIGH>; + intn-gpios = < 3 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <_reset>; + }; +}; + + { + cpu0-supply = <_reg>; +}; + +_1 { + #address-cells = <1>; + #size-cells = <0>; + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <40>; + pinctrl-0 = <_bus>; + pinctrl-names = "default"; + status = "okay"; + + s5m8767_pmic@66 { + compatible = "samsung,s5m8767-pmic"; + reg = <0x66>; + + s5m8767,pmic-buck-default-dvs-idx = <3>; + + s5m8767,pmic-buck-dvs-gpios = < 5 GPIO_ACTIVE_HIGH>, +< 6 GPIO_ACTIVE_HIGH>, +< 7 GPIO_ACTIVE_HIGH>; + + s5m8767,pmic-buck-ds-gpios = < 5 GPIO_ACTIVE_HIGH>, + < 6 GPIO_ACTIVE_HIGH>, + < 7 GPIO_ACTIVE_HIGH>; + + /* VDD_ARM */ + s5m8767,pmic-buck2-dvs-voltage = <1356250>, <130>, +<1243750>, <1118750>, +<1068750>, <1012500>, +<956250>, <90>; + /* VDD_INT */ + s5m8767,pmic-buck3-dvs-voltage = <100>, <100>, +<925000>, <925000>, +<887500>, <887500>, +<85>, <85>; + /* VDD_G3D */ + s5m8767,pmic-buck4-dvs-voltage = <1081250>, <1081250>, +<1025000>, <95>, +<918750>, <90>, +<875000>, <831250>; + + regulators { + ldo1_reg: LDO1 { + regulator-name = "VDD_ALIVE"; + regulator-min-microvolt = <110>; + regulator-max-microvolt = <110>; + regulator-always-on; + regulator-boot-on; +
[PATCH 1/2] ARM: dts: Add TOPEET itop core board SCP package version
The TOPEET itop is a samsung exnynos 4412 core board, which have two package versions. This patch add the support for SCP version. Currently supported are USB3503A HSIC, USB OTG, eMMC, RTC and PMIC. The future features are in the based board. Also MFC and watchdog have been enabled. Signed-off-by: Randy Li --- arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi | 434 1 file changed, 434 insertions(+) create mode 100644 arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi diff --git a/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi b/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi new file mode 100644 index 000..0860ee6 --- /dev/null +++ b/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi @@ -0,0 +1,434 @@ +/* + * TOPEET's Exynos4412 based itop board device tree source + * + * Copyright (c) 2016 SUMOMO Computer Association + * https://www.sumomo.mobi + * Randy Li + * + * Device tree source file for TOPEET iTop Exynos 4412 SCP package core + * board which is based on Samsung's Exynos4412 SoC. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include "exynos4412.dtsi" +#include +#include + +/ { + memory { + reg = <0x4000 0x4000>; + }; + + firmware@0203F000 { + compatible = "samsung,secure-firmware"; + reg = <0x0203F000 0x1000>; + }; + + display-timings { + native-mode = <>; + timing0: timing { + clock-frequency = <4750>; + hactive = <1024>; + vactive = <600>; + hfront-porch = <64>; + hback-porch = <16>; + hsync-len = <48>; + vback-porch = <64>; + vfront-porch = <16>; + vsync-len = <3>; + }; + }; + + fixed-rate-clocks { + xxti { + compatible = "samsung,clock-xxti"; + clock-frequency = <0>; + }; + + xusbxti { + compatible = "samsung,clock-xusbxti"; + clock-frequency = <2400>; + }; + }; + + usb-hub { + compatible = "smsc,usb3503a"; + reset-gpios = < 4 GPIO_ACTIVE_LOW>; + connect-gpios = < 3 GPIO_ACTIVE_HIGH>; + intn-gpios = < 3 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <_reset>; + }; +}; + + { + cpu0-supply = <_reg>; +}; + +_1 { + #address-cells = <1>; + #size-cells = <0>; + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <40>; + pinctrl-0 = <_bus>; + pinctrl-names = "default"; + status = "okay"; + + s5m8767_pmic@66 { + compatible = "samsung,s5m8767-pmic"; + reg = <0x66>; + + s5m8767,pmic-buck-default-dvs-idx = <3>; + + s5m8767,pmic-buck-dvs-gpios = < 5 GPIO_ACTIVE_HIGH>, +< 6 GPIO_ACTIVE_HIGH>, +< 7 GPIO_ACTIVE_HIGH>; + + s5m8767,pmic-buck-ds-gpios = < 5 GPIO_ACTIVE_HIGH>, + < 6 GPIO_ACTIVE_HIGH>, + < 7 GPIO_ACTIVE_HIGH>; + + /* VDD_ARM */ + s5m8767,pmic-buck2-dvs-voltage = <1356250>, <130>, +<1243750>, <1118750>, +<1068750>, <1012500>, +<956250>, <90>; + /* VDD_INT */ + s5m8767,pmic-buck3-dvs-voltage = <100>, <100>, +<925000>, <925000>, +<887500>, <887500>, +<85>, <85>; + /* VDD_G3D */ + s5m8767,pmic-buck4-dvs-voltage = <1081250>, <1081250>, +<1025000>, <95>, +<918750>, <90>, +<875000>, <831250>; + + regulators { + ldo1_reg: LDO1 { + regulator-name = "VDD_ALIVE"; + regulator-min-microvolt = <110>; + regulator-max-microvolt = <110>; + regulator-always-on; + regulator-boot-on; + op_mode = <1>; /*