Hi Thomas,
On 26 February 2016 at 11:26, Thomas Gleixner wrote:
> On Thu, 25 Feb 2016, Joachim Eastwood wrote:
>> +static void lpc18xx_gpio_pint_handler(struct irq_desc *desc)
>> +{
>> + struct lpc18xx_gpio_pint_chip *pint = irq_desc_get_handler_data(desc);
>> +
Hi Thomas,
On 26 February 2016 at 11:26, Thomas Gleixner wrote:
> On Thu, 25 Feb 2016, Joachim Eastwood wrote:
>> +static void lpc18xx_gpio_pint_handler(struct irq_desc *desc)
>> +{
>> + struct lpc18xx_gpio_pint_chip *pint = irq_desc_get_handler_data(desc);
>> + unsigned int irq =
On Thu, 25 Feb 2016, Joachim Eastwood wrote:
> +static void lpc18xx_gpio_pint_handler(struct irq_desc *desc)
> +{
> + struct lpc18xx_gpio_pint_chip *pint = irq_desc_get_handler_data(desc);
> + unsigned int irq = irq_desc_get_irq(desc);
> + int irq_no, i;
> +
> + /* Find the
On Thu, 25 Feb 2016, Joachim Eastwood wrote:
> +static void lpc18xx_gpio_pint_handler(struct irq_desc *desc)
> +{
> + struct lpc18xx_gpio_pint_chip *pint = irq_desc_get_handler_data(desc);
> + unsigned int irq = irq_desc_get_irq(desc);
> + int irq_no, i;
> +
> + /* Find the
NXP LPC18xx has an interrupt controller called 'gpio pin interrupt'
or just PINT. The PINT can handle up to 8 interrupts and these have
a one-to-one relationship with the main interrupt controller (NVIC).
The interrupts on PINT can be either level or edge trigger and
supports any polarity.
NXP LPC18xx has an interrupt controller called 'gpio pin interrupt'
or just PINT. The PINT can handle up to 8 interrupts and these have
a one-to-one relationship with the main interrupt controller (NVIC).
The interrupts on PINT can be either level or edge trigger and
supports any polarity.
6 matches
Mail list logo