Re: [PATCH 1/4] clocksource: mmp: add mmp timer driver

2015-02-02 Thread Chao Xie
>From: Mark Rutland [mailto:mark.rutl...@arm.com] >Sent: 2015年2月2日 18:35 >To: Chao Xie >Cc: daniel.lezc...@linaro.org; t...@linutronix.de; haojian.zhu...@linaro.org; >linux-kernel@vger.kernel.org; devicet...@vger.kernel.org >Subject: Re: [PATCH 1/4] clocksource: mmp: ad

Re: [PATCH 1/4] clocksource: mmp: add mmp timer driver

2015-02-02 Thread Mark Rutland
On Mon, Feb 02, 2015 at 08:31:36AM +, Chao Xie wrote: > From: Chao Xie > > MMP timer is attached to APB bus, It has the following > limitation. > 1. When get count of timer counter, it need some delay >to get a stable count. > 2. When set match register, it need disable the counter >

[PATCH 1/4] clocksource: mmp: add mmp timer driver

2015-02-02 Thread Chao Xie
From: Chao Xie MMP timer is attached to APB bus, It has the following limitation. 1. When get count of timer counter, it need some delay to get a stable count. 2. When set match register, it need disable the counter first, and enable it after set the match register. The disabling need

Re: [PATCH 1/4] clocksource: mmp: add mmp timer driver

2015-02-02 Thread Chao Xie
From: Mark Rutland [mailto:mark.rutl...@arm.com] Sent: 2015年2月2日 18:35 To: Chao Xie Cc: daniel.lezc...@linaro.org; t...@linutronix.de; haojian.zhu...@linaro.org; linux-kernel@vger.kernel.org; devicet...@vger.kernel.org Subject: Re: [PATCH 1/4] clocksource: mmp: add mmp timer driver On Mon

Re: [PATCH 1/4] clocksource: mmp: add mmp timer driver

2015-02-02 Thread Mark Rutland
On Mon, Feb 02, 2015 at 08:31:36AM +, Chao Xie wrote: From: Chao Xie chao@marvell.com MMP timer is attached to APB bus, It has the following limitation. 1. When get count of timer counter, it need some delay to get a stable count. 2. When set match register, it need disable the

[PATCH 1/4] clocksource: mmp: add mmp timer driver

2015-02-02 Thread Chao Xie
From: Chao Xie chao@marvell.com MMP timer is attached to APB bus, It has the following limitation. 1. When get count of timer counter, it need some delay to get a stable count. 2. When set match register, it need disable the counter first, and enable it after set the match register.