Re: [PATCH 1/4] drm/vc4: Adjust modes in DSI to work around the integer PLL divider.

2017-05-12 Thread Noralf Trønnes
Den 12.05.2017 01.56, skrev Eric Anholt: BCM2835's PLLD_DSI1 divider doesn't give us many choices for our pixel clocks, so to support panels on the Raspberry Pi we need to set a higher pixel clock rate than requested and adjust the mode we program to extend out the HFP so that the refresh rate

Re: [PATCH 1/4] drm/vc4: Adjust modes in DSI to work around the integer PLL divider.

2017-05-12 Thread Noralf Trønnes
Den 12.05.2017 01.56, skrev Eric Anholt: BCM2835's PLLD_DSI1 divider doesn't give us many choices for our pixel clocks, so to support panels on the Raspberry Pi we need to set a higher pixel clock rate than requested and adjust the mode we program to extend out the HFP so that the refresh rate

Re: [PATCH 1/4] drm/vc4: Adjust modes in DSI to work around the integer PLL divider.

2017-05-12 Thread Daniel Vetter
On Thu, May 11, 2017 at 04:56:22PM -0700, Eric Anholt wrote: > BCM2835's PLLD_DSI1 divider doesn't give us many choices for our pixel > clocks, so to support panels on the Raspberry Pi we need to set a > higher pixel clock rate than requested and adjust the mode we program > to extend out the HFP

Re: [PATCH 1/4] drm/vc4: Adjust modes in DSI to work around the integer PLL divider.

2017-05-12 Thread Daniel Vetter
On Thu, May 11, 2017 at 04:56:22PM -0700, Eric Anholt wrote: > BCM2835's PLLD_DSI1 divider doesn't give us many choices for our pixel > clocks, so to support panels on the Raspberry Pi we need to set a > higher pixel clock rate than requested and adjust the mode we program > to extend out the HFP

[PATCH 1/4] drm/vc4: Adjust modes in DSI to work around the integer PLL divider.

2017-05-11 Thread Eric Anholt
BCM2835's PLLD_DSI1 divider doesn't give us many choices for our pixel clocks, so to support panels on the Raspberry Pi we need to set a higher pixel clock rate than requested and adjust the mode we program to extend out the HFP so that the refresh rate matches. Signed-off-by: Eric Anholt

[PATCH 1/4] drm/vc4: Adjust modes in DSI to work around the integer PLL divider.

2017-05-11 Thread Eric Anholt
BCM2835's PLLD_DSI1 divider doesn't give us many choices for our pixel clocks, so to support panels on the Raspberry Pi we need to set a higher pixel clock rate than requested and adjust the mode we program to extend out the HFP so that the refresh rate matches. Signed-off-by: Eric Anholt ---