[PATCH 1/5] arm64: dts: hisi: add mbigen nodes for the hip07 SoC

[Wei.Xu]

From: Wei Xu 

Add mbigen nodes for the hip07 SoC those will be used
for the SAS, XGE and PCIe host controllers.

Signed-off-by: Wei Xu 
---
 arch/arm64/boot/dts/hisilicon/hip07.dtsi | 61 
 1 file changed, 61 insertions(+)

diff --git a/arch/arm64/boot/dts/hisilicon/hip07.dtsi 
b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
index 5144eb1..6077def 100644
--- a/arch/arm64/boot/dts/hisilicon/hip07.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
@@ -1014,6 +1014,34 @@
compatible = "hisilicon,mbigen-v2";
reg = <0x0 0xa008 0x0 0x1>;
 
+   mbigen_pcie2_a: intc_pcie2_a {
+   msi-parent = <_its_dsa_a 0x40087>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   num-pins = <10>;
+   };
+
+   mbigen_sas1: intc_sas1 {
+   msi-parent = <_its_dsa_a 0x4>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   num-pins = <128>;
+   };
+
+   mbigen_sas2: intc_sas2 {
+   msi-parent = <_its_dsa_a 0x40040>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   num-pins = <128>;
+   };
+
+   mbigen_smmu_pcie: intc_smmu_pcie {
+   msi-parent = <_its_dsa_a 0x40b0c>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   num-pins = <3>;
+   };
+
mbigen_usb: intc_usb {
msi-parent = <_its_dsa_a 0x40080>;
interrupt-controller;
@@ -1022,6 +1050,39 @@
};
};
 
+   p0_mbigen_dsa_a: interrupt-controller@c008 {
+   compatible = "hisilicon,mbigen-v2";
+   reg = <0x0 0xc008 0x0 0x1>;
+
+   mbigen_dsaf0: intc_dsaf0 {
+   msi-parent = <_its_dsa_a 0x40800>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   num-pins = <409>;
+   };
+
+   mbigen_dsa_roce: intc-roce {
+   msi-parent = <_its_dsa_a 0x40B1E>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   num-pins = <34>;
+   };
+
+   mbigen_sas0: intc-sas0 {
+   msi-parent = <_its_dsa_a 0x40900>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   num-pins = <128>;
+   };
+
+   mbigen_smmu_dsa: intc_smmu_dsa {
+   msi-parent = <_its_dsa_a 0x40b20>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   num-pins = <3>;
+   };
+   };
+
soc {
compatible = "simple-bus";
#address-cells = <2>;
-- 
1.9.1

[PATCH 1/5] arm64: dts: hisi: add mbigen nodes for the hip07 SoC

[Wei.Xu]

From: Wei Xu 

Add mbigen nodes for the hip07 SoC those will be used
for the SAS, XGE and PCIe host controllers.

Signed-off-by: Wei Xu 
---
 arch/arm64/boot/dts/hisilicon/hip07.dtsi | 61 
 1 file changed, 61 insertions(+)

diff --git a/arch/arm64/boot/dts/hisilicon/hip07.dtsi 
b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
index 5144eb1..6077def 100644
--- a/arch/arm64/boot/dts/hisilicon/hip07.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
@@ -1014,6 +1014,34 @@
compatible = "hisilicon,mbigen-v2";
reg = <0x0 0xa008 0x0 0x1>;
 
+   mbigen_pcie2_a: intc_pcie2_a {
+   msi-parent = <_its_dsa_a 0x40087>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   num-pins = <10>;
+   };
+
+   mbigen_sas1: intc_sas1 {
+   msi-parent = <_its_dsa_a 0x4>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   num-pins = <128>;
+   };
+
+   mbigen_sas2: intc_sas2 {
+   msi-parent = <_its_dsa_a 0x40040>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   num-pins = <128>;
+   };
+
+   mbigen_smmu_pcie: intc_smmu_pcie {
+   msi-parent = <_its_dsa_a 0x40b0c>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   num-pins = <3>;
+   };
+
mbigen_usb: intc_usb {
msi-parent = <_its_dsa_a 0x40080>;
interrupt-controller;
@@ -1022,6 +1050,39 @@
};
};
 
+   p0_mbigen_dsa_a: interrupt-controller@c008 {
+   compatible = "hisilicon,mbigen-v2";
+   reg = <0x0 0xc008 0x0 0x1>;
+
+   mbigen_dsaf0: intc_dsaf0 {
+   msi-parent = <_its_dsa_a 0x40800>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   num-pins = <409>;
+   };
+
+   mbigen_dsa_roce: intc-roce {
+   msi-parent = <_its_dsa_a 0x40B1E>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   num-pins = <34>;
+   };
+
+   mbigen_sas0: intc-sas0 {
+   msi-parent = <_its_dsa_a 0x40900>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   num-pins = <128>;
+   };
+
+   mbigen_smmu_dsa: intc_smmu_dsa {
+   msi-parent = <_its_dsa_a 0x40b20>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   num-pins = <3>;
+   };
+   };
+
soc {
compatible = "simple-bus";
#address-cells = <2>;
-- 
1.9.1