Re: [PATCH 1/5] i2c: sunxi: Add Allwinner A1X i2c driver
Hi Tomasz, On Sat, May 25, 2013 at 02:06:51PM +0200, Tomasz Figa wrote: > Hi Maxime, > > Overall the driver looks good, just some minor nitpicks inline. Thanks for the review! I'll fix the comments you had and send a new version. Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/5] i2c: sunxi: Add Allwinner A1X i2c driver
Hi Maxime,
Overall the driver looks good, just some minor nitpicks inline.
On Friday 03 of May 2013 11:17:45 Maxime Ripard wrote:
> This patch implements a basic driver for the I2C host driver found on
> the Allwinner A10, A13 and A31 SoCs.
>
> Notable missing feature is 10-bit addressing.
>
> Signed-off-by: Maxime Ripard
> ---
> .../devicetree/bindings/i2c/i2c-sunxi.txt | 19 +
> drivers/i2c/busses/Kconfig | 10 +
> drivers/i2c/busses/Makefile| 1 +
> drivers/i2c/busses/i2c-sunxi.c | 441
> + 4 files changed, 471 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/i2c/i2c-sunxi.txt
> create mode 100644 drivers/i2c/busses/i2c-sunxi.c
>
> diff --git a/Documentation/devicetree/bindings/i2c/i2c-sunxi.txt
> b/Documentation/devicetree/bindings/i2c/i2c-sunxi.txt new file mode
> 100644
> index 000..40c16d0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/i2c/i2c-sunxi.txt
> @@ -0,0 +1,19 @@
> +Allwinner SoC I2C controller
> +
> +Required properties:
> +- compatible : Should be "allwinner,sun4i-i2c".
> +- reg: Should contain register location and length.
> +- interrupts: Should contain interrupt.
> +- clocks : The parent clock feeding the I2C controller.
> +
> +Recommended properties:
> +- clock-frequency : desired I2C bus clock frequency in Hz.
> +
> +Example:
> +i2c0: i2c@01c2ac00 {
> + compatible = "allwinner,sun4i-i2c";
> + reg = <0x01c2ac00 0x400>;
> + interrupts = <7>;
> + clocks = <_gates 0>;
> + clock-frequency = <10>;
> +};
> diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
> index adfee98..327a49b 100644
> --- a/drivers/i2c/busses/Kconfig
> +++ b/drivers/i2c/busses/Kconfig
> @@ -706,6 +706,16 @@ config I2C_STU300
> This driver can also be built as a module. If so, the module
> will be called i2c-stu300.
>
> +config I2C_SUNXI
> + tristate "Allwinner A1X I2C controller"
> + depends on ARCH_SUNXI
> + help
> + If you say yes to this option, support will be included for the
> + I2C controller embedded in Allwinner A1X SoCs.
> +
> + This driver can also be built as a module. If so, the module
> + will be called i2c-sunxi.
> +
> config I2C_TEGRA
> tristate "NVIDIA Tegra internal I2C controller"
> depends on ARCH_TEGRA
> diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
> index 8f4fc23..7225818 100644
> --- a/drivers/i2c/busses/Makefile
> +++ b/drivers/i2c/busses/Makefile
> @@ -69,6 +69,7 @@ obj-$(CONFIG_I2C_SH_MOBILE) += i2c-sh_mobile.o
> obj-$(CONFIG_I2C_SIMTEC) += i2c-simtec.o
> obj-$(CONFIG_I2C_SIRF) += i2c-sirf.o
> obj-$(CONFIG_I2C_STU300) += i2c-stu300.o
> +obj-$(CONFIG_I2C_SUNXI) += i2c-sunxi.o
> obj-$(CONFIG_I2C_TEGRA) += i2c-tegra.o
> obj-$(CONFIG_I2C_VERSATILE) += i2c-versatile.o
> obj-$(CONFIG_I2C_OCTEON) += i2c-octeon.o
> diff --git a/drivers/i2c/busses/i2c-sunxi.c
> b/drivers/i2c/busses/i2c-sunxi.c new file mode 100644
> index 000..f9f8bd4
> --- /dev/null
> +++ b/drivers/i2c/busses/i2c-sunxi.c
> @@ -0,0 +1,441 @@
> +/*
> + * Allwinner A1X SoCs i2c controller driver.
> + *
> + * Copyright (C) 2013 Maxime Ripard
> + *
> + * Maxime Ripard
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2. This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#define SUNXI_I2C_ADDR_REG (0x00)
> +#define SUNXI_I2C_ADDR_ADDR(v) ((v & 0x7f) << 1)
> +#define SUNXI_I2C_XADDR_REG (0x04)
> +#define SUNXI_I2C_DATA_REG (0x08)
> +#define SUNXI_I2C_CNTR_REG (0x0c)
> +#define SUNXI_I2C_CNTR_ASSERT_ACKBIT(2)
> +#define SUNXI_I2C_CNTR_INT_FLAG BIT(3)
> +#define SUNXI_I2C_CNTR_MASTER_STOP BIT(4)
> +#define SUNXI_I2C_CNTR_MASTER_START BIT(5)
> +#define SUNXI_I2C_CNTR_BUS_ENABLEBIT(6)
> +#define SUNXI_I2C_CNTR_INT_ENABLEBIT(7)
> +#define SUNXI_I2C_STA_REG(0x10)
> +#define SUNXI_I2C_STA_BUS_ERROR (0x00)
> +#define SUNXI_I2C_STA_START (0x08)
> +#define SUNXI_I2C_STA_START_REPEAT (0x10)
> +#define SUNXI_I2C_STA_MASTER_WADDR_ACK (0x18)
> +#define SUNXI_I2C_STA_MASTER_WADDR_NAK (0x20)
> +#define SUNXI_I2C_STA_MASTER_DATA_SENT_ACK (0x28)
> +#define SUNXI_I2C_STA_MASTER_DATA_SENT_NAK (0x30)
> +#define SUNXI_I2C_STA_MASTER_RADDR_ACK (0x40)
> +#define SUNXI_I2C_STA_MASTER_RADDR_NAK (0x48)
> +#define SUNXI_I2C_STA_MASTER_DATA_RECV_ACK (0x50)
> +#define SUNXI_I2C_STA_MASTER_DATA_RECV_NAK (0x58)
> +#define
Re: [PATCH 1/5] i2c: sunxi: Add Allwinner A1X i2c driver
Hi Maxime,
Overall the driver looks good, just some minor nitpicks inline.
On Friday 03 of May 2013 11:17:45 Maxime Ripard wrote:
This patch implements a basic driver for the I2C host driver found on
the Allwinner A10, A13 and A31 SoCs.
Notable missing feature is 10-bit addressing.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
.../devicetree/bindings/i2c/i2c-sunxi.txt | 19 +
drivers/i2c/busses/Kconfig | 10 +
drivers/i2c/busses/Makefile| 1 +
drivers/i2c/busses/i2c-sunxi.c | 441
+ 4 files changed, 471 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i2c/i2c-sunxi.txt
create mode 100644 drivers/i2c/busses/i2c-sunxi.c
diff --git a/Documentation/devicetree/bindings/i2c/i2c-sunxi.txt
b/Documentation/devicetree/bindings/i2c/i2c-sunxi.txt new file mode
100644
index 000..40c16d0
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/i2c-sunxi.txt
@@ -0,0 +1,19 @@
+Allwinner SoC I2C controller
+
+Required properties:
+- compatible : Should be allwinner,sun4i-i2c.
+- reg: Should contain register location and length.
+- interrupts: Should contain interrupt.
+- clocks : The parent clock feeding the I2C controller.
+
+Recommended properties:
+- clock-frequency : desired I2C bus clock frequency in Hz.
+
+Example:
+i2c0: i2c@01c2ac00 {
+ compatible = allwinner,sun4i-i2c;
+ reg = 0x01c2ac00 0x400;
+ interrupts = 7;
+ clocks = apb1_gates 0;
+ clock-frequency = 10;
+};
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index adfee98..327a49b 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -706,6 +706,16 @@ config I2C_STU300
This driver can also be built as a module. If so, the module
will be called i2c-stu300.
+config I2C_SUNXI
+ tristate Allwinner A1X I2C controller
+ depends on ARCH_SUNXI
+ help
+ If you say yes to this option, support will be included for the
+ I2C controller embedded in Allwinner A1X SoCs.
+
+ This driver can also be built as a module. If so, the module
+ will be called i2c-sunxi.
+
config I2C_TEGRA
tristate NVIDIA Tegra internal I2C controller
depends on ARCH_TEGRA
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 8f4fc23..7225818 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -69,6 +69,7 @@ obj-$(CONFIG_I2C_SH_MOBILE) += i2c-sh_mobile.o
obj-$(CONFIG_I2C_SIMTEC) += i2c-simtec.o
obj-$(CONFIG_I2C_SIRF) += i2c-sirf.o
obj-$(CONFIG_I2C_STU300) += i2c-stu300.o
+obj-$(CONFIG_I2C_SUNXI) += i2c-sunxi.o
obj-$(CONFIG_I2C_TEGRA) += i2c-tegra.o
obj-$(CONFIG_I2C_VERSATILE) += i2c-versatile.o
obj-$(CONFIG_I2C_OCTEON) += i2c-octeon.o
diff --git a/drivers/i2c/busses/i2c-sunxi.c
b/drivers/i2c/busses/i2c-sunxi.c new file mode 100644
index 000..f9f8bd4
--- /dev/null
+++ b/drivers/i2c/busses/i2c-sunxi.c
@@ -0,0 +1,441 @@
+/*
+ * Allwinner A1X SoCs i2c controller driver.
+ *
+ * Copyright (C) 2013 Maxime Ripard
+ *
+ * Maxime Ripard maxime.rip...@free-electrons.com
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed as is without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include linux/clk.h
+#include linux/completion.h
+#include linux/err.h
+#include linux/i2c.h
+#include linux/interrupt.h
+#include linux/io.h
+#include linux/module.h
+#include linux/of_address.h
+#include linux/of_irq.h
+#include linux/platform_device.h
+
+#define SUNXI_I2C_ADDR_REG (0x00)
+#define SUNXI_I2C_ADDR_ADDR(v) ((v 0x7f) 1)
+#define SUNXI_I2C_XADDR_REG (0x04)
+#define SUNXI_I2C_DATA_REG (0x08)
+#define SUNXI_I2C_CNTR_REG (0x0c)
+#define SUNXI_I2C_CNTR_ASSERT_ACKBIT(2)
+#define SUNXI_I2C_CNTR_INT_FLAG BIT(3)
+#define SUNXI_I2C_CNTR_MASTER_STOP BIT(4)
+#define SUNXI_I2C_CNTR_MASTER_START BIT(5)
+#define SUNXI_I2C_CNTR_BUS_ENABLEBIT(6)
+#define SUNXI_I2C_CNTR_INT_ENABLEBIT(7)
+#define SUNXI_I2C_STA_REG(0x10)
+#define SUNXI_I2C_STA_BUS_ERROR (0x00)
+#define SUNXI_I2C_STA_START (0x08)
+#define SUNXI_I2C_STA_START_REPEAT (0x10)
+#define SUNXI_I2C_STA_MASTER_WADDR_ACK (0x18)
+#define SUNXI_I2C_STA_MASTER_WADDR_NAK (0x20)
+#define SUNXI_I2C_STA_MASTER_DATA_SENT_ACK (0x28)
+#define SUNXI_I2C_STA_MASTER_DATA_SENT_NAK (0x30)
+#define SUNXI_I2C_STA_MASTER_RADDR_ACK (0x40)
+#define SUNXI_I2C_STA_MASTER_RADDR_NAK (0x48)
+#define SUNXI_I2C_STA_MASTER_DATA_RECV_ACK (0x50)
+#define
Re: [PATCH 1/5] i2c: sunxi: Add Allwinner A1X i2c driver
Hi Tomasz, On Sat, May 25, 2013 at 02:06:51PM +0200, Tomasz Figa wrote: Hi Maxime, Overall the driver looks good, just some minor nitpicks inline. Thanks for the review! I'll fix the comments you had and send a new version. Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/5] i2c: sunxi: Add Allwinner A1X i2c driver
This patch implements a basic driver for the I2C host driver found on
the Allwinner A10, A13 and A31 SoCs.
Notable missing feature is 10-bit addressing.
Signed-off-by: Maxime Ripard
---
.../devicetree/bindings/i2c/i2c-sunxi.txt | 19 +
drivers/i2c/busses/Kconfig | 10 +
drivers/i2c/busses/Makefile| 1 +
drivers/i2c/busses/i2c-sunxi.c | 441 +
4 files changed, 471 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i2c/i2c-sunxi.txt
create mode 100644 drivers/i2c/busses/i2c-sunxi.c
diff --git a/Documentation/devicetree/bindings/i2c/i2c-sunxi.txt
b/Documentation/devicetree/bindings/i2c/i2c-sunxi.txt
new file mode 100644
index 000..40c16d0
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/i2c-sunxi.txt
@@ -0,0 +1,19 @@
+Allwinner SoC I2C controller
+
+Required properties:
+- compatible : Should be "allwinner,sun4i-i2c".
+- reg: Should contain register location and length.
+- interrupts: Should contain interrupt.
+- clocks : The parent clock feeding the I2C controller.
+
+Recommended properties:
+- clock-frequency : desired I2C bus clock frequency in Hz.
+
+Example:
+i2c0: i2c@01c2ac00 {
+ compatible = "allwinner,sun4i-i2c";
+ reg = <0x01c2ac00 0x400>;
+ interrupts = <7>;
+ clocks = <_gates 0>;
+ clock-frequency = <10>;
+};
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index adfee98..327a49b 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -706,6 +706,16 @@ config I2C_STU300
This driver can also be built as a module. If so, the module
will be called i2c-stu300.
+config I2C_SUNXI
+ tristate "Allwinner A1X I2C controller"
+ depends on ARCH_SUNXI
+ help
+ If you say yes to this option, support will be included for the
+ I2C controller embedded in Allwinner A1X SoCs.
+
+ This driver can also be built as a module. If so, the module
+ will be called i2c-sunxi.
+
config I2C_TEGRA
tristate "NVIDIA Tegra internal I2C controller"
depends on ARCH_TEGRA
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 8f4fc23..7225818 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -69,6 +69,7 @@ obj-$(CONFIG_I2C_SH_MOBILE) += i2c-sh_mobile.o
obj-$(CONFIG_I2C_SIMTEC) += i2c-simtec.o
obj-$(CONFIG_I2C_SIRF) += i2c-sirf.o
obj-$(CONFIG_I2C_STU300) += i2c-stu300.o
+obj-$(CONFIG_I2C_SUNXI)+= i2c-sunxi.o
obj-$(CONFIG_I2C_TEGRA)+= i2c-tegra.o
obj-$(CONFIG_I2C_VERSATILE)+= i2c-versatile.o
obj-$(CONFIG_I2C_OCTEON) += i2c-octeon.o
diff --git a/drivers/i2c/busses/i2c-sunxi.c b/drivers/i2c/busses/i2c-sunxi.c
new file mode 100644
index 000..f9f8bd4
--- /dev/null
+++ b/drivers/i2c/busses/i2c-sunxi.c
@@ -0,0 +1,441 @@
+/*
+ * Allwinner A1X SoCs i2c controller driver.
+ *
+ * Copyright (C) 2013 Maxime Ripard
+ *
+ * Maxime Ripard
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define SUNXI_I2C_ADDR_REG (0x00)
+#define SUNXI_I2C_ADDR_ADDR(v) ((v & 0x7f) << 1)
+#define SUNXI_I2C_XADDR_REG(0x04)
+#define SUNXI_I2C_DATA_REG (0x08)
+#define SUNXI_I2C_CNTR_REG (0x0c)
+#define SUNXI_I2C_CNTR_ASSERT_ACK BIT(2)
+#define SUNXI_I2C_CNTR_INT_FLAGBIT(3)
+#define SUNXI_I2C_CNTR_MASTER_STOP BIT(4)
+#define SUNXI_I2C_CNTR_MASTER_STARTBIT(5)
+#define SUNXI_I2C_CNTR_BUS_ENABLE BIT(6)
+#define SUNXI_I2C_CNTR_INT_ENABLE BIT(7)
+#define SUNXI_I2C_STA_REG (0x10)
+#define SUNXI_I2C_STA_BUS_ERROR(0x00)
+#define SUNXI_I2C_STA_START(0x08)
+#define SUNXI_I2C_STA_START_REPEAT (0x10)
+#define SUNXI_I2C_STA_MASTER_WADDR_ACK (0x18)
+#define SUNXI_I2C_STA_MASTER_WADDR_NAK (0x20)
+#define SUNXI_I2C_STA_MASTER_DATA_SENT_ACK (0x28)
+#define SUNXI_I2C_STA_MASTER_DATA_SENT_NAK (0x30)
+#define SUNXI_I2C_STA_MASTER_RADDR_ACK (0x40)
+#define SUNXI_I2C_STA_MASTER_RADDR_NAK (0x48)
+#define SUNXI_I2C_STA_MASTER_DATA_RECV_ACK (0x50)
+#define SUNXI_I2C_STA_MASTER_DATA_RECV_NAK (0x58)
+#define SUNXI_I2C_CCR_REG (0x14)
+#define SUNXI_I2C_CCR_DIV_N(val) (val & 0x3)
+#define SUNXI_I2C_CCR_DIV_M(val) ((val & 0xf) << 3)
+#define SUNXI_I2C_SRST_REG (0x18)
+#define SUNXI_I2C_SRST_RESET BIT(0)
+#define SUNXI_I2C_EFR_REG (0x1c)
+#define SUNXI_I2C_LCR_REG
[PATCH 1/5] i2c: sunxi: Add Allwinner A1X i2c driver
This patch implements a basic driver for the I2C host driver found on
the Allwinner A10, A13 and A31 SoCs.
Notable missing feature is 10-bit addressing.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
.../devicetree/bindings/i2c/i2c-sunxi.txt | 19 +
drivers/i2c/busses/Kconfig | 10 +
drivers/i2c/busses/Makefile| 1 +
drivers/i2c/busses/i2c-sunxi.c | 441 +
4 files changed, 471 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i2c/i2c-sunxi.txt
create mode 100644 drivers/i2c/busses/i2c-sunxi.c
diff --git a/Documentation/devicetree/bindings/i2c/i2c-sunxi.txt
b/Documentation/devicetree/bindings/i2c/i2c-sunxi.txt
new file mode 100644
index 000..40c16d0
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/i2c-sunxi.txt
@@ -0,0 +1,19 @@
+Allwinner SoC I2C controller
+
+Required properties:
+- compatible : Should be allwinner,sun4i-i2c.
+- reg: Should contain register location and length.
+- interrupts: Should contain interrupt.
+- clocks : The parent clock feeding the I2C controller.
+
+Recommended properties:
+- clock-frequency : desired I2C bus clock frequency in Hz.
+
+Example:
+i2c0: i2c@01c2ac00 {
+ compatible = allwinner,sun4i-i2c;
+ reg = 0x01c2ac00 0x400;
+ interrupts = 7;
+ clocks = apb1_gates 0;
+ clock-frequency = 10;
+};
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index adfee98..327a49b 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -706,6 +706,16 @@ config I2C_STU300
This driver can also be built as a module. If so, the module
will be called i2c-stu300.
+config I2C_SUNXI
+ tristate Allwinner A1X I2C controller
+ depends on ARCH_SUNXI
+ help
+ If you say yes to this option, support will be included for the
+ I2C controller embedded in Allwinner A1X SoCs.
+
+ This driver can also be built as a module. If so, the module
+ will be called i2c-sunxi.
+
config I2C_TEGRA
tristate NVIDIA Tegra internal I2C controller
depends on ARCH_TEGRA
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 8f4fc23..7225818 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -69,6 +69,7 @@ obj-$(CONFIG_I2C_SH_MOBILE) += i2c-sh_mobile.o
obj-$(CONFIG_I2C_SIMTEC) += i2c-simtec.o
obj-$(CONFIG_I2C_SIRF) += i2c-sirf.o
obj-$(CONFIG_I2C_STU300) += i2c-stu300.o
+obj-$(CONFIG_I2C_SUNXI)+= i2c-sunxi.o
obj-$(CONFIG_I2C_TEGRA)+= i2c-tegra.o
obj-$(CONFIG_I2C_VERSATILE)+= i2c-versatile.o
obj-$(CONFIG_I2C_OCTEON) += i2c-octeon.o
diff --git a/drivers/i2c/busses/i2c-sunxi.c b/drivers/i2c/busses/i2c-sunxi.c
new file mode 100644
index 000..f9f8bd4
--- /dev/null
+++ b/drivers/i2c/busses/i2c-sunxi.c
@@ -0,0 +1,441 @@
+/*
+ * Allwinner A1X SoCs i2c controller driver.
+ *
+ * Copyright (C) 2013 Maxime Ripard
+ *
+ * Maxime Ripard maxime.rip...@free-electrons.com
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed as is without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include linux/clk.h
+#include linux/completion.h
+#include linux/err.h
+#include linux/i2c.h
+#include linux/interrupt.h
+#include linux/io.h
+#include linux/module.h
+#include linux/of_address.h
+#include linux/of_irq.h
+#include linux/platform_device.h
+
+#define SUNXI_I2C_ADDR_REG (0x00)
+#define SUNXI_I2C_ADDR_ADDR(v) ((v 0x7f) 1)
+#define SUNXI_I2C_XADDR_REG(0x04)
+#define SUNXI_I2C_DATA_REG (0x08)
+#define SUNXI_I2C_CNTR_REG (0x0c)
+#define SUNXI_I2C_CNTR_ASSERT_ACK BIT(2)
+#define SUNXI_I2C_CNTR_INT_FLAGBIT(3)
+#define SUNXI_I2C_CNTR_MASTER_STOP BIT(4)
+#define SUNXI_I2C_CNTR_MASTER_STARTBIT(5)
+#define SUNXI_I2C_CNTR_BUS_ENABLE BIT(6)
+#define SUNXI_I2C_CNTR_INT_ENABLE BIT(7)
+#define SUNXI_I2C_STA_REG (0x10)
+#define SUNXI_I2C_STA_BUS_ERROR(0x00)
+#define SUNXI_I2C_STA_START(0x08)
+#define SUNXI_I2C_STA_START_REPEAT (0x10)
+#define SUNXI_I2C_STA_MASTER_WADDR_ACK (0x18)
+#define SUNXI_I2C_STA_MASTER_WADDR_NAK (0x20)
+#define SUNXI_I2C_STA_MASTER_DATA_SENT_ACK (0x28)
+#define SUNXI_I2C_STA_MASTER_DATA_SENT_NAK (0x30)
+#define SUNXI_I2C_STA_MASTER_RADDR_ACK (0x40)
+#define SUNXI_I2C_STA_MASTER_RADDR_NAK (0x48)
+#define SUNXI_I2C_STA_MASTER_DATA_RECV_ACK (0x50)
+#define SUNXI_I2C_STA_MASTER_DATA_RECV_NAK (0x58)
+#define SUNXI_I2C_CCR_REG (0x14)
+#define SUNXI_I2C_CCR_DIV_N(val) (val 0x3)
+#define SUNXI_I2C_CCR_DIV_M(val) ((val 0xf)
[PATCH 1/5] i2c: sunxi: Add Allwinner A1X i2c driver
This patch implements a basic driver for the I2C host driver found on
the Allwinner A10, A13 and A31 SoCs.
Notable missing feature is 10-bit addressing.
Signed-off-by: Maxime Ripard
---
.../devicetree/bindings/i2c/i2c-sunxi.txt | 19 +
drivers/i2c/busses/Kconfig | 10 +
drivers/i2c/busses/Makefile| 1 +
drivers/i2c/busses/i2c-sunxi.c | 441 +
4 files changed, 471 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i2c/i2c-sunxi.txt
create mode 100644 drivers/i2c/busses/i2c-sunxi.c
diff --git a/Documentation/devicetree/bindings/i2c/i2c-sunxi.txt
b/Documentation/devicetree/bindings/i2c/i2c-sunxi.txt
new file mode 100644
index 000..40c16d0
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/i2c-sunxi.txt
@@ -0,0 +1,19 @@
+Allwinner SoC I2C controller
+
+Required properties:
+- compatible : Should be "allwinner,sun4i-i2c".
+- reg: Should contain register location and length.
+- interrupts: Should contain interrupt.
+- clocks : The parent clock feeding the I2C controller.
+
+Recommended properties:
+- clock-frequency : desired I2C bus clock frequency in Hz.
+
+Example:
+i2c0: i2c@01c2ac00 {
+ compatible = "allwinner,sun4i-i2c";
+ reg = <0x01c2ac00 0x400>;
+ interrupts = <7>;
+ clocks = <_gates 0>;
+ clock-frequency = <10>;
+};
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index adfee98..327a49b 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -706,6 +706,16 @@ config I2C_STU300
This driver can also be built as a module. If so, the module
will be called i2c-stu300.
+config I2C_SUNXI
+ tristate "Allwinner A1X I2C controller"
+ depends on ARCH_SUNXI
+ help
+ If you say yes to this option, support will be included for the
+ I2C controller embedded in Allwinner A1X SoCs.
+
+ This driver can also be built as a module. If so, the module
+ will be called i2c-sunxi.
+
config I2C_TEGRA
tristate "NVIDIA Tegra internal I2C controller"
depends on ARCH_TEGRA
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 8f4fc23..7225818 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -69,6 +69,7 @@ obj-$(CONFIG_I2C_SH_MOBILE) += i2c-sh_mobile.o
obj-$(CONFIG_I2C_SIMTEC) += i2c-simtec.o
obj-$(CONFIG_I2C_SIRF) += i2c-sirf.o
obj-$(CONFIG_I2C_STU300) += i2c-stu300.o
+obj-$(CONFIG_I2C_SUNXI)+= i2c-sunxi.o
obj-$(CONFIG_I2C_TEGRA)+= i2c-tegra.o
obj-$(CONFIG_I2C_VERSATILE)+= i2c-versatile.o
obj-$(CONFIG_I2C_OCTEON) += i2c-octeon.o
diff --git a/drivers/i2c/busses/i2c-sunxi.c b/drivers/i2c/busses/i2c-sunxi.c
new file mode 100644
index 000..f9f8bd4
--- /dev/null
+++ b/drivers/i2c/busses/i2c-sunxi.c
@@ -0,0 +1,441 @@
+/*
+ * Allwinner A1X SoCs i2c controller driver.
+ *
+ * Copyright (C) 2013 Maxime Ripard
+ *
+ * Maxime Ripard
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define SUNXI_I2C_ADDR_REG (0x00)
+#define SUNXI_I2C_ADDR_ADDR(v) ((v & 0x7f) << 1)
+#define SUNXI_I2C_XADDR_REG(0x04)
+#define SUNXI_I2C_DATA_REG (0x08)
+#define SUNXI_I2C_CNTR_REG (0x0c)
+#define SUNXI_I2C_CNTR_ASSERT_ACK BIT(2)
+#define SUNXI_I2C_CNTR_INT_FLAGBIT(3)
+#define SUNXI_I2C_CNTR_MASTER_STOP BIT(4)
+#define SUNXI_I2C_CNTR_MASTER_STARTBIT(5)
+#define SUNXI_I2C_CNTR_BUS_ENABLE BIT(6)
+#define SUNXI_I2C_CNTR_INT_ENABLE BIT(7)
+#define SUNXI_I2C_STA_REG (0x10)
+#define SUNXI_I2C_STA_BUS_ERROR(0x00)
+#define SUNXI_I2C_STA_START(0x08)
+#define SUNXI_I2C_STA_START_REPEAT (0x10)
+#define SUNXI_I2C_STA_MASTER_WADDR_ACK (0x18)
+#define SUNXI_I2C_STA_MASTER_WADDR_NAK (0x20)
+#define SUNXI_I2C_STA_MASTER_DATA_SENT_ACK (0x28)
+#define SUNXI_I2C_STA_MASTER_DATA_SENT_NAK (0x30)
+#define SUNXI_I2C_STA_MASTER_RADDR_ACK (0x40)
+#define SUNXI_I2C_STA_MASTER_RADDR_NAK (0x48)
+#define SUNXI_I2C_STA_MASTER_DATA_RECV_ACK (0x50)
+#define SUNXI_I2C_STA_MASTER_DATA_RECV_NAK (0x58)
+#define SUNXI_I2C_CCR_REG (0x14)
+#define SUNXI_I2C_CCR_DIV_N(val) (val & 0x3)
+#define SUNXI_I2C_CCR_DIV_M(val) ((val & 0xf) << 3)
+#define SUNXI_I2C_SRST_REG (0x18)
+#define SUNXI_I2C_SRST_RESET BIT(0)
+#define SUNXI_I2C_EFR_REG (0x1c)
+#define SUNXI_I2C_LCR_REG
[PATCH 1/5] i2c: sunxi: Add Allwinner A1X i2c driver
This patch implements a basic driver for the I2C host driver found on
the Allwinner A10, A13 and A31 SoCs.
Notable missing feature is 10-bit addressing.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
.../devicetree/bindings/i2c/i2c-sunxi.txt | 19 +
drivers/i2c/busses/Kconfig | 10 +
drivers/i2c/busses/Makefile| 1 +
drivers/i2c/busses/i2c-sunxi.c | 441 +
4 files changed, 471 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i2c/i2c-sunxi.txt
create mode 100644 drivers/i2c/busses/i2c-sunxi.c
diff --git a/Documentation/devicetree/bindings/i2c/i2c-sunxi.txt
b/Documentation/devicetree/bindings/i2c/i2c-sunxi.txt
new file mode 100644
index 000..40c16d0
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/i2c-sunxi.txt
@@ -0,0 +1,19 @@
+Allwinner SoC I2C controller
+
+Required properties:
+- compatible : Should be allwinner,sun4i-i2c.
+- reg: Should contain register location and length.
+- interrupts: Should contain interrupt.
+- clocks : The parent clock feeding the I2C controller.
+
+Recommended properties:
+- clock-frequency : desired I2C bus clock frequency in Hz.
+
+Example:
+i2c0: i2c@01c2ac00 {
+ compatible = allwinner,sun4i-i2c;
+ reg = 0x01c2ac00 0x400;
+ interrupts = 7;
+ clocks = apb1_gates 0;
+ clock-frequency = 10;
+};
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index adfee98..327a49b 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -706,6 +706,16 @@ config I2C_STU300
This driver can also be built as a module. If so, the module
will be called i2c-stu300.
+config I2C_SUNXI
+ tristate Allwinner A1X I2C controller
+ depends on ARCH_SUNXI
+ help
+ If you say yes to this option, support will be included for the
+ I2C controller embedded in Allwinner A1X SoCs.
+
+ This driver can also be built as a module. If so, the module
+ will be called i2c-sunxi.
+
config I2C_TEGRA
tristate NVIDIA Tegra internal I2C controller
depends on ARCH_TEGRA
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 8f4fc23..7225818 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -69,6 +69,7 @@ obj-$(CONFIG_I2C_SH_MOBILE) += i2c-sh_mobile.o
obj-$(CONFIG_I2C_SIMTEC) += i2c-simtec.o
obj-$(CONFIG_I2C_SIRF) += i2c-sirf.o
obj-$(CONFIG_I2C_STU300) += i2c-stu300.o
+obj-$(CONFIG_I2C_SUNXI)+= i2c-sunxi.o
obj-$(CONFIG_I2C_TEGRA)+= i2c-tegra.o
obj-$(CONFIG_I2C_VERSATILE)+= i2c-versatile.o
obj-$(CONFIG_I2C_OCTEON) += i2c-octeon.o
diff --git a/drivers/i2c/busses/i2c-sunxi.c b/drivers/i2c/busses/i2c-sunxi.c
new file mode 100644
index 000..f9f8bd4
--- /dev/null
+++ b/drivers/i2c/busses/i2c-sunxi.c
@@ -0,0 +1,441 @@
+/*
+ * Allwinner A1X SoCs i2c controller driver.
+ *
+ * Copyright (C) 2013 Maxime Ripard
+ *
+ * Maxime Ripard maxime.rip...@free-electrons.com
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed as is without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include linux/clk.h
+#include linux/completion.h
+#include linux/err.h
+#include linux/i2c.h
+#include linux/interrupt.h
+#include linux/io.h
+#include linux/module.h
+#include linux/of_address.h
+#include linux/of_irq.h
+#include linux/platform_device.h
+
+#define SUNXI_I2C_ADDR_REG (0x00)
+#define SUNXI_I2C_ADDR_ADDR(v) ((v 0x7f) 1)
+#define SUNXI_I2C_XADDR_REG(0x04)
+#define SUNXI_I2C_DATA_REG (0x08)
+#define SUNXI_I2C_CNTR_REG (0x0c)
+#define SUNXI_I2C_CNTR_ASSERT_ACK BIT(2)
+#define SUNXI_I2C_CNTR_INT_FLAGBIT(3)
+#define SUNXI_I2C_CNTR_MASTER_STOP BIT(4)
+#define SUNXI_I2C_CNTR_MASTER_STARTBIT(5)
+#define SUNXI_I2C_CNTR_BUS_ENABLE BIT(6)
+#define SUNXI_I2C_CNTR_INT_ENABLE BIT(7)
+#define SUNXI_I2C_STA_REG (0x10)
+#define SUNXI_I2C_STA_BUS_ERROR(0x00)
+#define SUNXI_I2C_STA_START(0x08)
+#define SUNXI_I2C_STA_START_REPEAT (0x10)
+#define SUNXI_I2C_STA_MASTER_WADDR_ACK (0x18)
+#define SUNXI_I2C_STA_MASTER_WADDR_NAK (0x20)
+#define SUNXI_I2C_STA_MASTER_DATA_SENT_ACK (0x28)
+#define SUNXI_I2C_STA_MASTER_DATA_SENT_NAK (0x30)
+#define SUNXI_I2C_STA_MASTER_RADDR_ACK (0x40)
+#define SUNXI_I2C_STA_MASTER_RADDR_NAK (0x48)
+#define SUNXI_I2C_STA_MASTER_DATA_RECV_ACK (0x50)
+#define SUNXI_I2C_STA_MASTER_DATA_RECV_NAK (0x58)
+#define SUNXI_I2C_CCR_REG (0x14)
+#define SUNXI_I2C_CCR_DIV_N(val) (val 0x3)
+#define SUNXI_I2C_CCR_DIV_M(val) ((val 0xf)
