On Tue, Oct 23, 2012 at 03:03:43PM +0200, Peter Zijlstra wrote:
> On Thu, 2012-10-18 at 16:19 -0700, Andi Kleen wrote:
> > @@ -1079,6 +1079,17 @@ static void intel_pmu_enable_event(struct perf_event
> > *event)
> > int intel_pmu_save_and_restart(struct perf_event *event)
> > {
> >
On Thu, 2012-10-18 at 16:19 -0700, Andi Kleen wrote:
> + /* XXX move somewhere else. */
> + if (cpuc->events[2] && (cpuc->events[2]->hw.config &
> HSW_INTX_CHECKPOINTED))
> + status |= (1ULL << 2);
A comment explaining about those 'spurious' PMIs would go along with
On Thu, 2012-10-18 at 16:19 -0700, Andi Kleen wrote:
> @@ -1079,6 +1079,17 @@ static void intel_pmu_enable_event(struct perf_event
> *event)
> int intel_pmu_save_and_restart(struct perf_event *event)
> {
> x86_perf_event_update(event);
> + /*
> +* For a checkpointed
On Thu, 2012-10-18 at 16:19 -0700, Andi Kleen wrote:
@@ -1079,6 +1079,17 @@ static void intel_pmu_enable_event(struct perf_event
*event)
int intel_pmu_save_and_restart(struct perf_event *event)
{
x86_perf_event_update(event);
+ /*
+* For a checkpointed counter
On Thu, 2012-10-18 at 16:19 -0700, Andi Kleen wrote:
+ /* XXX move somewhere else. */
+ if (cpuc-events[2] (cpuc-events[2]-hw.config
HSW_INTX_CHECKPOINTED))
+ status |= (1ULL 2);
A comment explaining about those 'spurious' PMIs would go along with
this nicely,
On Tue, Oct 23, 2012 at 03:03:43PM +0200, Peter Zijlstra wrote:
On Thu, 2012-10-18 at 16:19 -0700, Andi Kleen wrote:
@@ -1079,6 +1079,17 @@ static void intel_pmu_enable_event(struct perf_event
*event)
int intel_pmu_save_and_restart(struct perf_event *event)
{
From: Andi Kleen
With checkpointed counters there can be a situation where the counter
is overflowing, aborts the transaction, is set back to a non overflowing
checkpoint, causes interupt. The interrupt doesn't see the overflow
because it has been checkpointed. This is then a spurious PMI,
From: Andi Kleen a...@linux.intel.com
With checkpointed counters there can be a situation where the counter
is overflowing, aborts the transaction, is set back to a non overflowing
checkpoint, causes interupt. The interrupt doesn't see the overflow
because it has been checkpointed. This is then
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