[PATCH 15/15] ARM: dts: ipq8074: Enable few peripherals for hk01 board

[Sricharan R]

Signed-off-by: Sricharan R 
---
 arch/arm64/boot/dts/qcom/ipq8074-hk01.dts | 99 +++
 1 file changed, 99 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts 
b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
index 6a838b5..69a1b0c 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
+++ b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
@@ -21,6 +21,7 @@
 
aliases {
serial0 = _uart5;
+   serial1 = _blsp2;
};
 
chosen {
@@ -41,6 +42,46 @@
bias-disable;
};
};
+
+i2c_0_pins: i2c_0_pinmux {
+ mux {
+  pins = "gpio42", "gpio43";
+  function = "blsp1_i2c";
+  drive-strength = <8>;
+  bias-disable;
+ };
+};
+
+spi_0_pins: spi_0_pins {
+ mux {
+  pins = "gpio38", "gpio39", "gpio40", 
"gpio41";
+  function = "blsp0_spi";
+  drive-strength = <8>;
+  bias-disable;
+ };
+};
+
+hsuart_pins: hsuart_pins {
+ mux {
+  pins = "gpio46", "gpio47", "gpio48", 
"gpio49";
+  function = "blsp2_uart";
+  drive-strength = <8>;
+  bias-disable;
+ };
+};
+
+qpic_pins: qpic_pins {
+   mux {
+  pins = "gpio0", "gpio1", "gpio2", 
"gpio3", "gpio4",
+   "gpio5", "gpio6", "gpio7", 
"gpio8", "gpio9",
+  "gpio10", "gpio11", 
"gpio12", "gpio13",
+   "gpio14", "gpio15", "gpio16", 
"gpio17";
+  function = "qpic";
+  drive-strength = <8>;
+  bias-disable;
+ };
+   };
+
};
 
serial@78b3000 {
@@ -48,5 +89,63 @@
pinctrl-names = "default";
status = "ok";
};
+
+   spi_0: spi@78b5000 {
+pinctrl-0 = <_0_pins>;
+pinctrl-names = "default";
+status = "ok";
+
+m25p80@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+   compatible = "n25q128a11", "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <5000>;
+};
+   };
+
+   serial_blsp2: serial@78B1000 {
+pinctrl-0 = <_pins>;
+pinctrl-names = "default";
+status = "ok";
+   };
+
+   i2c_0@78b6000 {
+pinctrl-0 = <_0_pins>;
+pinctrl-names = "default";
+status = "ok";
+   };
+
+   i2c_1@78b7000 {
+status = "disabled";
+   };
+
+   dma@7984000 {
+status = "ok";
+   };
+
+   nand@79b {
+pinctrl-0 = <_pins>;
+pinctrl-names = "default";
+status = "ok";
+
+   nand@0 {
+   reg = <0>;
+   nand-ecc-strength = <4>;
+   nand-ecc-step-size = <512>;
+   nand-bus-width = <8>;
+   };
+
+   };
+
+   pcie0: pci@2000 {
+   status = "ok";
+   perst-gpio = < 58 0x1>;
+   };
+
+   pcie1: pci@1000 {
+   status = "ok";
+   perst-gpio = < 61 0x1>;
+   };
};
 };
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of 
Code Aurora Forum, hosted by The Linux Foundation

[PATCH 15/15] ARM: dts: ipq8074: Enable few peripherals for hk01 board

[Sricharan R]

Signed-off-by: Sricharan R 
---
 arch/arm64/boot/dts/qcom/ipq8074-hk01.dts | 99 +++
 1 file changed, 99 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts 
b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
index 6a838b5..69a1b0c 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
+++ b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
@@ -21,6 +21,7 @@
 
aliases {
serial0 = _uart5;
+   serial1 = _blsp2;
};
 
chosen {
@@ -41,6 +42,46 @@
bias-disable;
};
};
+
+i2c_0_pins: i2c_0_pinmux {
+ mux {
+  pins = "gpio42", "gpio43";
+  function = "blsp1_i2c";
+  drive-strength = <8>;
+  bias-disable;
+ };
+};
+
+spi_0_pins: spi_0_pins {
+ mux {
+  pins = "gpio38", "gpio39", "gpio40", 
"gpio41";
+  function = "blsp0_spi";
+  drive-strength = <8>;
+  bias-disable;
+ };
+};
+
+hsuart_pins: hsuart_pins {
+ mux {
+  pins = "gpio46", "gpio47", "gpio48", 
"gpio49";
+  function = "blsp2_uart";
+  drive-strength = <8>;
+  bias-disable;
+ };
+};
+
+qpic_pins: qpic_pins {
+   mux {
+  pins = "gpio0", "gpio1", "gpio2", 
"gpio3", "gpio4",
+   "gpio5", "gpio6", "gpio7", 
"gpio8", "gpio9",
+  "gpio10", "gpio11", 
"gpio12", "gpio13",
+   "gpio14", "gpio15", "gpio16", 
"gpio17";
+  function = "qpic";
+  drive-strength = <8>;
+  bias-disable;
+ };
+   };
+
};
 
serial@78b3000 {
@@ -48,5 +89,63 @@
pinctrl-names = "default";
status = "ok";
};
+
+   spi_0: spi@78b5000 {
+pinctrl-0 = <_0_pins>;
+pinctrl-names = "default";
+status = "ok";
+
+m25p80@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+   compatible = "n25q128a11", "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <5000>;
+};
+   };
+
+   serial_blsp2: serial@78B1000 {
+pinctrl-0 = <_pins>;
+pinctrl-names = "default";
+status = "ok";
+   };
+
+   i2c_0@78b6000 {
+pinctrl-0 = <_0_pins>;
+pinctrl-names = "default";
+status = "ok";
+   };
+
+   i2c_1@78b7000 {
+status = "disabled";
+   };
+
+   dma@7984000 {
+status = "ok";
+   };
+
+   nand@79b {
+pinctrl-0 = <_pins>;
+pinctrl-names = "default";
+status = "ok";
+
+   nand@0 {
+   reg = <0>;
+   nand-ecc-strength = <4>;
+   nand-ecc-step-size = <512>;
+   nand-bus-width = <8>;
+   };
+
+   };
+
+   pcie0: pci@2000 {
+   status = "ok";
+   perst-gpio = < 58 0x1>;
+   };
+
+   pcie1: pci@1000 {
+   status = "ok";
+   perst-gpio = < 61 0x1>;
+   };
};
 };
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of 
Code Aurora Forum, hosted by The Linux Foundation