2016-08-09 2:16 GMT+08:00 Radim Krčmář :
> If vmcs12 does not intercept APIC_BASE writes, then KVM will handle the
> write with vmcs02 as the current VMCS.
> This will incorrectly apply modifications intended for vmcs01 to vmcs02
> and L2 can use it to gain access to L0's x2APIC registers by disabl
2016-08-15 13:19+0800, Wanpeng Li:
> 2016-08-12 19:39 GMT+08:00 Radim Krčmář :
>> 2016-08-12 18:14+0800, Wanpeng Li:
>>> 2016-08-12 17:44 GMT+08:00 Radim Krčmář :
2016-08-12 14:07+0800, Wanpeng Li:
> 2016-08-09 2:16 GMT+08:00 Radim Krčmář :
>> If vmcs12 does not intercept APIC_BASE wri
2016-08-12 19:39 GMT+08:00 Radim Krčmář :
> 2016-08-12 18:14+0800, Wanpeng Li:
>> 2016-08-12 17:44 GMT+08:00 Radim Krčmář :
>>> 2016-08-12 14:07+0800, Wanpeng Li:
2016-08-09 2:16 GMT+08:00 Radim Krčmář :
> If vmcs12 does not intercept APIC_BASE writes, then KVM will handle the
> write
2016-08-12 18:14+0800, Wanpeng Li:
> 2016-08-12 17:44 GMT+08:00 Radim Krčmář :
>> 2016-08-12 14:07+0800, Wanpeng Li:
>>> 2016-08-09 2:16 GMT+08:00 Radim Krčmář :
If vmcs12 does not intercept APIC_BASE writes, then KVM will handle the
write with vmcs02 as the current VMCS.
This will i
2016-08-12 17:44 GMT+08:00 Radim Krčmář :
> 2016-08-12 14:07+0800, Wanpeng Li:
>> 2016-08-09 2:16 GMT+08:00 Radim Krčmář :
>>> If vmcs12 does not intercept APIC_BASE writes, then KVM will handle the
>>> write with vmcs02 as the current VMCS.
>>> This will incorrectly apply modifications intended fo
2016-08-12 14:07+0800, Wanpeng Li:
> 2016-08-09 2:16 GMT+08:00 Radim Krčmář :
>> If vmcs12 does not intercept APIC_BASE writes, then KVM will handle the
>> write with vmcs02 as the current VMCS.
>> This will incorrectly apply modifications intended for vmcs01 to vmcs02
>> and L2 can use it to gain
2016-08-09 2:16 GMT+08:00 Radim Krčmář :
> If vmcs12 does not intercept APIC_BASE writes, then KVM will handle the
> write with vmcs02 as the current VMCS.
> This will incorrectly apply modifications intended for vmcs01 to vmcs02
> and L2 can use it to gain access to L0's x2APIC registers by disabl
If vmcs12 does not intercept APIC_BASE writes, then KVM will handle the
write with vmcs02 as the current VMCS.
This will incorrectly apply modifications intended for vmcs01 to vmcs02
and L2 can use it to gain access to L0's x2APIC registers by disabling
virtualized x2APIC while using msr bitmap tha
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