On Tue, Dec 04, 2012 at 08:43:18PM +, Arnd Bergmann wrote:
> On Tuesday 04 December 2012, Eli Billauer wrote:
> > I'm currently writing some documentation which will cover the API and
> > also help reading the code, I hope. It takes some time...
> >
> > Until it's done, let's look at a usage
Hi!
> >Agreed. If I understand you correctly though, your approach is specific
> >to a particular hardware implementation (Zynq) on the user interface layer,
> >which I think is exactly what we should avoid. Obviously, there is
> >always a driver involved that is specific to the IP block you load
Hi!
Agreed. If I understand you correctly though, your approach is specific
to a particular hardware implementation (Zynq) on the user interface layer,
which I think is exactly what we should avoid. Obviously, there is
always a driver involved that is specific to the IP block you load into
On Tue, Dec 04, 2012 at 08:43:18PM +, Arnd Bergmann wrote:
On Tuesday 04 December 2012, Eli Billauer wrote:
I'm currently writing some documentation which will cover the API and
also help reading the code, I hope. It takes some time...
Until it's done, let's look at a usage example:
On 12/05/2012 01:05 AM, Arnd Bergmann wrote:
On Tuesday 04 December 2012, Eli Billauer wrote:
On 12/04/2012 10:43 PM, Arnd Bergmann wrote:
On Tuesday 04 December 2012, Eli Billauer wrote:
It's also a bit confusing because it doesn't appear
to be a "bus" in the Linux sense of being
On Tuesday 04 December 2012, Eli Billauer wrote:
> On 12/04/2012 10:43 PM, Arnd Bergmann wrote:
> > On Tuesday 04 December 2012, Eli Billauer wrote:
> > It's also a bit confusing because it doesn't appear
> > to be a "bus" in the Linux sense of being something that provides
> > an abstract
On 12/04/2012 10:43 PM, Arnd Bergmann wrote:
On Tuesday 04 December 2012, Eli Billauer wrote:
I'm currently writing some documentation which will cover the API and
also help reading the code, I hope. It takes some time...
Until it's done, let's look at a usage example: Suppose that the
On Tuesday 04 December 2012, Philip Balister wrote:
> On 12/01/2012 12:48 PM, Arnd Bergmann wrote:
> > On Saturday 01 December 2012, Philip Balister wrote:
> >> On 11/30/2012 09:36 AM, Greg KH wrote:
> >>> Yes, I know of at least one more device other than the ones listed above
> >>> that wants
On Tuesday 04 December 2012, Eli Billauer wrote:
> I'm currently writing some documentation which will cover the API and
> also help reading the code, I hope. It takes some time...
>
> Until it's done, let's look at a usage example: Suppose that the FPGA's
> application is to receive a
On 12/01/2012 12:48 PM, Arnd Bergmann wrote:
On Saturday 01 December 2012, Philip Balister wrote:
On 11/30/2012 09:36 AM, Greg KH wrote:
Yes, I know of at least one more device other than the ones listed above
that wants this type of functionality as well, so defining it in a
standard
On 12/04/2012 05:41 AM, Greg KH wrote:
On Sun, Dec 02, 2012 at 07:26:27PM +0200, Eli Billauer wrote:
On 11/30/2012 06:32 PM, Greg KH wrote:
>>+static struct class *xillybus_class;
>Why not just use the misc interface instead of your own class?
On 12/04/2012 05:41 AM, Greg KH wrote:
On Sun, Dec 02, 2012 at 07:26:27PM +0200, Eli Billauer wrote:
On 11/30/2012 06:32 PM, Greg KH wrote:
+static struct class *xillybus_class;
Why not just use the misc interface instead of your own class?
When
On 12/01/2012 12:48 PM, Arnd Bergmann wrote:
On Saturday 01 December 2012, Philip Balister wrote:
On 11/30/2012 09:36 AM, Greg KH wrote:
Yes, I know of at least one more device other than the ones listed above
that wants this type of functionality as well, so defining it in a
standard
On Tuesday 04 December 2012, Eli Billauer wrote:
I'm currently writing some documentation which will cover the API and
also help reading the code, I hope. It takes some time...
Until it's done, let's look at a usage example: Suppose that the FPGA's
application is to receive a high-speed
On Tuesday 04 December 2012, Philip Balister wrote:
On 12/01/2012 12:48 PM, Arnd Bergmann wrote:
On Saturday 01 December 2012, Philip Balister wrote:
On 11/30/2012 09:36 AM, Greg KH wrote:
Yes, I know of at least one more device other than the ones listed above
that wants this type of
On 12/04/2012 10:43 PM, Arnd Bergmann wrote:
On Tuesday 04 December 2012, Eli Billauer wrote:
I'm currently writing some documentation which will cover the API and
also help reading the code, I hope. It takes some time...
Until it's done, let's look at a usage example: Suppose that the
On Tuesday 04 December 2012, Eli Billauer wrote:
On 12/04/2012 10:43 PM, Arnd Bergmann wrote:
On Tuesday 04 December 2012, Eli Billauer wrote:
It's also a bit confusing because it doesn't appear
to be a bus in the Linux sense of being something that provides
an abstract interface
On 12/05/2012 01:05 AM, Arnd Bergmann wrote:
On Tuesday 04 December 2012, Eli Billauer wrote:
On 12/04/2012 10:43 PM, Arnd Bergmann wrote:
On Tuesday 04 December 2012, Eli Billauer wrote:
It's also a bit confusing because it doesn't appear
to be a bus in the Linux sense of being
On Sun, Dec 02, 2012 at 07:26:27PM +0200, Eli Billauer wrote:
> On 11/30/2012 06:32 PM, Greg KH wrote:
> > >>+static struct class *xillybus_class;
> >Why not just use the misc interface instead of your own class?
> >>> When Xillybus is used, the whole system's mission is usually around
t; Subject: Re: [PATCH 2/2] New driver: Xillybus generic interface for FPGA
> (programmable logic)
>
> On Saturday 01 December 2012, Philip Balister wrote:
> > On 11/30/2012 09:36 AM, Greg KH wrote:
> > > Yes, I know of at least one more device other than the ones listed a
driver: Xillybus generic interface for FPGA
(programmable logic)
On Saturday 01 December 2012, Philip Balister wrote:
On 11/30/2012 09:36 AM, Greg KH wrote:
Yes, I know of at least one more device other than the ones listed above
that wants this type of functionality as well, so
On Sun, Dec 02, 2012 at 07:26:27PM +0200, Eli Billauer wrote:
On 11/30/2012 06:32 PM, Greg KH wrote:
+static struct class *xillybus_class;
Why not just use the misc interface instead of your own class?
When Xillybus is used, the whole system's mission is usually around
it (e.g. it's a
On 11/30/2012 06:32 PM, Greg KH wrote:
> >>+static struct class *xillybus_class;
> >Why not just use the misc interface instead of your own class?
> When Xillybus is used, the whole system's mission is usually around
> it (e.g. it's a computer doing data acquisition
On 12/01/2012 10:48 PM, Arnd Bergmann wrote:
I agree that is a concern, but for now, I'm mostly worried about
the kernel-to-user interface. If we can agree on a driver interface
that works for Xillybus as well as any of the others we know about,
we can start using that as the generic kernel FPGA
On 12/01/2012 10:48 PM, Arnd Bergmann wrote:
I agree that is a concern, but for now, I'm mostly worried about
the kernel-to-user interface. If we can agree on a driver interface
that works for Xillybus as well as any of the others we know about,
we can start using that as the generic kernel FPGA
On 11/30/2012 06:32 PM, Greg KH wrote:
+static struct class *xillybus_class;
Why not just use the misc interface instead of your own class?
When Xillybus is used, the whole system's mission is usually around
it (e.g. it's a computer doing data acquisition through the
On Saturday 01 December 2012, Philip Balister wrote:
> On 11/30/2012 09:36 AM, Greg KH wrote:
> > Yes, I know of at least one more device other than the ones listed above
> > that wants this type of functionality as well, so defining it in a
> > standard user/kernel api manner would be very good
On Sat, Dec 01, 2012 at 11:30:55AM -0800, Philip Balister wrote:
> On 12/01/2012 08:56 AM, Greg KH wrote:
> >On Fri, Nov 30, 2012 at 07:19:16PM -0800, Philip Balister wrote:
[..]
> >
> >>I've been engaged in design discussions today with my customer. Our
> >>target is the Xilinx Zynq hardware. The
On 12/01/2012 08:56 AM, Greg KH wrote:
On Fri, Nov 30, 2012 at 07:19:16PM -0800, Philip Balister wrote:
On 11/30/2012 09:36 AM, Greg KH wrote:
On Fri, Nov 30, 2012 at 05:28:47PM +, Arnd Bergmann wrote:
On Wednesday 28 November 2012, Eli Billauer wrote:
Xillybus is a general-purpose
On Sat, Dec 01, 2012 at 08:56:12AM -0800, Greg KH wrote:
> So, in the grand tradition of, "The first one there wins", why not base
> it all off of your driver, and how that works, and we can go from there :)
Oops, sorry s/your/Eli's/, my confusion.
greg k-h
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On Fri, Nov 30, 2012 at 07:19:16PM -0800, Philip Balister wrote:
> On 11/30/2012 09:36 AM, Greg KH wrote:
> >On Fri, Nov 30, 2012 at 05:28:47PM +, Arnd Bergmann wrote:
> >>On Wednesday 28 November 2012, Eli Billauer wrote:
> >>>
> >>>Xillybus is a general-purpose framework for communication
On Fri, Nov 30, 2012 at 07:19:16PM -0800, Philip Balister wrote:
On 11/30/2012 09:36 AM, Greg KH wrote:
On Fri, Nov 30, 2012 at 05:28:47PM +, Arnd Bergmann wrote:
On Wednesday 28 November 2012, Eli Billauer wrote:
Xillybus is a general-purpose framework for communication between
On Sat, Dec 01, 2012 at 08:56:12AM -0800, Greg KH wrote:
So, in the grand tradition of, The first one there wins, why not base
it all off of your driver, and how that works, and we can go from there :)
Oops, sorry s/your/Eli's/, my confusion.
greg k-h
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To unsubscribe from this list: send the
On 12/01/2012 08:56 AM, Greg KH wrote:
On Fri, Nov 30, 2012 at 07:19:16PM -0800, Philip Balister wrote:
On 11/30/2012 09:36 AM, Greg KH wrote:
On Fri, Nov 30, 2012 at 05:28:47PM +, Arnd Bergmann wrote:
On Wednesday 28 November 2012, Eli Billauer wrote:
Xillybus is a general-purpose
On Sat, Dec 01, 2012 at 11:30:55AM -0800, Philip Balister wrote:
On 12/01/2012 08:56 AM, Greg KH wrote:
On Fri, Nov 30, 2012 at 07:19:16PM -0800, Philip Balister wrote:
[..]
I've been engaged in design discussions today with my customer. Our
target is the Xilinx Zynq hardware. The first pass
On Saturday 01 December 2012, Philip Balister wrote:
On 11/30/2012 09:36 AM, Greg KH wrote:
Yes, I know of at least one more device other than the ones listed above
that wants this type of functionality as well, so defining it in a
standard user/kernel api manner would be very good to do.
On 11/30/2012 09:36 AM, Greg KH wrote:
On Fri, Nov 30, 2012 at 05:28:47PM +, Arnd Bergmann wrote:
On Wednesday 28 November 2012, Eli Billauer wrote:
Xillybus is a general-purpose framework for communication between programmable
logic (FPGA) and a host. It provides a simple connection
On Fri, Nov 30, 2012 at 05:28:47PM +, Arnd Bergmann wrote:
> On Wednesday 28 November 2012, Eli Billauer wrote:
> >
> > Xillybus is a general-purpose framework for communication between
> > programmable
> > logic (FPGA) and a host. It provides a simple connection between hardware
> > FIFOs
On Friday 30 November 2012, Eli Billauer wrote:
> The problem is if the page size smaller than 4kB. The buffers
> allocated by the driver must not cross a 4kB boundary, and it's assumed
> that anything returned by __get_free_pages() is 4 kB-aligned. Otherwise
> the FPGA will generate illegal
On Wednesday 28 November 2012, Eli Billauer wrote:
>
> Xillybus is a general-purpose framework for communication between programmable
> logic (FPGA) and a host. It provides a simple connection between hardware
> FIFOs
> in the FPGA and their respective device files on the host. The user space
>
On 11/30/2012 06:32 PM, Greg KH wrote:
As we need to review the user/kernel api here, putting the docs as part
of the driver submission is a good idea :)
I didn't know, nor do I trust, that a random web site would have the
correct documentation for a kernel driver.
OK. I'll add a file in
On Fri, Nov 30, 2012 at 04:50:39PM +0200, Eli Billauer wrote:
> Thanks for the remarks.
>
> I'm sending the updated patches in a minute. Basically, I divided
> the module into three (one core, one for PCIe and one for OF) and
> made several corrections.
>
> On 11/28/2012 06:57 PM, Greg KH wrote:
Thanks for the remarks.
I'm sending the updated patches in a minute. Basically, I divided the
module into three (one core, one for PCIe and one for OF) and made
several corrections.
On 11/28/2012 06:57 PM, Greg KH wrote:
What is the user/kernel interface for this driver? Is it documented
Thanks for the remarks.
I'm sending the updated patches in a minute. Basically, I divided the
module into three (one core, one for PCIe and one for OF) and made
several corrections.
On 11/28/2012 06:57 PM, Greg KH wrote:
What is the user/kernel interface for this driver? Is it documented
On Fri, Nov 30, 2012 at 04:50:39PM +0200, Eli Billauer wrote:
Thanks for the remarks.
I'm sending the updated patches in a minute. Basically, I divided
the module into three (one core, one for PCIe and one for OF) and
made several corrections.
On 11/28/2012 06:57 PM, Greg KH wrote:
What
On 11/30/2012 06:32 PM, Greg KH wrote:
As we need to review the user/kernel api here, putting the docs as part
of the driver submission is a good idea :)
I didn't know, nor do I trust, that a random web site would have the
correct documentation for a kernel driver.
OK. I'll add a file in
On Wednesday 28 November 2012, Eli Billauer wrote:
Xillybus is a general-purpose framework for communication between programmable
logic (FPGA) and a host. It provides a simple connection between hardware
FIFOs
in the FPGA and their respective device files on the host. The user space
On Friday 30 November 2012, Eli Billauer wrote:
The problem is if the page size smaller than 4kB. The buffers
allocated by the driver must not cross a 4kB boundary, and it's assumed
that anything returned by __get_free_pages() is 4 kB-aligned. Otherwise
the FPGA will generate illegal PCIe
On Fri, Nov 30, 2012 at 05:28:47PM +, Arnd Bergmann wrote:
On Wednesday 28 November 2012, Eli Billauer wrote:
Xillybus is a general-purpose framework for communication between
programmable
logic (FPGA) and a host. It provides a simple connection between hardware
FIFOs
in the
On 11/30/2012 09:36 AM, Greg KH wrote:
On Fri, Nov 30, 2012 at 05:28:47PM +, Arnd Bergmann wrote:
On Wednesday 28 November 2012, Eli Billauer wrote:
Xillybus is a general-purpose framework for communication between programmable
logic (FPGA) and a host. It provides a simple connection
On Wed, Nov 28, 2012 at 05:41:33PM +0200, Eli Billauer wrote:
> Xillybus is a general-purpose framework for communication between programmable
> logic (FPGA) and a host. It provides a simple connection between hardware
> FIFOs
> in the FPGA and their respective device files on the host. The user
On Wed, Nov 28, 2012 at 05:41:33PM +0200, Eli Billauer wrote:
Xillybus is a general-purpose framework for communication between programmable
logic (FPGA) and a host. It provides a simple connection between hardware
FIFOs
in the FPGA and their respective device files on the host. The user
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