Re: [PATCH 2/2] USB: PHY: JZ4770: Add support for Ingenic X1000 and X1830.
Hi "周琰杰,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on balbi-usb/testing/next]
[also build test WARNING on v5.7]
[cannot apply to usb/usb-testing next-20200529]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url:
https://github.com/0day-ci/linux/commits/Zhou-Yanjie/Add-USB-PHY-support-for-Ingenic-X1000-and-X1830/20200601-030314
base: https://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git
testing/next
config: x86_64-allyesconfig (attached as .config)
compiler: clang version 11.0.0 (https://github.com/llvm/llvm-project
2388a096e7865c043e83ece4e26654bd3d1a20d5)
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
# install x86_64 cross compiling tool for clang build
# apt-get install binutils-x86-64-linux-gnu
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kbuild test robot
All warnings (new ones prefixed by >>, old ones prefixed by <<):
>> drivers/usb/phy/phy-jz4770.c:267:19: warning: cast to smaller integer type
>> 'enum ingenic_usb_phy_version' from 'const void *'
>> [-Wvoid-pointer-to-enum-cast]
priv->version = (enum ingenic_usb_phy_version)match->data;
^
1 warning generated.
vim +267 drivers/usb/phy/phy-jz4770.c
253
254 static int jz4770_phy_probe(struct platform_device *pdev)
255 {
256 struct device *dev = >dev;
257 struct jz4770_phy *priv;
258 const struct of_device_id *match;
259 int err;
260
261 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
262 if (!priv)
263 return -ENOMEM;
264
265 match = of_match_device(ingenic_usb_phy_of_matches, dev);
266 if (match)
> 267 priv->version = (enum
> ingenic_usb_phy_version)match->data;
268 else
269 return -ENODEV;
270
271 platform_set_drvdata(pdev, priv);
272 priv->dev = dev;
273 priv->phy.dev = dev;
274 priv->phy.otg = >otg;
275 priv->phy.label = "ingenic-usb-phy";
276 priv->phy.init = jz4770_phy_init;
277 priv->phy.shutdown = jz4770_phy_shutdown;
278
279 priv->otg.state = OTG_STATE_UNDEFINED;
280 priv->otg.usb_phy = >phy;
281 priv->otg.set_host = jz4770_phy_set_host;
282 priv->otg.set_peripheral = jz4770_phy_set_peripheral;
283
284 priv->base = devm_platform_ioremap_resource(pdev, 0);
285 if (IS_ERR(priv->base)) {
286 dev_err(dev, "Failed to map registers");
287 return PTR_ERR(priv->base);
288 }
289
290 priv->clk = devm_clk_get(dev, NULL);
291 if (IS_ERR(priv->clk)) {
292 err = PTR_ERR(priv->clk);
293 if (err != -EPROBE_DEFER)
294 dev_err(dev, "Failed to get clock");
295 return err;
296 }
297
298 priv->vcc_supply = devm_regulator_get(dev, "vcc");
299 if (IS_ERR(priv->vcc_supply)) {
300 err = PTR_ERR(priv->vcc_supply);
301 if (err != -EPROBE_DEFER)
302 dev_err(dev, "Failed to get regulator");
303 return err;
304 }
305
306 err = usb_add_phy(>phy, USB_PHY_TYPE_USB2);
307 if (err) {
308 if (err != -EPROBE_DEFER)
309 dev_err(dev, "Unable to register PHY");
310 return err;
311 }
312
313 return devm_add_action_or_reset(dev, jz4770_phy_remove,
>phy);
314 }
315
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org
.config.gz
Description: application/gzip
[PATCH 2/2] USB: PHY: JZ4770: Add support for Ingenic X1000 and X1830.
Add support for probing the phy-jz4770 driver on the X1000 SoC and the X1830 SoC from Ingenic. Signed-off-by: qipengzhen Signed-off-by: 周琰杰 (Zhou Yanjie) --- drivers/usb/phy/Kconfig | 4 +- drivers/usb/phy/phy-jz4770.c | 250 +-- 2 files changed, 169 insertions(+), 85 deletions(-) diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig index 4b3fa78995cf..fb7e32d07646 100644 --- a/drivers/usb/phy/Kconfig +++ b/drivers/usb/phy/Kconfig @@ -185,11 +185,11 @@ config USB_ULPI_VIEWPORT controllers with a viewport register (e.g. Chipidea/ARC controllers). config JZ4770_PHY - tristate "Ingenic JZ4770 Transceiver Driver" + tristate "Ingenic SOCs Transceiver Driver" depends on MIPS || COMPILE_TEST select USB_PHY help This driver provides PHY support for the USB controller found - on the JZ4770 SoC from Ingenic. + on the JZ4770/X1000/X1830 SoC from Ingenic. endmenu diff --git a/drivers/usb/phy/phy-jz4770.c b/drivers/usb/phy/phy-jz4770.c index 3ea1f5b9bcf8..b31d70bb778c 100644 --- a/drivers/usb/phy/phy-jz4770.c +++ b/drivers/usb/phy/phy-jz4770.c @@ -1,77 +1,111 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Ingenic JZ4770 USB PHY driver + * Ingenic SoCs USB PHY driver * Copyright (c) Paul Cercueil + * Copyright (c) qipengzhen + * Copyright (c) 周琰杰 (Zhou Yanjie) */ #include #include #include +#include #include #include #include #include -#define REG_USBPCR_OFFSET 0x00 -#define REG_USBRDT_OFFSET 0x04 -#define REG_USBVBFIL_OFFSET0x08 -#define REG_USBPCR1_OFFSET 0x0c - -/* USBPCR */ -#define USBPCR_USB_MODEBIT(31) -#define USBPCR_AVLD_REGBIT(30) -#define USBPCR_INCRM BIT(27) -#define USBPCR_CLK12_ENBIT(26) -#define USBPCR_COMMONONN BIT(25) -#define USBPCR_VBUSVLDEXT BIT(24) -#define USBPCR_VBUSVLDEXTSEL BIT(23) -#define USBPCR_POR BIT(22) -#define USBPCR_SIDDQ BIT(21) -#define USBPCR_OTG_DISABLE BIT(20) -#define USBPCR_TXPREEMPHTUNE BIT(6) - -#define USBPCR_IDPULLUP_LSB28 -#define USBPCR_IDPULLUP_MASK GENMASK(29, USBPCR_IDPULLUP_LSB) -#define USBPCR_IDPULLUP_ALWAYS (3 << USBPCR_IDPULLUP_LSB) -#define USBPCR_IDPULLUP_SUSPEND(1 << USBPCR_IDPULLUP_LSB) -#define USBPCR_IDPULLUP_OTG(0 << USBPCR_IDPULLUP_LSB) - -#define USBPCR_COMPDISTUNE_LSB 17 -#define USBPCR_COMPDISTUNE_MASKGENMASK(19, USBPCR_COMPDISTUNE_LSB) -#define USBPCR_COMPDISTUNE_DFT 4 - -#define USBPCR_OTGTUNE_LSB 14 -#define USBPCR_OTGTUNE_MASKGENMASK(16, USBPCR_OTGTUNE_LSB) -#define USBPCR_OTGTUNE_DFT 4 - -#define USBPCR_SQRXTUNE_LSB11 -#define USBPCR_SQRXTUNE_MASK GENMASK(13, USBPCR_SQRXTUNE_LSB) -#define USBPCR_SQRXTUNE_DFT3 - -#define USBPCR_TXFSLSTUNE_LSB 7 -#define USBPCR_TXFSLSTUNE_MASK GENMASK(10, USBPCR_TXFSLSTUNE_LSB) -#define USBPCR_TXFSLSTUNE_DFT 3 - -#define USBPCR_TXRISETUNE_LSB 4 -#define USBPCR_TXRISETUNE_MASK GENMASK(5, USBPCR_TXRISETUNE_LSB) -#define USBPCR_TXRISETUNE_DFT 3 - -#define USBPCR_TXVREFTUNE_LSB 0 -#define USBPCR_TXVREFTUNE_MASK GENMASK(3, USBPCR_TXVREFTUNE_LSB) -#define USBPCR_TXVREFTUNE_DFT 5 - -/* USBRDT */ -#define USBRDT_VBFIL_LD_EN BIT(25) -#define USBRDT_IDDIG_ENBIT(24) -#define USBRDT_IDDIG_REG BIT(23) - -#define USBRDT_USBRDT_LSB 0 -#define USBRDT_USBRDT_MASK GENMASK(22, USBRDT_USBRDT_LSB) - -/* USBPCR1 */ -#define USBPCR1_UHC_POWON BIT(5) +#define REG_USBPCR_OFFSET 0x00 +#define REG_USBRDT_OFFSET 0x04 +#define REG_USBVBFIL_OFFSET0x08 +#define REG_USBPCR1_OFFSET 0x0c + +/*USB Parameter Control Register*/ +#define USBPCR_USB_MODEBIT(31) +#define USBPCR_AVLD_REGBIT(30) +#define USBPCR_INCR_MASK BIT(27) +#define USBPCR_COMMONONN BIT(25) +#define USBPCR_VBUSVLDEXT BIT(24) +#define USBPCR_VBUSVLDEXTSEL BIT(23) +#define USBPCR_POR BIT(22) +#define USBPCR_SIDDQ BIT(21) +#define USBPCR_OTG_DISABLE BIT(20) +#define USBPCR_TXPREEMPHTUNE BIT(6) + +#define USBPCR_IDPULLUP_LSB28 +#define USBPCR_IDPULLUP_MASK GENMASK(29, USBPCR_IDPULLUP_LSB) +#define USBPCR_IDPULLUP_ALWAYS (0x2 << USBPCR_IDPULLUP_LSB) +#define USBPCR_IDPULLUP_SUSPEND(0x1 << USBPCR_IDPULLUP_LSB) +#define USBPCR_IDPULLUP_OTG(0x0 << USBPCR_IDPULLUP_LSB) + +#define USBPCR_COMPDISTUNE_LSB 17 +#define USBPCR_COMPDISTUNE_MASKGENMASK(19, USBPCR_COMPDISTUNE_LSB) +#define USBPCR_COMPDISTUNE_DFT (0x4 << USBPCR_COMPDISTUNE_LSB) + +#define USBPCR_OTGTUNE_LSB 14 +#define
