On Fri, Apr 28, 2017 at 03:15:01PM +0100, Catalin Marinas wrote:
> On Thu, Apr 27, 2017 at 06:36:42PM +0100, Will Deacon wrote:
> > On Tue, Apr 25, 2017 at 10:13:51AM -0700, Florian Fainelli wrote:
> > > On 04/25/2017 05:44 AM, Will Deacon wrote:
> > > > On Thu, Apr 20, 2017 at 12:05:46PM -0700,
On Fri, Apr 28, 2017 at 03:15:01PM +0100, Catalin Marinas wrote:
> On Thu, Apr 27, 2017 at 06:36:42PM +0100, Will Deacon wrote:
> > On Tue, Apr 25, 2017 at 10:13:51AM -0700, Florian Fainelli wrote:
> > > On 04/25/2017 05:44 AM, Will Deacon wrote:
> > > > On Thu, Apr 20, 2017 at 12:05:46PM -0700,
On Thu, Apr 27, 2017 at 06:36:42PM +0100, Will Deacon wrote:
> On Tue, Apr 25, 2017 at 10:13:51AM -0700, Florian Fainelli wrote:
> > On 04/25/2017 05:44 AM, Will Deacon wrote:
> > > On Thu, Apr 20, 2017 at 12:05:46PM -0700, Florian Fainelli wrote:
> > >> The ARMv8 PMUv3 cache map did not include
On Thu, Apr 27, 2017 at 06:36:42PM +0100, Will Deacon wrote:
> On Tue, Apr 25, 2017 at 10:13:51AM -0700, Florian Fainelli wrote:
> > On 04/25/2017 05:44 AM, Will Deacon wrote:
> > > On Thu, Apr 20, 2017 at 12:05:46PM -0700, Florian Fainelli wrote:
> > >> The ARMv8 PMUv3 cache map did not include
On Tue, Apr 25, 2017 at 10:13:51AM -0700, Florian Fainelli wrote:
> On 04/25/2017 05:44 AM, Will Deacon wrote:
> > Hi Florian,
> >
> > On Thu, Apr 20, 2017 at 12:05:46PM -0700, Florian Fainelli wrote:
> >> The ARMv8 PMUv3 cache map did not include the L2 cache events, add
> >> them.
> >>
> >>
On Tue, Apr 25, 2017 at 10:13:51AM -0700, Florian Fainelli wrote:
> On 04/25/2017 05:44 AM, Will Deacon wrote:
> > Hi Florian,
> >
> > On Thu, Apr 20, 2017 at 12:05:46PM -0700, Florian Fainelli wrote:
> >> The ARMv8 PMUv3 cache map did not include the L2 cache events, add
> >> them.
> >>
> >>
On 04/25/2017 05:44 AM, Will Deacon wrote:
> Hi Florian,
>
> On Thu, Apr 20, 2017 at 12:05:46PM -0700, Florian Fainelli wrote:
>> The ARMv8 PMUv3 cache map did not include the L2 cache events, add
>> them.
>>
>> Signed-off-by: Florian Fainelli
>> ---
>>
On 04/25/2017 05:44 AM, Will Deacon wrote:
> Hi Florian,
>
> On Thu, Apr 20, 2017 at 12:05:46PM -0700, Florian Fainelli wrote:
>> The ARMv8 PMUv3 cache map did not include the L2 cache events, add
>> them.
>>
>> Signed-off-by: Florian Fainelli
>> ---
>> arch/arm64/kernel/perf_event.c | 5 +
Hi Florian,
On Thu, Apr 20, 2017 at 12:05:46PM -0700, Florian Fainelli wrote:
> The ARMv8 PMUv3 cache map did not include the L2 cache events, add
> them.
>
> Signed-off-by: Florian Fainelli
> ---
> arch/arm64/kernel/perf_event.c | 5 +
> 1 file changed, 5
Hi Florian,
On Thu, Apr 20, 2017 at 12:05:46PM -0700, Florian Fainelli wrote:
> The ARMv8 PMUv3 cache map did not include the L2 cache events, add
> them.
>
> Signed-off-by: Florian Fainelli
> ---
> arch/arm64/kernel/perf_event.c | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git
The ARMv8 PMUv3 cache map did not include the L2 cache events, add
them.
Signed-off-by: Florian Fainelli
---
arch/arm64/kernel/perf_event.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
index
The ARMv8 PMUv3 cache map did not include the L2 cache events, add
them.
Signed-off-by: Florian Fainelli
---
arch/arm64/kernel/perf_event.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
index 4f011cdd756d..a664c575f3fd
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