[PATCH 2/2] can: flexcan: add support for PE clock source select

[Joakim Zhang]

From: Dong Aisheng <aisheng.d...@nxp.com>

Add support to select the clock source for CAN Protocol Engine (PE).
It's Soc Implementation dependent. Refer to RM for detailed definition
of each Soc. We select clock source 1 (peripheral clock) by default in
driver now, this patch add support to prase clock source in DTS file.

Signed-off-by: Dong Aisheng <aisheng.d...@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zh...@nxp.com>
---
 drivers/net/can/flexcan.c | 18 ++++++++++++++----
 1 file changed, 14 insertions(+), 4 deletions(-)

diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index 0f36eafe3ac1..2bca867bcfaa 100644
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
@@ -273,6 +273,8 @@ struct flexcan_priv {
        u8 tx_mb_idx;
        u8 mb_count;
        u8 mb_size;
+       /* Select clock source to CAN Protocol Engine */
+       u8 clk_src;
        u32 reg_ctrl_default;
        u32 reg_imask1_default;
        u32 reg_imask2_default;
@@ -1361,9 +1363,12 @@ static int register_flexcandev(struct net_device *dev)
        err = flexcan_chip_disable(priv);
        if (err)
                goto out_disable_per;
-       reg = priv->read(&regs->ctrl);
-       reg |= FLEXCAN_CTRL_CLK_SRC;
-       priv->write(reg, &regs->ctrl);
+
+       if (priv->clk_src) {
+               reg = priv->read(&regs->ctrl);
+               reg |= FLEXCAN_CTRL_CLK_SRC;
+               priv->write(reg, &regs->ctrl);
+       }
 
        err = flexcan_chip_enable(priv);
        if (err)
@@ -1488,6 +1493,7 @@ static int flexcan_probe(struct platform_device *pdev)
        struct clk *clk_ipg = NULL, *clk_per = NULL;
        struct flexcan_regs __iomem *regs;
        int err, irq;
+       u8 clk_src = 1;
        u32 clock_freq = 0;
 
        reg_xceiver = devm_regulator_get(&pdev->dev, "xceiver");
@@ -1496,9 +1502,12 @@ static int flexcan_probe(struct platform_device *pdev)
        else if (IS_ERR(reg_xceiver))
                reg_xceiver = NULL;
 
-       if (pdev->dev.of_node)
+       if (pdev->dev.of_node) {
                of_property_read_u32(pdev->dev.of_node,
                                     "clock-frequency", &clock_freq);
+               of_property_read_u8(pdev->dev.of_node,
+                                   "fsl,clk-source", &clk_src);
+       }
 
        if (!clock_freq) {
                clk_ipg = devm_clk_get(&pdev->dev, "ipg");
@@ -1556,6 +1565,7 @@ static int flexcan_probe(struct platform_device *pdev)
                priv->write = flexcan_write_le;
        }
 
+       priv->clk_src = clk_src;
        priv->can.clock.freq = clock_freq;
        priv->can.bittiming_const = &flexcan_bittiming_const;
        priv->can.do_set_mode = flexcan_set_mode;
-- 
2.17.1