Re: [PATCH 2/2] dt-bindings: pinctrl: Add MDM9615 TLMM bindings

[Linus Walleij]

On Fri, Jun 17, 2016 at 12:15 PM, Neil Armstrong
 wrote:

> Signed-off-by: Neil Armstrong 

Patch applied with the ACKs.

Yours,
Linus Walleij

Re: [PATCH 2/2] dt-bindings: pinctrl: Add MDM9615 TLMM bindings

[Linus Walleij]

On Fri, Jun 17, 2016 at 12:15 PM, Neil Armstrong
 wrote:

> Signed-off-by: Neil Armstrong 

Patch applied with the ACKs.

Yours,
Linus Walleij

Re: [PATCH 2/2] dt-bindings: pinctrl: Add MDM9615 TLMM bindings

[Bjorn Andersson]

On Fri 17 Jun 03:15 PDT 2016, Neil Armstrong wrote:

> Signed-off-by: Neil Armstrong 

Acked-by: Bjorn Andersson 

Regards,
Bjorn

Re: [PATCH 2/2] dt-bindings: pinctrl: Add MDM9615 TLMM bindings

[Bjorn Andersson]

On Fri 17 Jun 03:15 PDT 2016, Neil Armstrong wrote:

> Signed-off-by: Neil Armstrong 

Acked-by: Bjorn Andersson 

Regards,
Bjorn

Re: [PATCH 2/2] dt-bindings: pinctrl: Add MDM9615 TLMM bindings

[Rob Herring]

On Fri, Jun 17, 2016 at 12:15:35PM +0200, Neil Armstrong wrote:
> Signed-off-by: Neil Armstrong 
> ---
>  .../bindings/pinctrl/qcom,mdm9615-pinctrl.txt  | 152 
> +
>  1 file changed, 152 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.txt

Acked-by: Rob Herring 

Re: [PATCH 2/2] dt-bindings: pinctrl: Add MDM9615 TLMM bindings

[Rob Herring]

On Fri, Jun 17, 2016 at 12:15:35PM +0200, Neil Armstrong wrote:
> Signed-off-by: Neil Armstrong 
> ---
>  .../bindings/pinctrl/qcom,mdm9615-pinctrl.txt  | 152 
> +
>  1 file changed, 152 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.txt

Acked-by: Rob Herring 

[PATCH 2/2] dt-bindings: pinctrl: Add MDM9615 TLMM bindings

[Neil Armstrong]

Signed-off-by: Neil Armstrong 
---
 .../bindings/pinctrl/qcom,mdm9615-pinctrl.txt  | 152 +
 1 file changed, 152 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.txt

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.txt 
b/Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.txt
new file mode 100644
index 000..1b52f01
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.txt
@@ -0,0 +1,152 @@
+Qualcomm MDM9615 TLMM block
+
+This binding describes the Top Level Mode Multiplexer block found in the
+MDM9615 platform.
+
+- compatible:
+   Usage: required
+   Value type: 
+   Definition: must be "qcom,mdm9615-pinctrl"
+
+- reg:
+   Usage: required
+   Value type: 
+   Definition: the base address and size of the TLMM register space.
+
+- interrupts:
+   Usage: required
+   Value type: 
+   Definition: should specify the TLMM summary IRQ.
+
+- interrupt-controller:
+   Usage: required
+   Value type: 
+   Definition: identifies this node as an interrupt controller
+
+- #interrupt-cells:
+   Usage: required
+   Value type: 
+   Definition: must be 2. Specifying the pin number and flags, as defined
+   in 
+
+- gpio-controller:
+   Usage: required
+   Value type: 
+   Definition: identifies this node as a gpio controller
+
+- #gpio-cells:
+   Usage: required
+   Value type: 
+   Definition: must be 2. Specifying the pin number and flags, as defined
+   in 
+
+Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
+a general description of GPIO and interrupt bindings.
+
+Please refer to pinctrl-bindings.txt in this directory for details of the
+common pinctrl bindings used by client devices, including the meaning of the
+phrase "pin configuration node".
+
+The pin configuration nodes act as a container for an arbitrary number of
+subnodes. Each of these subnodes represents some desired configuration for a
+pin, a group, or a list of pins or groups. This configuration can include the
+mux function to select on those pin(s)/group(s), and various pin configuration
+parameters, such as pull-up, drive strength, etc.
+
+
+PIN CONFIGURATION NODES:
+
+The name of each subnode is not important; all subnodes should be enumerated
+and processed purely based on their content.
+
+Each subnode only affects those parameters that are explicitly listed. In
+other words, a subnode that lists a mux function but no pin configuration
+parameters implies no information about any pin configuration parameters.
+Similarly, a pin subnode that describes a pullup parameter implies no
+information about e.g. the mux function.
+
+
+The following generic properties as defined in pinctrl-bindings.txt are valid
+to specify in a pin configuration subnode:
+
+- pins:
+   Usage: required
+   Value type: 
+   Definition: List of gpio pins affected by the properties specified in
+   this subnode.  Valid pins are:
+   gpio0-gpio87
+
+- function:
+   Usage: required
+   Value type: 
+   Definition: Specify the alternative function to be configured for the
+   specified pins.
+   Valid values are:
+   gpio, gsbi2_i2c, gsbi3, gsbi4, gsbi5_i2c, gsbi5_uart,
+   sdc2, ebi2_lcdc, ps_hold, prim_audio, sec_audio,
+   cdc_mclk
+
+- bias-disable:
+   Usage: optional
+   Value type: 
+   Definition: The specified pins should be configued as no pull.
+
+- bias-pull-down:
+   Usage: optional
+   Value type: 
+   Definition: The specified pins should be configued as pull down.
+
+- bias-pull-up:
+   Usage: optional
+   Value type: 
+   Definition: The specified pins should be configued as pull up.
+
+- output-high:
+   Usage: optional
+   Value type: 
+   Definition: The specified pins are configured in output mode, driven
+   high.
+
+- output-low:
+   Usage: optional
+   Value type: 
+   Definition: The specified pins are configured in output mode, driven
+   low.
+
+- drive-strength:
+   Usage: optional
+   Value type: 
+   Definition: Selects the drive strength for the specified pins, in mA.
+   Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16
+
+Example:
+
+   msmgpio: pinctrl@80 {
+   compatible = "qcom,mdm9615-pinctrl";
+   reg = <0x80 0x4000>;
+
+   gpio-controller;
+   #gpio-cells = <2>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   interrupts = <0 16 0x4>;
+
+   gsbi8_uart: gsbi8-uart {
+   mux {
+   pins = "gpio34", "gpio35";
+ 

[PATCH 2/2] dt-bindings: pinctrl: Add MDM9615 TLMM bindings

[Neil Armstrong]

Signed-off-by: Neil Armstrong 
---
 .../bindings/pinctrl/qcom,mdm9615-pinctrl.txt  | 152 +
 1 file changed, 152 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.txt

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.txt 
b/Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.txt
new file mode 100644
index 000..1b52f01
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.txt
@@ -0,0 +1,152 @@
+Qualcomm MDM9615 TLMM block
+
+This binding describes the Top Level Mode Multiplexer block found in the
+MDM9615 platform.
+
+- compatible:
+   Usage: required
+   Value type: 
+   Definition: must be "qcom,mdm9615-pinctrl"
+
+- reg:
+   Usage: required
+   Value type: 
+   Definition: the base address and size of the TLMM register space.
+
+- interrupts:
+   Usage: required
+   Value type: 
+   Definition: should specify the TLMM summary IRQ.
+
+- interrupt-controller:
+   Usage: required
+   Value type: 
+   Definition: identifies this node as an interrupt controller
+
+- #interrupt-cells:
+   Usage: required
+   Value type: 
+   Definition: must be 2. Specifying the pin number and flags, as defined
+   in 
+
+- gpio-controller:
+   Usage: required
+   Value type: 
+   Definition: identifies this node as a gpio controller
+
+- #gpio-cells:
+   Usage: required
+   Value type: 
+   Definition: must be 2. Specifying the pin number and flags, as defined
+   in 
+
+Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
+a general description of GPIO and interrupt bindings.
+
+Please refer to pinctrl-bindings.txt in this directory for details of the
+common pinctrl bindings used by client devices, including the meaning of the
+phrase "pin configuration node".
+
+The pin configuration nodes act as a container for an arbitrary number of
+subnodes. Each of these subnodes represents some desired configuration for a
+pin, a group, or a list of pins or groups. This configuration can include the
+mux function to select on those pin(s)/group(s), and various pin configuration
+parameters, such as pull-up, drive strength, etc.
+
+
+PIN CONFIGURATION NODES:
+
+The name of each subnode is not important; all subnodes should be enumerated
+and processed purely based on their content.
+
+Each subnode only affects those parameters that are explicitly listed. In
+other words, a subnode that lists a mux function but no pin configuration
+parameters implies no information about any pin configuration parameters.
+Similarly, a pin subnode that describes a pullup parameter implies no
+information about e.g. the mux function.
+
+
+The following generic properties as defined in pinctrl-bindings.txt are valid
+to specify in a pin configuration subnode:
+
+- pins:
+   Usage: required
+   Value type: 
+   Definition: List of gpio pins affected by the properties specified in
+   this subnode.  Valid pins are:
+   gpio0-gpio87
+
+- function:
+   Usage: required
+   Value type: 
+   Definition: Specify the alternative function to be configured for the
+   specified pins.
+   Valid values are:
+   gpio, gsbi2_i2c, gsbi3, gsbi4, gsbi5_i2c, gsbi5_uart,
+   sdc2, ebi2_lcdc, ps_hold, prim_audio, sec_audio,
+   cdc_mclk
+
+- bias-disable:
+   Usage: optional
+   Value type: 
+   Definition: The specified pins should be configued as no pull.
+
+- bias-pull-down:
+   Usage: optional
+   Value type: 
+   Definition: The specified pins should be configued as pull down.
+
+- bias-pull-up:
+   Usage: optional
+   Value type: 
+   Definition: The specified pins should be configued as pull up.
+
+- output-high:
+   Usage: optional
+   Value type: 
+   Definition: The specified pins are configured in output mode, driven
+   high.
+
+- output-low:
+   Usage: optional
+   Value type: 
+   Definition: The specified pins are configured in output mode, driven
+   low.
+
+- drive-strength:
+   Usage: optional
+   Value type: 
+   Definition: Selects the drive strength for the specified pins, in mA.
+   Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16
+
+Example:
+
+   msmgpio: pinctrl@80 {
+   compatible = "qcom,mdm9615-pinctrl";
+   reg = <0x80 0x4000>;
+
+   gpio-controller;
+   #gpio-cells = <2>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   interrupts = <0 16 0x4>;
+
+   gsbi8_uart: gsbi8-uart {
+   mux {
+   pins = "gpio34", "gpio35";
+