On Wed, Jan 30, 2013 at 02:30:47PM -0700, Troy Kisky wrote:
> On 1/30/2013 3:37 PM, Anson Huang wrote:
> >some of anatop's regulators(vppcpu, vddpu and vddsoc) have
> >register settings about LDO's step time, which will impact
> >the LDO ramp up speed, need to use set_voltage_time_sel
> >interface
On 1/30/2013 3:37 PM, Anson Huang wrote:
some of anatop's regulators(vppcpu, vddpu and vddsoc) have
register settings about LDO's step time, which will impact
the LDO ramp up speed, need to use set_voltage_time_sel
interface to add necessary delay everytime LDOs' voltage
is increased.
offset
some of anatop's regulators(vppcpu, vddpu and vddsoc) have
register settings about LDO's step time, which will impact
the LDO ramp up speed, need to use set_voltage_time_sel
interface to add necessary delay everytime LDOs' voltage
is increased.
offset 0x170:
bit [24-25]: vddcpu
bit [26-27]: vddpu
some of anatop's regulators(vppcpu, vddpu and vddsoc) have
register settings about LDO's step time, which will impact
the LDO ramp up speed, need to use set_voltage_time_sel
interface to add necessary delay everytime LDOs' voltage
is increased.
offset 0x170:
bit [24-25]: vddcpu
bit [26-27]: vddpu
On 1/30/2013 3:37 PM, Anson Huang wrote:
some of anatop's regulators(vppcpu, vddpu and vddsoc) have
register settings about LDO's step time, which will impact
the LDO ramp up speed, need to use set_voltage_time_sel
interface to add necessary delay everytime LDOs' voltage
is increased.
offset
On Wed, Jan 30, 2013 at 02:30:47PM -0700, Troy Kisky wrote:
On 1/30/2013 3:37 PM, Anson Huang wrote:
some of anatop's regulators(vppcpu, vddpu and vddsoc) have
register settings about LDO's step time, which will impact
the LDO ramp up speed, need to use set_voltage_time_sel
interface to add
6 matches
Mail list logo