[PATCH 2/3] ARM: dts: mvebu: set reduced-width property for SDRAM on 98dx3236

2017-08-06 Thread Chris Packham
Because the 98dx3236 and similar SoCs are switch chips with integrated CPUs they use a reduced pin count for the SDRAM interface. As such "full" with is 32-bits and "half" width is 16-bits (as opposed to 64/32 on the discrete SoC). Set the reduced-width property on the sdramc node to indicate

[PATCH 2/3] ARM: dts: mvebu: set reduced-width property for SDRAM on 98dx3236

2017-08-06 Thread Chris Packham
Because the 98dx3236 and similar SoCs are switch chips with integrated CPUs they use a reduced pin count for the SDRAM interface. As such "full" with is 32-bits and "half" width is 16-bits (as opposed to 64/32 on the discrete SoC). Set the reduced-width property on the sdramc node to indicate