Re: [dm-devel] [PATCH 2/3] Introduce percpu rw semaphores

2012-08-01 Thread Mikulas Patocka
On Sun, 29 Jul 2012, Eric Dumazet wrote: > On Sun, 2012-07-29 at 12:10 +0200, Eric Dumazet wrote: > > > You can probably design something needing no more than 4 bytes per cpu, > > and this thing could use non locked operations as bonus. > > > > like the following ... > > Coming back from my

Re: [dm-devel] [PATCH 2/3] Introduce percpu rw semaphores

2012-08-01 Thread Paul E. McKenney
On Mon, Jul 30, 2012 at 08:00:19PM -0400, Mikulas Patocka wrote: > > > On Mon, 30 Jul 2012, Paul E. McKenney wrote: > > > On Sun, Jul 29, 2012 at 01:13:34AM -0400, Mikulas Patocka wrote: > > > On Sat, 28 Jul 2012, Eric Dumazet wrote: > > > > On Sat, 2012-07-28 at 12:41 -0400, Mikulas Patocka

Re: [dm-devel] [PATCH 2/3] Introduce percpu rw semaphores

2012-08-01 Thread Paul E. McKenney
On Mon, Jul 30, 2012 at 08:00:19PM -0400, Mikulas Patocka wrote: On Mon, 30 Jul 2012, Paul E. McKenney wrote: On Sun, Jul 29, 2012 at 01:13:34AM -0400, Mikulas Patocka wrote: On Sat, 28 Jul 2012, Eric Dumazet wrote: On Sat, 2012-07-28 at 12:41 -0400, Mikulas Patocka wrote: [ .

Re: [dm-devel] [PATCH 2/3] Introduce percpu rw semaphores

2012-08-01 Thread Mikulas Patocka
On Sun, 29 Jul 2012, Eric Dumazet wrote: On Sun, 2012-07-29 at 12:10 +0200, Eric Dumazet wrote: You can probably design something needing no more than 4 bytes per cpu, and this thing could use non locked operations as bonus. like the following ... Coming back from my bike ride,

Re: [dm-devel] [PATCH 2/3] Introduce percpu rw semaphores

2012-07-30 Thread Mikulas Patocka
On Mon, 30 Jul 2012, Paul E. McKenney wrote: > On Sun, Jul 29, 2012 at 01:13:34AM -0400, Mikulas Patocka wrote: > > On Sat, 28 Jul 2012, Eric Dumazet wrote: > > > On Sat, 2012-07-28 at 12:41 -0400, Mikulas Patocka wrote: > > [ . . . ] > > > > (bdev->bd_block_size should be read exactly once )

Re: [dm-devel] [PATCH 2/3] Introduce percpu rw semaphores

2012-07-30 Thread Paul E. McKenney
On Sun, Jul 29, 2012 at 01:13:34AM -0400, Mikulas Patocka wrote: > On Sat, 28 Jul 2012, Eric Dumazet wrote: > > On Sat, 2012-07-28 at 12:41 -0400, Mikulas Patocka wrote: [ . . . ] > > (bdev->bd_block_size should be read exactly once ) > > Rewrite all direct and non-direct io code so that it

Re: [dm-devel] [PATCH 2/3] Introduce percpu rw semaphores

2012-07-30 Thread Paul E. McKenney
On Sun, Jul 29, 2012 at 01:13:34AM -0400, Mikulas Patocka wrote: On Sat, 28 Jul 2012, Eric Dumazet wrote: On Sat, 2012-07-28 at 12:41 -0400, Mikulas Patocka wrote: [ . . . ] (bdev-bd_block_size should be read exactly once ) Rewrite all direct and non-direct io code so that it reads block

Re: [dm-devel] [PATCH 2/3] Introduce percpu rw semaphores

2012-07-30 Thread Mikulas Patocka
On Mon, 30 Jul 2012, Paul E. McKenney wrote: On Sun, Jul 29, 2012 at 01:13:34AM -0400, Mikulas Patocka wrote: On Sat, 28 Jul 2012, Eric Dumazet wrote: On Sat, 2012-07-28 at 12:41 -0400, Mikulas Patocka wrote: [ . . . ] (bdev-bd_block_size should be read exactly once ) Rewrite

Re: [dm-devel] [PATCH 2/3] Introduce percpu rw semaphores

2012-07-29 Thread Eric Dumazet
On Sun, 2012-07-29 at 12:10 +0200, Eric Dumazet wrote: > You can probably design something needing no more than 4 bytes per cpu, > and this thing could use non locked operations as bonus. > > like the following ... Coming back from my bike ride, here is a more polished version with proper

Re: [dm-devel] [PATCH 2/3] Introduce percpu rw semaphores

2012-07-29 Thread Eric Dumazet
On Sun, 2012-07-29 at 01:13 -0400, Mikulas Patocka wrote: > Each cpu should have its own rw semaphore in its cache, so I don't see a > problem there. > > When you change block size, all 4096 rw semaphores are locked for write, > but changing block size is not a performance sensitive operation.

Re: [dm-devel] [PATCH 2/3] Introduce percpu rw semaphores

2012-07-29 Thread Eric Dumazet
On Sun, 2012-07-29 at 01:13 -0400, Mikulas Patocka wrote: Each cpu should have its own rw semaphore in its cache, so I don't see a problem there. When you change block size, all 4096 rw semaphores are locked for write, but changing block size is not a performance sensitive operation.

Re: [dm-devel] [PATCH 2/3] Introduce percpu rw semaphores

2012-07-29 Thread Eric Dumazet
On Sun, 2012-07-29 at 12:10 +0200, Eric Dumazet wrote: You can probably design something needing no more than 4 bytes per cpu, and this thing could use non locked operations as bonus. like the following ... Coming back from my bike ride, here is a more polished version with proper

Re: [dm-devel] [PATCH 2/3] Introduce percpu rw semaphores

2012-07-28 Thread Mikulas Patocka
On Sat, 28 Jul 2012, Eric Dumazet wrote: > On Sat, 2012-07-28 at 12:41 -0400, Mikulas Patocka wrote: > > Introduce percpu rw semaphores > > > > When many CPUs are locking a rw semaphore for read concurrently, cache > > line bouncing occurs. When a CPU acquires rw semaphore for read, the > >

Re: [PATCH 2/3] Introduce percpu rw semaphores

2012-07-28 Thread Eric Dumazet
On Sat, 2012-07-28 at 12:41 -0400, Mikulas Patocka wrote: > Introduce percpu rw semaphores > > When many CPUs are locking a rw semaphore for read concurrently, cache > line bouncing occurs. When a CPU acquires rw semaphore for read, the > CPU writes to the cache line holding the semaphore.

[PATCH 2/3] Introduce percpu rw semaphores

2012-07-28 Thread Mikulas Patocka
Introduce percpu rw semaphores When many CPUs are locking a rw semaphore for read concurrently, cache line bouncing occurs. When a CPU acquires rw semaphore for read, the CPU writes to the cache line holding the semaphore. Consequently, the cache line is being moved between CPUs and this slows

[PATCH 2/3] Introduce percpu rw semaphores

2012-07-28 Thread Mikulas Patocka
Introduce percpu rw semaphores When many CPUs are locking a rw semaphore for read concurrently, cache line bouncing occurs. When a CPU acquires rw semaphore for read, the CPU writes to the cache line holding the semaphore. Consequently, the cache line is being moved between CPUs and this slows

Re: [PATCH 2/3] Introduce percpu rw semaphores

2012-07-28 Thread Eric Dumazet
On Sat, 2012-07-28 at 12:41 -0400, Mikulas Patocka wrote: Introduce percpu rw semaphores When many CPUs are locking a rw semaphore for read concurrently, cache line bouncing occurs. When a CPU acquires rw semaphore for read, the CPU writes to the cache line holding the semaphore.

Re: [dm-devel] [PATCH 2/3] Introduce percpu rw semaphores

2012-07-28 Thread Mikulas Patocka
On Sat, 28 Jul 2012, Eric Dumazet wrote: On Sat, 2012-07-28 at 12:41 -0400, Mikulas Patocka wrote: Introduce percpu rw semaphores When many CPUs are locking a rw semaphore for read concurrently, cache line bouncing occurs. When a CPU acquires rw semaphore for read, the CPU writes to