On Thu, Feb 18, 2016 at 07:15:54AM -0800, Eduardo Valentin wrote:
> Folks,
>
> > > I think the problem is, that Eduardo wants to see the hierachical thermal
> > > zones being used. But there is still a discussion ongoing [1].
> >
> > It seems the original Author lost interest in the hierarchical
Folks,
On Thu, Feb 18, 2016 at 11:56:03AM +0100, Sascha Hauer wrote:
> On Wed, Feb 17, 2016 at 06:05:57PM +0100, Matthias Brugger wrote:
> >
> >
> > On 15/02/16 03:14, Daniel Kurtz wrote:
> > >On Mon, Feb 15, 2016 at 10:11 AM, Daniel Kurtz
> > >wrote:
> > >>Hi Eduardo, Sascha,
> > >>
> > A
Hi Sascha,
On Thu, Feb 18, 2016 at 11:56:03AM +0100, Sascha Hauer wrote:
> On Wed, Feb 17, 2016 at 06:05:57PM +0100, Matthias Brugger wrote:
> > On 15/02/16 03:14, Daniel Kurtz wrote:
> > >On Mon, Feb 15, 2016 at 10:11 AM, Daniel Kurtz
> > >wrote:
> > >>Hi Eduardo, Sascha,
> > >>
> > Any inp
On Wed, Feb 17, 2016 at 06:05:57PM +0100, Matthias Brugger wrote:
>
>
> On 15/02/16 03:14, Daniel Kurtz wrote:
> >On Mon, Feb 15, 2016 at 10:11 AM, Daniel Kurtz wrote:
> >>Hi Eduardo, Sascha,
> >>
> Any input on this? I really like to get this driver upstream as it is
> currently blockin
On 15/02/16 03:14, Daniel Kurtz wrote:
On Mon, Feb 15, 2016 at 10:11 AM, Daniel Kurtz wrote:
Hi Eduardo, Sascha,
On Mon, Feb 1, 2016 at 10:54 AM, Eddie Huang wrote:
On Tue, 2016-01-19 at 15:29 +0800, Sascha Hauer wrote:
Eduardo,
On Mon, Jan 04, 2016 at 03:19:40PM +0100, Sascha Hauer wro
On Mon, Feb 15, 2016 at 10:11 AM, Daniel Kurtz wrote:
> Hi Eduardo, Sascha,
>
> On Mon, Feb 1, 2016 at 10:54 AM, Eddie Huang wrote:
>>
>> On Tue, 2016-01-19 at 15:29 +0800, Sascha Hauer wrote:
>> > Eduardo,
>> >
>> > On Mon, Jan 04, 2016 at 03:19:40PM +0100, Sascha Hauer wrote:
>> > > Hi Eduardo,
Hi Eduardo, Sascha,
On Mon, Feb 1, 2016 at 10:54 AM, Eddie Huang wrote:
>
> On Tue, 2016-01-19 at 15:29 +0800, Sascha Hauer wrote:
> > Eduardo,
> >
> > On Mon, Jan 04, 2016 at 03:19:40PM +0100, Sascha Hauer wrote:
> > > Hi Eduardo,
> > >
> > > >
> > > > That should remove the policy of computing
On Tue, 2016-01-19 at 15:29 +0800, Sascha Hauer wrote:
> Eduardo,
>
> On Mon, Jan 04, 2016 at 03:19:40PM +0100, Sascha Hauer wrote:
> > Hi Eduardo,
> >
> > >
> > > That should remove the policy of computing the maximum from this driver.
> > > Please have a look on the work being done [1] to add
On Mon, Jan 4, 2016 at 10:31 PM, Sascha Hauer wrote:
> On Mon, Dec 21, 2015 at 12:07:58PM +0800, Daniel Kurtz wrote:
>> Hi Sascha,
>>
>> One nit below that can be fixed up later, or now if you don't plan to
>> spin this driver to
>> address Eduardo's feedback...
>>
>> On Mon, Nov 30, 2015 at 7:42
On Mon, Dec 21, 2015 at 12:07:58PM +0800, Daniel Kurtz wrote:
> Hi Sascha,
>
> One nit below that can be fixed up later, or now if you don't plan to
> spin this driver to
> address Eduardo's feedback...
>
> On Mon, Nov 30, 2015 at 7:42 PM, Sascha Hauer wrote:
> > This adds support for the Mediat
Hi Eduardo,
On Thu, Dec 17, 2015 at 11:33:33AM -0800, Eduardo Valentin wrote:
> Sascha,
>
> Yeah, sorry for the long delay. I was planing on applying this patch for
> the next merge window, but it just came across one point, see below.
>
> On Mon, Nov 30, 2015 at 12:42:32PM +0100, Sascha Hauer w
Hi Sascha,
One nit below that can be fixed up later, or now if you don't plan to
spin this driver to
address Eduardo's feedback...
On Mon, Nov 30, 2015 at 7:42 PM, Sascha Hauer wrote:
> This adds support for the Mediatek thermal controller found on MT8173
> and likely other SoCs.
> The controlle
Sascha,
Yeah, sorry for the long delay. I was planing on applying this patch for
the next merge window, but it just came across one point, see below.
On Mon, Nov 30, 2015 at 12:42:32PM +0100, Sascha Hauer wrote:
> This adds support for the Mediatek thermal controller found on MT8173
> +static con
This adds support for the Mediatek thermal controller found on MT8173
and likely other SoCs.
The controller is a bit special. It does not have its own ADC, instead
it controls the on-SoC AUXADC via AHB bus accesses. For this reason
we need the physical address of the AUXADC. Also it controls a mux
On Tue, Nov 24, 2015 at 02:06:09PM +0800, dawei chien wrote:
> Hi Sascha,
>
> > +static int mtk_thermal_get_calibration_data(struct device *dev, struct
> > mtk_thermal *mt)
> > +{
> > + struct nvmem_cell *cell;
> > + u32 *buf;
> > + size_t len;
> > + int i, ret;
> > + /* Start with defa
Hi Sascha,
On Wed, 2015-11-18 at 09:24 +0100, Sascha Hauer wrote:
> This adds support for the Mediatek thermal controller found on MT8173
> and likely other SoCs.
> The controller is a bit special. It does not have its own ADC, instead
> it controls the on-SoC AUXADC via AHB bus accesses. For this
This adds support for the Mediatek thermal controller found on MT8173
and likely other SoCs.
The controller is a bit special. It does not have its own ADC, instead
it controls the on-SoC AUXADC via AHB bus accesses. For this reason
we need the physical address of the AUXADC. Also it controls a mux
On Fri, Nov 13, 2015 at 11:26:37AM +, Javi Merino wrote:
> On Fri, Nov 13, 2015 at 11:09:12AM +0100, Sascha Hauer wrote:
> > On Wed, Nov 11, 2015 at 08:27:47AM +0100, Sascha Hauer wrote:
> > > On Tue, Nov 10, 2015 at 10:26:30AM -0800, Eduardo Valentin wrote:
> > > > On Tue, Nov 10, 2015 at 12:0
On Mon, Nov 09, 2015 at 04:39:37PM +0200, Andy Shevchenko wrote:
> On Mon, Nov 9, 2015 at 12:13 PM, Sascha Hauer wrote:
> > This adds support for the Mediatek thermal controller found on MT8173
> > and likely other SoCs.
> > The controller is a bit special. It does not have its own ADC, instead
>
On Fri, Nov 13, 2015 at 11:09:12AM +0100, Sascha Hauer wrote:
> On Wed, Nov 11, 2015 at 08:27:47AM +0100, Sascha Hauer wrote:
> > On Tue, Nov 10, 2015 at 10:26:30AM -0800, Eduardo Valentin wrote:
> > > On Tue, Nov 10, 2015 at 12:05:54PM +, Javi Merino wrote:
> > > > On Mon, Nov 09, 2015 at 11:1
On Wed, Nov 11, 2015 at 08:27:47AM +0100, Sascha Hauer wrote:
> On Tue, Nov 10, 2015 at 10:26:30AM -0800, Eduardo Valentin wrote:
> > On Tue, Nov 10, 2015 at 12:05:54PM +, Javi Merino wrote:
> > > On Mon, Nov 09, 2015 at 11:13:32AM +0100, Sascha Hauer wrote:
> >
> >
> >
> > > > +
> > > > +/*
On Wed, Nov 11, 2015 at 08:27:47AM +0100, Sascha Hauer wrote:
> On Tue, Nov 10, 2015 at 10:26:30AM -0800, Eduardo Valentin wrote:
> > On Tue, Nov 10, 2015 at 12:05:54PM +, Javi Merino wrote:
> > > On Mon, Nov 09, 2015 at 11:13:32AM +0100, Sascha Hauer wrote:
> >
> >
> >
> > > > +
> > > > +/*
On Tue, Nov 10, 2015 at 10:26:30AM -0800, Eduardo Valentin wrote:
> On Tue, Nov 10, 2015 at 12:05:54PM +, Javi Merino wrote:
> > On Mon, Nov 09, 2015 at 11:13:32AM +0100, Sascha Hauer wrote:
>
>
>
> > > +
> > > +/*
> > > + * The MT8173 thermal controller has four banks. Each bank can read up
On Tue, Nov 10, 2015 at 12:05:54PM +, Javi Merino wrote:
> On Mon, Nov 09, 2015 at 11:13:32AM +0100, Sascha Hauer wrote:
> > +
> > +/*
> > + * The MT8173 thermal controller has four banks. Each bank can read up to
> > + * four temperature sensors simultaneously. The MT8173 has a total of 5
>
On Mon, Nov 09, 2015 at 11:13:32AM +0100, Sascha Hauer wrote:
> This adds support for the Mediatek thermal controller found on MT8173
> and likely other SoCs.
> The controller is a bit special. It does not have its own ADC, instead
> it controls the on-SoC AUXADC via AHB bus accesses. For this reas
On Mon, Nov 9, 2015 at 12:13 PM, Sascha Hauer wrote:
> This adds support for the Mediatek thermal controller found on MT8173
> and likely other SoCs.
> The controller is a bit special. It does not have its own ADC, instead
> it controls the on-SoC AUXADC via AHB bus accesses. For this reason
> we
This adds support for the Mediatek thermal controller found on MT8173
and likely other SoCs.
The controller is a bit special. It does not have its own ADC, instead
it controls the on-SoC AUXADC via AHB bus accesses. For this reason
we need the physical address of the AUXADC. Also it controls a mux
Sascha Hauer writes:
> Hi Punit,
>
> On Wed, Sep 30, 2015 at 10:36:14AM +0100, Punit Agrawal wrote:
>> Hi Sascha,
>>
>> Re-posting a comment from v7. Perhaps you missed it...
>
> Uh, sorry. In fact I didn't miss it and I thought I have answered it.
> Appearantly I haven't.
>
>> > + struct mtk_t
Hi Punit,
On Wed, Sep 30, 2015 at 10:36:14AM +0100, Punit Agrawal wrote:
> Hi Sascha,
>
> Re-posting a comment from v7. Perhaps you missed it...
Uh, sorry. In fact I didn't miss it and I thought I have answered it.
Appearantly I haven't.
> > + struct mtk_thermal *mt = bank->mt;
> > + int te
Hi Sascha,
Re-posting a comment from v7. Perhaps you missed it...
Sascha Hauer writes:
> This adds support for the Mediatek thermal controller found on MT8173
> and likely other SoCs.
> The controller is a bit special. It does not have its own ADC, instead
> it controls the on-SoC AUXADC via AH
Hi Vladimir,
On Wed, Sep 23, 2015 at 09:31:12PM +0300, Vladimir Zapolskiy wrote:
> Hi Sascha,
>
> in case of OF_DYNAMIC enabled of_parse_phandle() requires of_node_put(),
> which is fine to place right here.
>
> > + if (auxadc_phys_base == OF_BAD_ADDR) {
> > + dev_err(&pdev->dev, "Ca
Hi Eduardo,
On Tue, Sep 29, 2015 at 04:04:40PM -0700, Eduardo Valentin wrote:
> On Wed, Sep 23, 2015 at 03:37:42PM +0200, Sascha Hauer wrote:
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
>
> You dont seam to be using this
On Wed, Sep 23, 2015 at 03:37:42PM +0200, Sascha Hauer wrote:
> This adds support for the Mediatek thermal controller found on MT8173
> and likely other SoCs.
> The controller is a bit special. It does not have its own ADC, instead
> it controls the on-SoC AUXADC via AHB bus accesses. For this reas
Hi Sascha,
On 23.09.2015 16:37, Sascha Hauer wrote:
> This adds support for the Mediatek thermal controller found on MT8173
> and likely other SoCs.
> The controller is a bit special. It does not have its own ADC, instead
> it controls the on-SoC AUXADC via AHB bus accesses. For this reason
> we n
This adds support for the Mediatek thermal controller found on MT8173
and likely other SoCs.
The controller is a bit special. It does not have its own ADC, instead
it controls the on-SoC AUXADC via AHB bus accesses. For this reason
we need the physical address of the AUXADC. Also it controls a mux
On Tue, Sep 22, 2015 at 03:30:47PM +0800, Daniel Kurtz wrote:
> On Mon, Sep 14, 2015 at 3:32 PM, Daniel Kurtz wrote:
> >
> > Hi Sascha,
> >
> > On Mon, Aug 31, 2015 at 3:34 PM, Sascha Hauer
> > wrote:
> > > This adds support for the Mediatek thermal controller found on MT8173
> > > and likely ot
On Mon, Sep 14, 2015 at 3:32 PM, Daniel Kurtz wrote:
>
> Hi Sascha,
>
> On Mon, Aug 31, 2015 at 3:34 PM, Sascha Hauer wrote:
> > This adds support for the Mediatek thermal controller found on MT8173
> > and likely other SoCs.
> > The controller is a bit special. It does not have its own ADC, inst
Hi Sascha,
On Mon, Aug 31, 2015 at 3:34 PM, Sascha Hauer wrote:
> This adds support for the Mediatek thermal controller found on MT8173
> and likely other SoCs.
> The controller is a bit special. It does not have its own ADC, instead
> it controls the on-SoC AUXADC via AHB bus accesses. For this
This adds support for the Mediatek thermal controller found on MT8173
and likely other SoCs.
The controller is a bit special. It does not have its own ADC, instead
it controls the on-SoC AUXADC via AHB bus accesses. For this reason
we need the physical address of the AUXADC. Also it controls a mux
Hi Sascha,
One comment below -
Sascha Hauer writes:
> This adds support for the Mediatek thermal controller found on MT8173
> and likely other SoCs.
> The controller is a bit special. It does not have its own ADC, instead
> it controls the on-SoC AUXADC via AHB bus accesses. For this reason
> w
This adds support for the Mediatek thermal controller found on MT8173
and likely other SoCs.
The controller is a bit special. It does not have its own ADC, instead
it controls the on-SoC AUXADC via AHB bus accesses. For this reason
we need the physical address of the AUXADC. Also it controls a mux
On 08/26/2015 03:54 PM, Sascha Hauer wrote:
On Fri, Aug 21, 2015 at 01:12:23AM +0200, Daniel Lezcano wrote:
On 08/20/2015 10:06 AM, Sascha Hauer wrote:
This adds support for the Mediatek thermal controller found on MT8173
and likely other SoCs.
The controller is a bit special. It does not have
This adds support for the Mediatek thermal controller found on MT8173
and likely other SoCs.
The controller is a bit special. It does not have its own ADC, instead
it controls the on-SoC AUXADC via AHB bus accesses. For this reason
we need the physical address of the AUXADC. Also it controls a mux
On Fri, Aug 21, 2015 at 01:12:23AM +0200, Daniel Lezcano wrote:
> On 08/20/2015 10:06 AM, Sascha Hauer wrote:
> >This adds support for the Mediatek thermal controller found on MT8173
> >and likely other SoCs.
> >The controller is a bit special. It does not have its own ADC, instead
> >it controls t
Hi Sascha,
On Thu, Aug 20, 2015 at 4:06 PM, Sascha Hauer wrote:
> This adds support for the Mediatek thermal controller found on MT8173
> and likely other SoCs.
> The controller is a bit special. It does not have its own ADC, instead
> it controls the on-SoC AUXADC via AHB bus accesses. For this
On Thu, Aug 20, 2015 at 03:20:52PM -0700, Eduardo Valentin wrote:
> On Thu, Aug 20, 2015 at 10:06:01AM +0200, Sascha Hauer wrote:
> > +
> > + /*
> > +* These calibration values should finally be provided by the
> > +* firmware or fuses. For now use default values.
> > +*/
> > + mt->
On 08/20/2015 10:06 AM, Sascha Hauer wrote:
This adds support for the Mediatek thermal controller found on MT8173
and likely other SoCs.
The controller is a bit special. It does not have its own ADC, instead
it controls the on-SoC AUXADC via AHB bus accesses. For this reason
we need the physical
On 08/21/2015 12:20 AM, Eduardo Valentin wrote:
On Thu, Aug 20, 2015 at 10:06:01AM +0200, Sascha Hauer wrote:
This adds support for the Mediatek thermal controller found on MT8173
and likely other SoCs.
The controller is a bit special. It does not have its own ADC, instead
it controls the on-SoC
On Thu, Aug 20, 2015 at 10:06:01AM +0200, Sascha Hauer wrote:
> This adds support for the Mediatek thermal controller found on MT8173
> and likely other SoCs.
> The controller is a bit special. It does not have its own ADC, instead
> it controls the on-SoC AUXADC via AHB bus accesses. For this reas
This adds support for the Mediatek thermal controller found on MT8173
and likely other SoCs.
The controller is a bit special. It does not have its own ADC, instead
it controls the on-SoC AUXADC via AHB bus accesses. For this reason
we need the physical address of the AUXADC. Also it controls a mux
On Tue, Aug 11, 2015 at 03:03:53PM +0800, Daniel Kurtz wrote:
> Hi Sascha,
>
> I think this patch looks very good now, just some very tiny things inline...
>
> > +
> > +struct mtk_thermal {
> > + struct device *dev;
> > + void __iomem *thermal_base;
> > +
> > + struct clk *clk_p
Hi Sascha,
I think this patch looks very good now, just some very tiny things inline...
On Fri, Aug 7, 2015 at 9:55 PM, Sascha Hauer wrote:
> This adds support for the Mediatek thermal controller found on MT8173
> and likely other SoCs.
> The controller is a bit special. It does not have its own
This adds support for the Mediatek thermal controller found on MT8173
and likely other SoCs.
The controller is a bit special. It does not have its own ADC, instead
it controls the on-SoC AUXADC via AHB bus accesses. For this reason
we need the physical address of the AUXADC. Also it controls a mux
On Thu, Aug 06, 2015 at 02:02:30AM +0800, Daniel Kurtz wrote:
>
> > +
> > +#define THERMAL_NAME"mtk-thermal"
> > +
> > +struct mtk_thermal;
> > +
> > +struct mtk_thermal_bank {
> > + struct mtk_thermal *mt;
> > + struct thermal_zone_device *tz;
>
> A better name for this field is
On Wed, Aug 5, 2015 at 8:25 PM, Sascha Hauer wrote:
> This adds support for the Mediatek thermal controller found on MT8173
> and likely other SoCs.
> The controller is a bit special. It does not have its own ADC, instead
> it controls the on-SoC AUXADC via AHB bus accesses. For this reason
> we n
This adds support for the Mediatek thermal controller found on MT8173
and likely other SoCs.
The controller is a bit special. It does not have its own ADC, instead
it controls the on-SoC AUXADC via AHB bus accesses. For this reason
we need the physical address of the AUXADC. Also it controls a mux
On Tue, Jul 21, 2015 at 11:13:22PM +0800, Daniel Kurtz wrote:
> Hi Sascha,
>
> Review comments inline...
>
> > + *
> > + * This converts the raw ADC value to mcelsius using the SoC specific
> > + * calibration constants
> > + */
> > +static int raw_to_mcelsius(struct mtk_thermal *mt, u32 raw)
> >
Hi Sascha,
Review comments inline...
On Tue, Jul 21, 2015 at 3:59 PM, Sascha Hauer wrote:
> This adds support for the Mediatek thermal controller found on MT8173
> and likely other SoCs.
> The controller is a bit special. It does not have its own ADC, instead
> it controls the on-SoC AUXADC via
This adds support for the Mediatek thermal controller found on MT8173
and likely other SoCs.
The controller is a bit special. It does not have its own ADC, instead
it controls the on-SoC AUXADC via AHB bus accesses. For this reason
we need the physical address of the AUXADC. Also it controls a mux
This adds support for the Mediatek thermal controller found on MT8173
and likely other SoCs.
The controller is a bit special. It does not have its own ADC, instead
it controls the on-SoC AUXADC via AHB bus accesses. For this reason
we need the physical address of the AUXADC. Also it controls a mux
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