Re: [PATCH 2/4] x86: Prepare vm86 tasks to handle User-Mode Instruction Prevention

On Tue, 2016-11-08 at 18:00 +0100, Peter Zijlstra wrote: > > > + } > > > +#endif > > > + > > > > NAK. If this code is going to exist, it needs to be deeply buried > in > > some unlikely if statement that already exists. There's no good > > reason to penalize all context switches to

Re: [PATCH 2/4] x86: Prepare vm86 tasks to handle User-Mode Instruction Prevention

On Tue, 2016-11-08 at 18:00 +0100, Peter Zijlstra wrote: > > > + } > > > +#endif > > > + > > > > NAK. If this code is going to exist, it needs to be deeply buried > in > > some unlikely if statement that already exists. There's no good > > reason to penalize all context switches to

Re: [PATCH 2/4] x86: Prepare vm86 tasks to handle User-Mode Instruction Prevention

On Tue, Nov 08, 2016 at 08:01:39AM -0800, Andy Lutomirski wrote: > > diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c > > index 0888a87..32b7301 100644 > > --- a/arch/x86/kernel/process.c > > +++ b/arch/x86/kernel/process.c > > @@ -233,6 +233,16 @@ void __switch_to_xtra(struct

Re: [PATCH 2/4] x86: Prepare vm86 tasks to handle User-Mode Instruction Prevention

On Tue, Nov 08, 2016 at 08:01:39AM -0800, Andy Lutomirski wrote: > > diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c > > index 0888a87..32b7301 100644 > > --- a/arch/x86/kernel/process.c > > +++ b/arch/x86/kernel/process.c > > @@ -233,6 +233,16 @@ void __switch_to_xtra(struct

Re: [PATCH 2/4] x86: Prepare vm86 tasks to handle User-Mode Instruction Prevention

On Mon, Nov 7, 2016 at 10:12 PM, Ricardo Neri wrote: > User-Mode Instruction Prevention (UMIP) is a security feature in new Intel > processors that causes a general protection exception if certain > instructions are executed in user mode (CPL > 0). > >

Re: [PATCH 2/4] x86: Prepare vm86 tasks to handle User-Mode Instruction Prevention

On Mon, Nov 7, 2016 at 10:12 PM, Ricardo Neri wrote: > User-Mode Instruction Prevention (UMIP) is a security feature in new Intel > processors that causes a general protection exception if certain > instructions are executed in user mode (CPL > 0). > > Unfortunately, some of the instructions that

[PATCH 2/4] x86: Prepare vm86 tasks to handle User-Mode Instruction Prevention

User-Mode Instruction Prevention (UMIP) is a security feature in new Intel processors that causes a general protection exception if certain instructions are executed in user mode (CPL > 0). Unfortunately, some of the instructions that are protected by UMIP (i.e., SGDT, SIDT and SMSW) are used by

[PATCH 2/4] x86: Prepare vm86 tasks to handle User-Mode Instruction Prevention

User-Mode Instruction Prevention (UMIP) is a security feature in new Intel processors that causes a general protection exception if certain instructions are executed in user mode (CPL > 0). Unfortunately, some of the instructions that are protected by UMIP (i.e., SGDT, SIDT and SMSW) are used by