Re: [PATCH 3/4] ARM: dts: Add UART2 dt node for Exynos3250 SoC
On 11.08.2015 12:46, Chanwoo Choi wrote: > This patch add the uart2 devicetree node for Exynos3250 SoC. "This patch adds the UART2 Device Tree node..." > > Cc: Kukjin Kim > Cc: Krzysztof Kozlowski > Signed-off-by: Chanwoo Choi > --- > arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 7 +++ > arch/arm/boot/dts/exynos3250.dtsi | 12 > 2 files changed, 19 insertions(+) Reviewed-by: Krzysztof Kozlowski Best regards, Krzysztof -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 3/4] ARM: dts: Add UART2 dt node for Exynos3250 SoC
On 11.08.2015 12:46, Chanwoo Choi wrote: This patch add the uart2 devicetree node for Exynos3250 SoC. This patch adds the UART2 Device Tree node... Cc: Kukjin Kim kg...@kernel.org Cc: Krzysztof Kozlowski k.kozlow...@samsung.com Signed-off-by: Chanwoo Choi cw00.c...@samsung.com --- arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 7 +++ arch/arm/boot/dts/exynos3250.dtsi | 12 2 files changed, 19 insertions(+) Reviewed-by: Krzysztof Kozlowski k.kozlow...@samsung.com Best regards, Krzysztof -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 3/4] ARM: dts: Add UART2 dt node for Exynos3250 SoC
This patch add the uart2 devicetree node for Exynos3250 SoC.
Cc: Kukjin Kim
Cc: Krzysztof Kozlowski
Signed-off-by: Chanwoo Choi
---
arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 7 +++
arch/arm/boot/dts/exynos3250.dtsi | 12
2 files changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi
b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi
index 5ab81c39e2c9..eac1d21c10d4 100644
--- a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi
@@ -120,6 +120,13 @@
samsung,pin-drv = <0>;
};
+ uart2_data: uart2-data {
+ samsung,pins = "gpa1-0", "gpa1-1";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
i2c3_bus: i2c3-bus {
samsung,pins = "gpa1-2", "gpa1-3";
samsung,pin-function = <3>;
diff --git a/arch/arm/boot/dts/exynos3250.dtsi
b/arch/arm/boot/dts/exynos3250.dtsi
index 2db99433e17f..02f3250766c9 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -42,6 +42,7 @@
i2c7 = _7;
serial0 = _0;
serial1 = _1;
+ serial2 = _2;
};
cpus {
@@ -435,6 +436,17 @@
status = "disabled";
};
+ serial_2: serial@1382 {
+ compatible = "samsung,exynos4210-uart";
+ reg = <0x1382 0x100>;
+ interrupts = <0 111 0>;
+ clocks = < CLK_UART2>, < CLK_SCLK_UART2>;
+ clock-names = "uart", "clk_uart_baud0";
+ pinctrl-names = "default";
+ pinctrl-0 = <_data>;
+ status = "disabled";
+ };
+
i2c_0: i2c@1386 {
#address-cells = <1>;
#size-cells = <0>;
--
1.8.5.5
--
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[PATCH 3/4] ARM: dts: Add UART2 dt node for Exynos3250 SoC
This patch add the uart2 devicetree node for Exynos3250 SoC.
Cc: Kukjin Kim kg...@kernel.org
Cc: Krzysztof Kozlowski k.kozlow...@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
---
arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 7 +++
arch/arm/boot/dts/exynos3250.dtsi | 12
2 files changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi
b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi
index 5ab81c39e2c9..eac1d21c10d4 100644
--- a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi
@@ -120,6 +120,13 @@
samsung,pin-drv = 0;
};
+ uart2_data: uart2-data {
+ samsung,pins = gpa1-0, gpa1-1;
+ samsung,pin-function = 2;
+ samsung,pin-pud = 0;
+ samsung,pin-drv = 0;
+ };
+
i2c3_bus: i2c3-bus {
samsung,pins = gpa1-2, gpa1-3;
samsung,pin-function = 3;
diff --git a/arch/arm/boot/dts/exynos3250.dtsi
b/arch/arm/boot/dts/exynos3250.dtsi
index 2db99433e17f..02f3250766c9 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -42,6 +42,7 @@
i2c7 = i2c_7;
serial0 = serial_0;
serial1 = serial_1;
+ serial2 = serial_2;
};
cpus {
@@ -435,6 +436,17 @@
status = disabled;
};
+ serial_2: serial@1382 {
+ compatible = samsung,exynos4210-uart;
+ reg = 0x1382 0x100;
+ interrupts = 0 111 0;
+ clocks = cmu CLK_UART2, cmu CLK_SCLK_UART2;
+ clock-names = uart, clk_uart_baud0;
+ pinctrl-names = default;
+ pinctrl-0 = uart2_data;
+ status = disabled;
+ };
+
i2c_0: i2c@1386 {
#address-cells = 1;
#size-cells = 0;
--
1.8.5.5
--
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