Hi Linus,
Thanks for all of the comments.
On Thu, 5 Nov 2020 at 18:42, Linus Walleij wrote:
>
> On Thu, Nov 5, 2020 at 10:31 AM Willy Tarreau wrote:
> > On Thu, Nov 05, 2020 at 10:21:27AM +0100, Linus Walleij wrote:
>
> > > If your SoC is only used by OpenWrt (like ixp4xx) then it is fine
> >
On Thu, Nov 5, 2020 at 10:31 AM Willy Tarreau wrote:
> On Thu, Nov 05, 2020 at 10:21:27AM +0100, Linus Walleij wrote:
> > If your SoC is only used by OpenWrt (like ixp4xx) then it is fine
> > to just use bool because that distribution is always built with an
> > image for a specific hardware,
On Thu, Nov 05, 2020 at 10:21:27AM +0100, Linus Walleij wrote:
> If your SoC is only used by OpenWrt (like ixp4xx) then it is fine
> to just use bool because that distribution is always built with an
> image for a specific hardware, whereas distributions are generic.
Speaking for myself (since I
On Wed, Oct 21, 2020 at 1:07 PM Daniel Palmer wrote:
> Sorry to pester you again...
Don't worry. I'm more worried that my replies are slow.
> Before I do that I have a question that maybe you could help me with:
> Andy noted a few times that I have this driver as a built in driver
> and not a
Hi Linus,
Sorry to pester you again...
On Sat, 17 Oct 2020 at 01:56, Linus Walleij wrote:
> > + gpiochip->to_irq = msc313_gpio_to_irq;
> > + gpiochip->base = -1;
> > + gpiochip->ngpio = gpio->gpio_data->num;
> > + gpiochip->names = gpio->gpio_data->names;
> > +
> > +
Hi Linus
On Sat, 17 Oct 2020 at 01:56, Linus Walleij wrote:
> (...)
>
> > +config GPIO_MSC313
> > + bool "MStar MSC313 GPIO support"
> > + default y if ARCH_MSTARV7
> > + depends on ARCH_MSTARV7
> > + select GPIO_GENERIC
>
> Selecting GPIO_GENERIC, that is good.
> But
Hi Daniel,
thanks for your patch!
Some comments below, we need some work but keep at it.
On Sun, Oct 11, 2020 at 4:48 AM Daniel Palmer wrote:
> This adds a driver that supports the GPIO block found in
> MStar/SigmaStar ARMv7 SoCs.
>
> The controller seems to support 128 lines but where they
>
This adds a driver that supports the GPIO block found in
MStar/SigmaStar ARMv7 SoCs.
The controller seems to support 128 lines but where they
are wired up differs between chips and no currently known
chip uses anywhere near 128 lines so there needs to be some
per-chip data to collect together
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