On 1/11/2018 7:32 PM, Ashok Raj wrote:
> From: Paolo Bonzini
>
> Direct access to MSR_IA32_SPEC_CTRL is important
> for performance. Allow load/store of MSR_IA32_SPEC_CTRL, restore guest
> IBRS on VM entry and set restore host values on VM exit.
> it yet).
>
> TBD: need to check msr's can be pa
On 12/01/2018 02:32, Ashok Raj wrote:
> From: Paolo Bonzini
>
> Direct access to MSR_IA32_SPEC_CTRL is important
> for performance. Allow load/store of MSR_IA32_SPEC_CTRL, restore guest
> IBRS on VM entry and set restore host values on VM exit.
> it yet).
>
> TBD: need to check msr's can be pas
On Fri, 2018-01-12 at 10:58 +0100, Peter Zijlstra wrote:
> I disagree, and if you worry about that, we should write a testcase. But
> we rely on GCC for correct code generation in lots of places, this isn't
> different.
It's different because it's not a *correctness* issue... unless we let
you mak
On Fri, Jan 12, 2018 at 07:23:53AM +, David Woodhouse wrote:
> On Thu, 2018-01-11 at 17:32 -0800, Ashok Raj wrote:
> >
> > @@ -4910,6 +4935,14 @@ static void svm_vcpu_run(struct kvm_vcpu
> > *vcpu)
> >
> > clgi();
> >
> > + if (boot_cpu_has(X86_FEATURE_SPEC_CTRL)) {
> > +
On Thu, 2018-01-11 at 17:32 -0800, Ashok Raj wrote:
>
> @@ -4910,6 +4935,14 @@ static void svm_vcpu_run(struct kvm_vcpu
> *vcpu)
>
> clgi();
>
> + if (boot_cpu_has(X86_FEATURE_SPEC_CTRL)) {
> + /*
> + * FIXME: lockdep_assert_irqs_disabled();
> +
From: Paolo Bonzini
Direct access to MSR_IA32_SPEC_CTRL is important
for performance. Allow load/store of MSR_IA32_SPEC_CTRL, restore guest
IBRS on VM entry and set restore host values on VM exit.
it yet).
TBD: need to check msr's can be passed through even if feature is not
emuerated by the CP
6 matches
Mail list logo
