Includes all the core infrastructure to measure the total_bytes and
bandwidth.
We have per socket counters for both total system wide L3 external bytes
and local socket memory-controller bytes. The OS does MSR writes to
MSR_IA32_QM_EVTSEL and MSR_IA32_QM_CTR to read the counters and uses the
IA32_
From: Tony Luck
Includes all the core infrastructure to measure the total_bytes and
bandwidth.
We have per socket counters for both total system wide L3 external bytes
and local socket memory-controller bytes. The OS does MSR writes to
MSR_IA32_QM_EVTSEL and MSR_IA32_QM_CTR to read the counters
On Mon, 7 Mar 2016, Peter Zijlstra wrote:
On Tue, Mar 01, 2016 at 03:48:26PM -0800, Vikas Shivappa wrote:
Lot of the scheduling code was taken out from Tony's patch and a 3-4
lines of change were added in the intel_cqm_event_read. Since the timer
is no more added on every context switch this
On Tue, 8 Mar 2016, Peter Zijlstra wrote:
On Mon, Mar 07, 2016 at 11:27:26PM +, Luck, Tony wrote:
+ bytes = mbm_current->interval_bytes * MSEC_PER_SEC;
+ do_div(bytes, diff_time);
+ mbm_current->bandwidth = bytes;
+ mbm_current->inte
On Mon, Mar 07, 2016 at 11:27:26PM +, Luck, Tony wrote:
> >> + bytes = mbm_current->interval_bytes * MSEC_PER_SEC;
> >> + do_div(bytes, diff_time);
> >> + mbm_current->bandwidth = bytes;
> >> + mbm_current->interval_bytes = 0;
> >> + mbm_current->int
>> +bytes = mbm_current->interval_bytes * MSEC_PER_SEC;
>> +do_div(bytes, diff_time);
>> +mbm_current->bandwidth = bytes;
>> +mbm_current->interval_bytes = 0;
>> +mbm_current->interval_start = cur_time;
>> +}
>>> +
>> +return mbm_c
On Tue, Mar 01, 2016 at 03:48:26PM -0800, Vikas Shivappa wrote:
> Lot of the scheduling code was taken out from Tony's patch and a 3-4
> lines of change were added in the intel_cqm_event_read. Since the timer
> is no more added on every context switch this change was made.
It this here to confuse
From: Tony Luck
Includes all the core infrastructure to measure the total_bytes and
bandwidth.
We have per socket counters for both total system wide L3 external bytes
and local socket memory-controller bytes. The current b/w is calculated
for a minimum diff time(time since it was last counted)
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