Hi,
Il 05/06/2018 12:51, Matwey V. Kornilov ha scritto:
Could I ask to split the series into fixes and new features? I see
that the fixes can be applied, probably it would be better to apply
them separately from discussing new features.
Sure, I'm going to send 2 different patchsets.
Thanks
Hi,
Il 05/06/2018 12:51, Matwey V. Kornilov ha scritto:
Could I ask to split the series into fixes and new features? I see
that the fixes can be applied, probably it would be better to apply
them separately from discussing new features.
Sure, I'm going to send 2 different patchsets.
Thanks
2018-06-04 21:50 GMT+03:00 Giulio Benetti :
> Il 04/06/2018 19:40, Matwey V. Kornilov ha scritto:
>>
>> 01.06.2018 15:40, Giulio Benetti пишет:
>>>
>>> Some 8250 ports only have TEMT interrupt, so current implementation
>>> can't work for ports without it. The only chance to make it work is to
>>>
2018-06-04 21:50 GMT+03:00 Giulio Benetti :
> Il 04/06/2018 19:40, Matwey V. Kornilov ha scritto:
>>
>> 01.06.2018 15:40, Giulio Benetti пишет:
>>>
>>> Some 8250 ports only have TEMT interrupt, so current implementation
>>> can't work for ports without it. The only chance to make it work is to
>>>
Il 04/06/2018 19:40, Matwey V. Kornilov ha scritto:
01.06.2018 15:40, Giulio Benetti пишет:
Some 8250 ports only have TEMT interrupt, so current implementation
can't work for ports without it. The only chance to make it work is to
loop-read on LSR register.
With NO TEMT interrupt check if both
Il 04/06/2018 19:40, Matwey V. Kornilov ha scritto:
01.06.2018 15:40, Giulio Benetti пишет:
Some 8250 ports only have TEMT interrupt, so current implementation
can't work for ports without it. The only chance to make it work is to
loop-read on LSR register.
With NO TEMT interrupt check if both
01.06.2018 15:40, Giulio Benetti пишет:
> Some 8250 ports only have TEMT interrupt, so current implementation
> can't work for ports without it. The only chance to make it work is to
> loop-read on LSR register.
>
> With NO TEMT interrupt check if both TEMT and THRE are set looping on
> LSR
01.06.2018 15:40, Giulio Benetti пишет:
> Some 8250 ports only have TEMT interrupt, so current implementation
> can't work for ports without it. The only chance to make it work is to
> loop-read on LSR register.
>
> With NO TEMT interrupt check if both TEMT and THRE are set looping on
> LSR
On Mon, 2018-06-04 at 13:50 +0200, Giulio Benetti wrote:
> Hi,
>
> Il 04/06/2018 13:38, Andy Shevchenko ha scritto:
> > On Mon, 2018-06-04 at 12:50 +0200, Giulio Benetti wrote:
> > > Hi,
> > >
> > > Il 04/06/2018 12:17, Andy Shevchenko ha scritto:
> > > > On Fri, 2018-06-01 at 14:40 +0200,
On Mon, 2018-06-04 at 13:50 +0200, Giulio Benetti wrote:
> Hi,
>
> Il 04/06/2018 13:38, Andy Shevchenko ha scritto:
> > On Mon, 2018-06-04 at 12:50 +0200, Giulio Benetti wrote:
> > > Hi,
> > >
> > > Il 04/06/2018 12:17, Andy Shevchenko ha scritto:
> > > > On Fri, 2018-06-01 at 14:40 +0200,
Hi,
Il 04/06/2018 13:38, Andy Shevchenko ha scritto:
On Mon, 2018-06-04 at 12:50 +0200, Giulio Benetti wrote:
Hi,
Il 04/06/2018 12:17, Andy Shevchenko ha scritto:
On Fri, 2018-06-01 at 14:40 +0200, Giulio Benetti wrote:
Some 8250 ports only have TEMT interrupt, so current
implementation
Hi,
Il 04/06/2018 13:38, Andy Shevchenko ha scritto:
On Mon, 2018-06-04 at 12:50 +0200, Giulio Benetti wrote:
Hi,
Il 04/06/2018 12:17, Andy Shevchenko ha scritto:
On Fri, 2018-06-01 at 14:40 +0200, Giulio Benetti wrote:
Some 8250 ports only have TEMT interrupt, so current
implementation
On Mon, 2018-06-04 at 12:50 +0200, Giulio Benetti wrote:
> Hi,
>
> Il 04/06/2018 12:17, Andy Shevchenko ha scritto:
> > On Fri, 2018-06-01 at 14:40 +0200, Giulio Benetti wrote:
> > > Some 8250 ports only have TEMT interrupt, so current
> > > implementation
> > > can't work for ports without it.
On Mon, 2018-06-04 at 12:50 +0200, Giulio Benetti wrote:
> Hi,
>
> Il 04/06/2018 12:17, Andy Shevchenko ha scritto:
> > On Fri, 2018-06-01 at 14:40 +0200, Giulio Benetti wrote:
> > > Some 8250 ports only have TEMT interrupt, so current
> > > implementation
> > > can't work for ports without it.
Hi,
Il 04/06/2018 12:17, Andy Shevchenko ha scritto:
On Fri, 2018-06-01 at 14:40 +0200, Giulio Benetti wrote:
Some 8250 ports only have TEMT interrupt, so current implementation
can't work for ports without it. The only chance to make it work is to
loop-read on LSR register.
With NO TEMT
Hi,
Il 04/06/2018 12:17, Andy Shevchenko ha scritto:
On Fri, 2018-06-01 at 14:40 +0200, Giulio Benetti wrote:
Some 8250 ports only have TEMT interrupt, so current implementation
can't work for ports without it. The only chance to make it work is to
loop-read on LSR register.
With NO TEMT
On Fri, 2018-06-01 at 14:40 +0200, Giulio Benetti wrote:
> Some 8250 ports only have TEMT interrupt, so current implementation
> can't work for ports without it. The only chance to make it work is to
> loop-read on LSR register.
>
> With NO TEMT interrupt check if both TEMT and THRE are set
On Fri, 2018-06-01 at 14:40 +0200, Giulio Benetti wrote:
> Some 8250 ports only have TEMT interrupt, so current implementation
> can't work for ports without it. The only chance to make it work is to
> loop-read on LSR register.
>
> With NO TEMT interrupt check if both TEMT and THRE are set
Some 8250 ports only have TEMT interrupt, so current implementation
can't work for ports without it. The only chance to make it work is to
loop-read on LSR register.
With NO TEMT interrupt check if both TEMT and THRE are set looping on
LSR register.
Signed-off-by: Giulio Benetti
---
Some 8250 ports only have TEMT interrupt, so current implementation
can't work for ports without it. The only chance to make it work is to
loop-read on LSR register.
With NO TEMT interrupt check if both TEMT and THRE are set looping on
LSR register.
Signed-off-by: Giulio Benetti
---
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