Re: [PATCH 5/5] Staging: comedi: dmm32at: Prefer using the BIT macro
On 08/06/16 06:30, Ravishankar Karkala Mallikarjunayya wrote: This fixes all occurences of (1< --- drivers/staging/comedi/drivers/dmm32at.c | 86 1 file changed, 43 insertions(+), 43 deletions(-) diff --git a/drivers/staging/comedi/drivers/dmm32at.c b/drivers/staging/comedi/drivers/dmm32at.c index 958c0d4..4ca6104 100644 --- a/drivers/staging/comedi/drivers/dmm32at.c +++ b/drivers/staging/comedi/drivers/dmm32at.c Most of these are fine, but... [snip] #define DMM32AT_CTRL_PAGE_8254(0 << 0) -#define DMM32AT_CTRL_PAGE_8255 (1 << 0) +#define DMM32AT_CTRL_PAGE_8255 BIT(0) #define DMM32AT_CTRL_PAGE_CALIB (3 << 0) That one makes the code less readable as the above three macros are for the same bitfield, and should have similar-looking macro expansions. [snip] #define DMM32AT_AI_CFG_SCINT_20US (0 << 4) -#define DMM32AT_AI_CFG_SCINT_15US (1 << 4) +#define DMM32AT_AI_CFG_SCINT_15US BIT(4) #define DMM32AT_AI_CFG_SCINT_10US (2 << 4) #define DMM32AT_AI_CFG_SCINT_5US (3 << 4) The same thing here. [snip] -- -=( Ian Abbott @ MEV Ltd.E-mail: )=- -=( Web: http://www.mev.co.uk/ )=-
[PATCH 5/5] Staging: comedi: dmm32at: Prefer using the BIT macro
This fixes all occurences of (1< --- drivers/staging/comedi/drivers/dmm32at.c | 86 1 file changed, 43 insertions(+), 43 deletions(-) diff --git a/drivers/staging/comedi/drivers/dmm32at.c b/drivers/staging/comedi/drivers/dmm32at.c index 958c0d4..4ca6104 100644 --- a/drivers/staging/comedi/drivers/dmm32at.c +++ b/drivers/staging/comedi/drivers/dmm32at.c @@ -46,73 +46,73 @@ #define DMM32AT_AI_START_CONV_REG 0x00 #define DMM32AT_AI_LSB_REG 0x00 #define DMM32AT_AUX_DOUT_REG 0x01 -#define DMM32AT_AUX_DOUT2 (1 << 2) /* J3.42 - OUT2 (OUT2EN) */ -#define DMM32AT_AUX_DOUT1 (1 << 1) /* J3.43 */ -#define DMM32AT_AUX_DOUT0 (1 << 0) /* J3.44 - OUT0 (OUT0EN) */ +#define DMM32AT_AUX_DOUT2 BIT(2) /* J3.42 - OUT2 (OUT2EN) */ +#define DMM32AT_AUX_DOUT1 BIT(1) /* J3.43 */ +#define DMM32AT_AUX_DOUT0 BIT(0) /* J3.44 - OUT0 (OUT0EN) */ #define DMM32AT_AI_MSB_REG 0x01 #define DMM32AT_AI_LO_CHAN_REG 0x02 #define DMM32AT_AI_HI_CHAN_REG 0x03 #define DMM32AT_AUX_DI_REG 0x04 -#define DMM32AT_AUX_DI_DACBUSY (1 << 7) -#define DMM32AT_AUX_DI_CALBUSY (1 << 6) -#define DMM32AT_AUX_DI3(1 << 3) /* J3.45 - ADCLK (CLKSEL) */ -#define DMM32AT_AUX_DI2(1 << 2) /* J3.46 - GATE12 (GT12EN) */ -#define DMM32AT_AUX_DI1(1 << 1) /* J3.47 - GATE0 (GT0EN) */ -#define DMM32AT_AUX_DI0(1 << 0) /* J3.48 - CLK0 (SRC0) */ +#define DMM32AT_AUX_DI_DACBUSY BIT(7) +#define DMM32AT_AUX_DI_CALBUSY BIT(6) +#define DMM32AT_AUX_DI3BIT(3) /* J3.45 - ADCLK (CLKSEL) */ +#define DMM32AT_AUX_DI2BIT(2) /* J3.46 - GATE12 (GT12EN) */ +#define DMM32AT_AUX_DI1BIT(1) /* J3.47 - GATE0 (GT0EN) */ +#define DMM32AT_AUX_DI0BIT(0) /* J3.48 - CLK0 (SRC0) */ #define DMM32AT_AO_LSB_REG 0x04 #define DMM32AT_AO_MSB_REG 0x05 #define DMM32AT_AO_MSB_DACH(x) ((x) << 6) #define DMM32AT_FIFO_DEPTH_REG 0x06 #define DMM32AT_FIFO_CTRL_REG 0x07 -#define DMM32AT_FIFO_CTRL_FIFOEN (1 << 3) -#define DMM32AT_FIFO_CTRL_SCANEN (1 << 2) -#define DMM32AT_FIFO_CTRL_FIFORST (1 << 1) +#define DMM32AT_FIFO_CTRL_FIFOEN BIT(3) +#define DMM32AT_FIFO_CTRL_SCANEN BIT(2) +#define DMM32AT_FIFO_CTRL_FIFORST BIT(1) #define DMM32AT_FIFO_STATUS_REG0x07 -#define DMM32AT_FIFO_STATUS_EF (1 << 7) -#define DMM32AT_FIFO_STATUS_HF (1 << 6) -#define DMM32AT_FIFO_STATUS_FF (1 << 5) -#define DMM32AT_FIFO_STATUS_OVF(1 << 4) -#define DMM32AT_FIFO_STATUS_FIFOEN (1 << 3) -#define DMM32AT_FIFO_STATUS_SCANEN (1 << 2) +#define DMM32AT_FIFO_STATUS_EF BIT(7) +#define DMM32AT_FIFO_STATUS_HF BIT(6) +#define DMM32AT_FIFO_STATUS_FF BIT(5) +#define DMM32AT_FIFO_STATUS_OVFBIT(4) +#define DMM32AT_FIFO_STATUS_FIFOEN BIT(3) +#define DMM32AT_FIFO_STATUS_SCANEN BIT(2) #define DMM32AT_FIFO_STATUS_PAGE_MASK (3 << 0) #define DMM32AT_CTRL_REG 0x08 -#define DMM32AT_CTRL_RESETA(1 << 5) -#define DMM32AT_CTRL_RESETD(1 << 4) -#define DMM32AT_CTRL_INTRST(1 << 3) +#define DMM32AT_CTRL_RESETABIT(5) +#define DMM32AT_CTRL_RESETDBIT(4) +#define DMM32AT_CTRL_INTRSTBIT(3) #define DMM32AT_CTRL_PAGE_8254 (0 << 0) -#define DMM32AT_CTRL_PAGE_8255 (1 << 0) +#define DMM32AT_CTRL_PAGE_8255 BIT(0) #define DMM32AT_CTRL_PAGE_CALIB(3 << 0) #define DMM32AT_AI_STATUS_REG 0x08 -#define DMM32AT_AI_STATUS_STS (1 << 7) -#define DMM32AT_AI_STATUS_SD1 (1 << 6) -#define DMM32AT_AI_STATUS_SD0 (1 << 5) +#define DMM32AT_AI_STATUS_STS BIT(7) +#define DMM32AT_AI_STATUS_SD1 BIT(6) +#define DMM32AT_AI_STATUS_SD0 BIT(5) #define DMM32AT_AI_STATUS_ADCH_MASK(0x1f << 0) #define DMM32AT_INTCLK_REG 0x09 -#define DMM32AT_INTCLK_ADINT (1 << 7) -#define DMM32AT_INTCLK_DINT(1 << 6) -#define DMM32AT_INTCLK_TINT(1 << 5) -#define DMM32AT_INTCLK_CLKEN (1 << 1) /* 1=see below 0=software */ -#define DMM32AT_INTCLK_CLKSEL (1 << 0) /* 1=OUT2 0=EXTCLK */ +#define DMM32AT_INTCLK_ADINT BIT(7) +#define DMM32AT_INTCLK_DINTBIT(6) +#define DMM32AT_INTCLK_TINTBIT(5) +#define DMM32AT_INTCLK_CLKEN BIT(1) /* 1=see below 0=software */ +#define DMM32AT_INTCLK_CLKSEL BIT(0) /* 1=OUT2 0=EXTCLK */ #define DMM32AT_CTRDIO_CFG_REG 0x0a -#define DMM32AT_CTRDIO_CFG_FREQ12 (1 << 7) /* CLK12 1=100KHz 0=10MHz */ -#define DMM32AT_CTRDIO_CFG_FREQ0 (1 << 6) /* CLK0 1=10KHz 0